1 /* $NetBSD: pci_machdep.c,v 1.38 2010/12/20 00:25:38 matt Exp $ */ 2 3 /* 4 * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved. 5 * Copyright (c) 1994 Charles M. Hannum. All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. All advertising materials mentioning features or use of this software 16 * must display the following acknowledgement: 17 * This product includes software developed by Charles M. Hannum. 18 * 4. The name of the author may not be used to endorse or promote products 19 * derived from this software without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 22 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 23 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 24 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 26 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 30 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 /* 34 * Machine-specific functions for PCI autoconfiguration. 35 * 36 * On PCs, there are two methods of generating PCI configuration cycles. 37 * We try to detect the appropriate mechanism for this machine and set 38 * up a few function pointers to access the correct method directly. 39 * 40 * The configuration method can be hard-coded in the config file by 41 * using `options PCI_CONF_MODE=N', where `N' is the configuration mode 42 * as defined section 3.6.4.1, `Generating Configuration Cycles'. 43 */ 44 45 #include <sys/cdefs.h> 46 __KERNEL_RCSID(0, "$NetBSD: pci_machdep.c,v 1.38 2010/12/20 00:25:38 matt Exp $"); 47 48 #include <sys/types.h> 49 #include <sys/param.h> 50 #include <sys/time.h> 51 #include <sys/systm.h> 52 #include <sys/errno.h> 53 #include <sys/device.h> 54 55 #define _POWERPC_BUS_DMA_PRIVATE 56 #include <machine/bus.h> 57 58 #include <machine/autoconf.h> 59 #include <machine/intr.h> 60 61 #include <dev/pci/pcivar.h> 62 #include <dev/pci/pcireg.h> 63 #include <dev/pci/ppbreg.h> 64 #include <dev/pci/pcidevs.h> 65 66 #include <dev/ofw/openfirm.h> 67 #include <dev/ofw/ofw_pci.h> 68 69 #include "opt_macppc.h" 70 71 static void fixpci(int, pci_chipset_tag_t); 72 static int find_node_intr(int, u_int32_t *, u_int32_t *); 73 static void fix_cardbus_bridge(int, pci_chipset_tag_t, pcitag_t); 74 75 #ifdef PB3400_CARDBUS_HACK 76 int cardbus_number = 2; 77 const char *pb3400_compat[] = {"AAPL,3400/2400", NULL}; 78 #endif 79 80 pcitag_t genppc_pci_indirect_make_tag(void *, int, int, int); 81 void genppc_pci_indirect_decompose_tag(void *, pcitag_t, int *, int *, int *); 82 83 void 84 macppc_pci_attach_hook(struct device *parent, struct device *self, struct pcibus_attach_args *pba) 85 { 86 pci_chipset_tag_t pc = pba->pba_pc; 87 int bus = pba->pba_bus; 88 int node, nn, sz; 89 int32_t busrange[2]; 90 91 for (node = pc->pc_node; node; node = nn) { 92 sz = OF_getprop(node, "bus-range", busrange, 8); 93 if (sz == 8 && busrange[0] == bus) { 94 fixpci(node, pc); 95 return; 96 } 97 if ((nn = OF_child(node)) != 0) 98 continue; 99 while ((nn = OF_peer(node)) == 0) { 100 node = OF_parent(node); 101 if (node == pc->pc_node) 102 return; /* not found */ 103 } 104 } 105 } 106 107 void 108 macppc_pci_get_chipset_tag(pci_chipset_tag_t pc) 109 { 110 111 pc->pc_conf_v = (void *)pc; 112 113 pc->pc_attach_hook = macppc_pci_attach_hook; 114 pc->pc_bus_maxdevs = genppc_pci_bus_maxdevs; 115 116 pc->pc_make_tag = genppc_pci_indirect_make_tag; 117 pc->pc_decompose_tag = genppc_pci_indirect_decompose_tag; 118 119 pc->pc_intr_v = (void *)pc; 120 121 pc->pc_intr_map = genppc_pci_intr_map; 122 pc->pc_intr_string = genppc_pci_intr_string; 123 pc->pc_intr_evcnt = genppc_pci_intr_evcnt; 124 pc->pc_intr_establish = genppc_pci_intr_establish; 125 pc->pc_intr_disestablish = genppc_pci_intr_disestablish; 126 127 pc->pc_conf_interrupt = genppc_pci_conf_interrupt; 128 pc->pc_conf_hook = genppc_pci_conf_hook; 129 130 pc->pc_bus = 0; 131 pc->pc_node = 0; 132 pc->pc_memt = 0; 133 pc->pc_iot = 0; 134 } 135 136 #define pcibus(x) \ 137 (((x) & OFW_PCI_PHYS_HI_BUSMASK) >> OFW_PCI_PHYS_HI_BUSSHIFT) 138 #define pcidev(x) \ 139 (((x) & OFW_PCI_PHYS_HI_DEVICEMASK) >> OFW_PCI_PHYS_HI_DEVICESHIFT) 140 #define pcifunc(x) \ 141 (((x) & OFW_PCI_PHYS_HI_FUNCTIONMASK) >> OFW_PCI_PHYS_HI_FUNCTIONSHIFT) 142 143 static void 144 fixpci(int parent, pci_chipset_tag_t pc) 145 { 146 int node; 147 pcitag_t tag; 148 pcireg_t csr, intr, id, cr; 149 int len, i, ilen; 150 int32_t irqs[4]; 151 struct { 152 u_int32_t phys_hi, phys_mid, phys_lo; 153 u_int32_t size_hi, size_lo; 154 } addr[8]; 155 struct { 156 u_int32_t phys_hi, phys_mid, phys_lo; 157 u_int32_t icells[5]; 158 } iaddr; 159 160 /* 161 * first hack - here we make the Ethernet portion of a 162 * UMAX E100 card work 163 */ 164 #ifdef UMAX_E100_HACK 165 tag = pci_make_tag(pc, 0, 17, 0); 166 id = pci_conf_read(pc, tag, PCI_ID_REG); 167 if ((PCI_VENDOR(id) == PCI_VENDOR_DEC) && 168 (PCI_PRODUCT(id) == PCI_PRODUCT_DEC_21140)) { 169 /* this could be one */ 170 pcireg_t isp, reg; 171 pcitag_t tag_isp = pci_make_tag(pc, 0, 13, 0); 172 /* 173 * here we go. We shouldn't encounter this anywhere else 174 * than on a UMAX S900 with an E100 board 175 * look at 00:0d:00 for a Qlogic ISP 1020 to 176 * make sure we really have an E100 here 177 */ 178 aprint_debug("\nfound E100 candidate tlp"); 179 isp = pci_conf_read(pc, tag_isp, PCI_ID_REG); 180 if ((PCI_VENDOR(isp) == PCI_VENDOR_QLOGIC) && 181 (PCI_PRODUCT(isp) == PCI_PRODUCT_QLOGIC_ISP1020)) { 182 183 aprint_verbose("\nenabling UMAX E100 ethernet"); 184 185 pci_conf_write(pc, tag, 0x14, 0x80000000); 186 187 /* now enable MMIO and busmastering */ 188 reg = pci_conf_read(pc, tag, 189 PCI_COMMAND_STATUS_REG); 190 reg |= PCI_COMMAND_MEM_ENABLE | 191 PCI_COMMAND_MASTER_ENABLE; 192 pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, 193 reg); 194 195 /* and finally the interrupt */ 196 reg = pci_conf_read(pc, tag, PCI_INTERRUPT_REG); 197 reg &= ~PCI_INTERRUPT_LINE_MASK; 198 reg |= 23; 199 pci_conf_write(pc, tag, PCI_INTERRUPT_REG, reg); 200 } 201 } 202 #endif 203 204 len = OF_getprop(parent, "#interrupt-cells", &ilen, sizeof(ilen)); 205 if (len < 0) 206 ilen = 0; 207 for (node = OF_child(parent); node; node = OF_peer(node)) { 208 len = OF_getprop(node, "assigned-addresses", addr, 209 sizeof(addr)); 210 if (len < (int)sizeof(addr[0])) 211 continue; 212 213 tag = pci_make_tag(pc, pcibus(addr[0].phys_hi), 214 pcidev(addr[0].phys_hi), 215 pcifunc(addr[0].phys_hi)); 216 217 /* 218 * Make sure the IO and MEM enable bits are set in the CSR. 219 */ 220 csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG); 221 csr &= ~(PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE); 222 223 for (i = 0; i < len / sizeof(addr[0]); i++) { 224 switch (addr[i].phys_hi & OFW_PCI_PHYS_HI_SPACEMASK) { 225 case OFW_PCI_PHYS_HI_SPACE_IO: 226 csr |= PCI_COMMAND_IO_ENABLE; 227 break; 228 229 case OFW_PCI_PHYS_HI_SPACE_MEM32: 230 case OFW_PCI_PHYS_HI_SPACE_MEM64: 231 csr |= PCI_COMMAND_MEM_ENABLE; 232 break; 233 } 234 } 235 236 pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, csr); 237 238 /* 239 * Make sure the line register is programmed with the 240 * interrupt mapping. 241 */ 242 if (ilen == 0) { 243 /* 244 * Early Apple OFW implementation don't handle 245 * interrupts as defined by the OFW PCI bindings. 246 */ 247 len = OF_getprop(node, "AAPL,interrupts", irqs, 4); 248 } else { 249 iaddr.phys_hi = addr[0].phys_hi; 250 iaddr.phys_mid = addr[0].phys_mid; 251 iaddr.phys_lo = addr[0].phys_lo; 252 /* 253 * Thankfully, PCI can only have one entry in its 254 * "interrupts" property. 255 */ 256 len = OF_getprop(node, "interrupts", &iaddr.icells[0], 257 4*ilen); 258 if (len != 4*ilen) 259 continue; 260 len = find_node_intr(node, &iaddr.phys_hi, irqs); 261 } 262 if (len <= 0) { 263 /* 264 * If we still don't have an interrupt, try one 265 * more time. This case covers devices behind the 266 * PCI-PCI bridge in a UMAX S900 or similar (9500?) 267 * system. These slots all share the bridge's 268 * interrupt. 269 */ 270 len = find_node_intr(node, &addr[0].phys_hi, irqs); 271 if (len <= 0) 272 continue; 273 } 274 275 /* 276 * For PowerBook 2400, 3400 and original G3: 277 * check if we have a 2nd ohare PIC - if so frob the built-in 278 * tlp's IRQ to 60 279 * first see if we have something on bus 0 device 13 and if 280 * it's a DEC 21041 281 */ 282 id = pci_conf_read(pc, tag, PCI_ID_REG); 283 if ((tag == pci_make_tag(pc, 0, 13, 0)) && 284 (PCI_VENDOR(id) == PCI_VENDOR_DEC) && 285 (PCI_PRODUCT(id) == PCI_PRODUCT_DEC_21041)) { 286 287 /* now look for the 2nd ohare */ 288 if (OF_finddevice("/bandit/pci106b,7") != -1) { 289 290 irqs[0] = 60; 291 aprint_verbose("\nohare: frobbing tlp IRQ to 60"); 292 } 293 } 294 295 intr = pci_conf_read(pc, tag, PCI_INTERRUPT_REG); 296 intr &= ~PCI_INTERRUPT_LINE_MASK; 297 intr |= irqs[0] & PCI_INTERRUPT_LINE_MASK; 298 pci_conf_write(pc, tag, PCI_INTERRUPT_REG, intr); 299 300 /* fix secondary bus numbers on CardBus bridges */ 301 cr = pci_conf_read(pc, tag, PCI_CLASS_REG); 302 if ((PCI_CLASS(cr) == PCI_CLASS_BRIDGE) && 303 (PCI_SUBCLASS(cr) == PCI_SUBCLASS_BRIDGE_CARDBUS)) { 304 uint32_t bi, busid; 305 306 /* 307 * we found a CardBus bridge. Check if the bus number 308 * is sane 309 */ 310 bi = pci_conf_read(pc, tag, PPB_REG_BUSINFO); 311 busid = bi & 0xff; 312 if (busid == 0) { 313 fix_cardbus_bridge(node, pc, tag); 314 } 315 } 316 } 317 } 318 319 static void 320 fix_cardbus_bridge(int node, pci_chipset_tag_t pc, pcitag_t tag) 321 { 322 uint32_t bus_number = 0xffffffff; 323 pcireg_t bi; 324 int bus, dev, fn, ih, len; 325 char path[256]; 326 327 #if PB3400_CARDBUS_HACK 328 int root_node; 329 330 root_node = OF_finddevice("/"); 331 if (of_compatible(root_node, pb3400_compat) != -1) { 332 333 bus_number = cardbus_number; 334 cardbus_number++; 335 } else { 336 #endif 337 ih = OF_open(path); 338 OF_call_method("load-ata", ih, 0, 0); 339 OF_close(ih); 340 341 OF_getprop(node, "AAPL,bus-id", &bus_number, 342 sizeof(bus_number)); 343 #if PB3400_CARDBUS_HACK 344 } 345 #endif 346 if (bus_number != 0xffffffff) { 347 348 len = OF_package_to_path(node, path, sizeof(path)); 349 path[len] = 0; 350 aprint_verbose("\n%s: fixing bus number to %d", path, bus_number); 351 pci_decompose_tag(pc, tag, &bus, &dev, &fn); 352 bi = pci_conf_read(pc, tag, PPB_REG_BUSINFO); 353 bi &= 0xff000000; 354 /* XXX subordinate is always 32 here */ 355 bi |= (bus & 0xff) | (bus_number << 8) | 0x200000; 356 pci_conf_write(pc, tag, PPB_REG_BUSINFO, bi); 357 } 358 } 359 360 /* 361 * Find PCI IRQ of the node from OF tree. 362 */ 363 static int 364 find_node_intr(int node, u_int32_t *addr, uint32_t *intr) 365 { 366 int parent, len, mlen, iparent; 367 int match, i; 368 u_int32_t map[160]; 369 const u_int32_t *mp; 370 u_int32_t imapmask[8], maskedaddr[8]; 371 u_int32_t acells, icells; 372 char name[32]; 373 374 /* XXXSL: 1st check for a interrupt-parent property */ 375 if (OF_getprop(node, "interrupt-parent", &iparent, sizeof(iparent)) == sizeof(iparent)) 376 { 377 /* How many cells to specify an interrupt ?? */ 378 if (OF_getprop(iparent, "#interrupt-cells", &icells, 4) != 4) 379 return -1; 380 381 if (OF_getprop(node, "interrupts", &map, sizeof(map)) != (icells * 4)) 382 return -1; 383 384 memcpy(intr, map, icells * 4); 385 return (icells * 4); 386 } 387 388 parent = OF_parent(node); 389 len = OF_getprop(parent, "interrupt-map", map, sizeof(map)); 390 mlen = OF_getprop(parent, "interrupt-map-mask", imapmask, 391 sizeof(imapmask)); 392 393 if (mlen != -1) 394 memcpy(maskedaddr, addr, mlen); 395 again: 396 if (len == -1 || mlen == -1) 397 goto nomap; 398 399 #ifdef DIAGNOSTIC 400 if (mlen == sizeof(imapmask)) { 401 aprint_error("interrupt-map too long\n"); 402 return -1; 403 } 404 #endif 405 406 /* mask addr by "interrupt-map-mask" */ 407 for (i = 0; i < mlen / 4; i++) 408 maskedaddr[i] &= imapmask[i]; 409 410 mp = map; 411 i = 0; 412 while (len > mlen) { 413 match = memcmp(maskedaddr, mp, mlen); 414 mp += mlen / 4; 415 len -= mlen; 416 417 /* 418 * We must read "#address-cells" and "#interrupt-cells" each 419 * time because each interrupt-parent may be different. 420 */ 421 iparent = *mp++; 422 len -= 4; 423 i = OF_getprop(iparent, "#address-cells", &acells, 4); 424 if (i <= 0) 425 acells = 0; 426 else if (i != 4) 427 return -1; 428 if (OF_getprop(iparent, "#interrupt-cells", &icells, 4) != 4) 429 return -1; 430 431 /* Found. */ 432 if (match == 0) { 433 /* 434 * We matched on address/interrupt, but are we done? 435 */ 436 if (acells == 0) { /* XXX */ 437 /* 438 * If we are at the interrupt controller, 439 * we are finally done. Save the result and 440 * return. 441 */ 442 memcpy(intr, mp, icells * 4); 443 return icells * 4; 444 } 445 /* 446 * We are now at an intermedia interrupt node. We 447 * need to use its interrupt mask and map the 448 * supplied address/interrupt via its map. 449 */ 450 mlen = OF_getprop(iparent, "interrupt-map-mask", 451 imapmask, sizeof(imapmask)); 452 #ifdef DIAGNOSTIC 453 if (mlen != (acells + icells)*4) { 454 aprint_error("interrupt-map inconsistent (%d, %d)\n", 455 mlen, (acells + icells)*4); 456 return -1; 457 } 458 #endif 459 memcpy(maskedaddr, mp, mlen); 460 len = OF_getprop(iparent, "interrupt-map", map, 461 sizeof(map)); 462 goto again; 463 } 464 465 mp += (acells + icells); 466 len -= (acells + icells) * 4; 467 } 468 469 nomap: 470 /* 471 * If the node has no interrupt property and the parent is a 472 * pci-bridge, use parent's interrupt. This occurs on a PCI 473 * slot. (e.g. AHA-3940) 474 */ 475 memset(name, 0, sizeof(name)); 476 OF_getprop(parent, "name", name, sizeof(name)); 477 if (strcmp(name, "pci-bridge") == 0) { 478 len = OF_getprop(parent, "AAPL,interrupts", intr, 4) ; 479 if (len == 4) 480 return len; 481 #if 0 482 /* 483 * XXX I don't know what is the correct local address. 484 * XXX Use the first entry for now. 485 */ 486 len = OF_getprop(parent, "interrupt-map", map, sizeof(map)); 487 if (len >= 36) { 488 addr = &map[5]; 489 return find_node_intr(parent, addr, intr); 490 } 491 #endif 492 } 493 494 /* 495 * If all else fails, attempt to get AAPL, interrupts property. 496 * Grackle, at least, uses this instead of above in some cases. 497 */ 498 len = OF_getprop(node, "AAPL,interrupts", intr, 4) ; 499 if (len == 4) 500 return len; 501 502 return -1; 503 } 504