1 /* $NetBSD: ipi_hammerhead.c,v 1.7 2023/12/20 15:29:05 thorpej Exp $ */ 2 /*- 3 * Copyright (c) 2007 The NetBSD Foundation, Inc. 4 * All rights reserved. 5 * 6 * This code is derived from software contributed to The NetBSD Foundation 7 * by Tim Rightnour 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 19 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 20 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 21 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 22 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * POSSIBILITY OF SUCH DAMAGE. 29 */ 30 31 #include <sys/cdefs.h> 32 __KERNEL_RCSID(0, "$NetBSD: ipi_hammerhead.c,v 1.7 2023/12/20 15:29:05 thorpej Exp $"); 33 34 #include "opt_multiprocessor.h" 35 #include <sys/param.h> 36 #include <sys/kernel.h> 37 #include <sys/atomic.h> 38 39 #include <machine/pio.h> 40 41 #include <arch/powerpc/pic/picvar.h> 42 #include <arch/powerpc/pic/ipivar.h> 43 44 #ifdef MULTIPROCESSOR 45 46 extern struct ipi_ops ipiops; 47 static void hh_send_ipi(cpuid_t, uint32_t); 48 static void hh_establish_ipi(int, int, void *); 49 50 #define HH_INTR_SECONDARY 0xf80000c0 51 #define HH_INTR_PRIMARY 0xf3019000 52 #define GC_IPI_IRQ 30 53 54 void 55 setup_hammerhead_ipi(void) 56 { 57 ipiops.ppc_send_ipi = hh_send_ipi; 58 ipiops.ppc_establish_ipi = hh_establish_ipi; 59 ipiops.ppc_ipi_vector = GC_IPI_IRQ; 60 } 61 62 static void 63 hh_send_ipi(cpuid_t target, uint32_t mesg) 64 { 65 int cpu_id = target; 66 67 if (target == IPI_DST_ALL) { 68 atomic_or_32(&cpu_info[0].ci_pending_ipis, mesg); 69 atomic_or_32(&cpu_info[1].ci_pending_ipis, mesg); 70 in32(HH_INTR_PRIMARY); 71 out32(HH_INTR_SECONDARY, ~0); 72 out32(HH_INTR_SECONDARY, 0); 73 return; 74 } 75 76 if (target == IPI_DST_NOTME) { 77 cpu_id = cpu_number() ^ 1; 78 } 79 80 atomic_or_32(&cpu_info[cpu_id].ci_pending_ipis, mesg); 81 switch (cpu_id) { 82 case 0: 83 in32(HH_INTR_PRIMARY); 84 break; 85 case 1: 86 out32(HH_INTR_SECONDARY, ~0); 87 out32(HH_INTR_SECONDARY, 0); 88 break; 89 } 90 } 91 92 static void 93 hh_establish_ipi(int type, int level, void *ih_args) 94 { 95 intr_establish_xname(ipiops.ppc_ipi_vector, type, level, ipi_intr, 96 ih_args, "hh ipi"); 97 } 98 99 #endif /*MULTIPROCESSOR*/ 100