1 /* $NetBSD: zs.c,v 1.51 2021/03/05 07:15:53 rin Exp $ */ 2 3 /* 4 * Copyright (c) 1996, 1998 Bill Studenmund 5 * Copyright (c) 1995 Gordon W. Ross 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 /* 30 * Zilog Z8530 Dual UART driver (machine-dependent part) 31 * 32 * Runs two serial lines per chip using slave drivers. 33 * Plain tty/async lines use the zs_async slave. 34 * Sun keyboard/mouse uses the zs_kbd/zs_ms slaves. 35 * Other ports use their own mice & keyboard slaves. 36 * 37 * Credits & history: 38 * 39 * With NetBSD 1.1, port-mac68k started using a port of the port-sparc 40 * (port-sun3?) zs.c driver (which was in turn based on code in the 41 * Berkeley 4.4 Lite release). Bill Studenmund did the port, with 42 * help from Allen Briggs and Gordon Ross <gwr@NetBSD.org>. Noud de 43 * Brouwer field-tested the driver at a local ISP. 44 * 45 * Bill Studenmund and Gordon Ross then ported the machine-independent 46 * z8530 driver to work with port-mac68k. NetBSD 1.2 contained an 47 * intermediate version (mac68k using a local, patched version of 48 * the m.i. drivers), with NetBSD 1.3 containing a full version. 49 */ 50 51 #include <sys/cdefs.h> 52 __KERNEL_RCSID(0, "$NetBSD: zs.c,v 1.51 2021/03/05 07:15:53 rin Exp $"); 53 54 #include "opt_ddb.h" 55 #include "opt_kgdb.h" 56 57 #include <sys/param.h> 58 #include <sys/systm.h> 59 #include <sys/proc.h> 60 #include <sys/device.h> 61 #include <sys/conf.h> 62 #include <sys/file.h> 63 #include <sys/ioctl.h> 64 #include <sys/tty.h> 65 #include <sys/time.h> 66 #include <sys/kernel.h> 67 #include <sys/syslog.h> 68 #include <sys/intr.h> 69 #include <sys/cpu.h> 70 #ifdef KGDB 71 #include <sys/kgdb.h> 72 #endif 73 74 #include <dev/cons.h> 75 #include <dev/ofw/openfirm.h> 76 #include <dev/ic/z8530reg.h> 77 78 #include <machine/z8530var.h> 79 #include <machine/autoconf.h> 80 #include <machine/pio.h> 81 82 /* Are these in a header file anywhere? */ 83 /* Booter flags interface */ 84 #define ZSMAC_RAW 0x01 85 #define ZSMAC_LOCALTALK 0x02 86 87 /* 88 * Some warts needed by z8530tty.c - 89 */ 90 int zs_def_cflag = (CREAD | CS8 | HUPCL); 91 92 /* 93 * abort detection on console will now timeout after iterating on a loop 94 * the following # of times. Cheep hack. Also, abort detection is turned 95 * off after a timeout (i.e. maybe there's not a terminal hooked up). 96 */ 97 #define ZSABORT_DELAY 3000000 98 99 struct zsdevice { 100 /* Yes, they are backwards. */ 101 struct zschan zs_chan_b; 102 struct zschan zs_chan_a; 103 }; 104 105 static int zs_defspeed[2] = { 106 38400, /* ttyZ0 */ 107 38400, /* ttyZ1 */ 108 }; 109 110 /* console stuff */ 111 void *zs_conschan = 0; 112 int zs_conschannel = -1; 113 #ifdef ZS_CONSOLE_ABORT 114 int zs_cons_canabort = 1; 115 #else 116 int zs_cons_canabort = 0; 117 #endif /* ZS_CONSOLE_ABORT*/ 118 119 /* device to which the console is attached--if serial. */ 120 /* Mac stuff */ 121 122 static int zs_get_speed(struct zs_chanstate *); 123 124 /* 125 * Even though zsparam will set up the clock multiples, etc., we 126 * still set them here as: 1) mice & keyboards don't use zsparam, 127 * and 2) the console stuff uses these defaults before device 128 * attach. 129 */ 130 131 static uint8_t zs_init_reg[16] = { 132 0, /* 0: CMD (reset, etc.) */ 133 0, /* 1: No interrupts yet. */ 134 0, /* IVECT */ 135 ZSWR3_RX_8 | ZSWR3_RX_ENABLE, 136 ZSWR4_CLK_X16 | ZSWR4_ONESB | ZSWR4_EVENP, 137 ZSWR5_TX_8 | ZSWR5_TX_ENABLE, 138 0, /* 6: TXSYNC/SYNCLO */ 139 0, /* 7: RXSYNC/SYNCHI */ 140 0, /* 8: alias for data port */ 141 ZSWR9_MASTER_IE, 142 0, /*10: Misc. TX/RX control bits */ 143 ZSWR11_TXCLK_BAUD | ZSWR11_RXCLK_BAUD, 144 ((PCLK/32)/38400)-2, /*12: BAUDLO (default=38400) */ 145 0, /*13: BAUDHI (default=38400) */ 146 ZSWR14_BAUD_ENA, 147 ZSWR15_BREAK_IE, 148 }; 149 150 /**************************************************************** 151 * Autoconfig 152 ****************************************************************/ 153 154 /* Definition of the driver for autoconfig. */ 155 static int zsc_match(device_t, cfdata_t, void *); 156 static void zsc_attach(device_t, device_t, void *); 157 static int zsc_print(void *, const char *); 158 159 CFATTACH_DECL_NEW(zsc, sizeof(struct zsc_softc), 160 zsc_match, zsc_attach, NULL, NULL); 161 162 extern struct cfdriver zsc_cd; 163 164 int zsc_attached; 165 166 int zshard(void *); 167 #ifdef ZS_TXDMA 168 static int zs_txdma_int(void *); 169 #endif 170 171 void zscnprobe(struct consdev *); 172 void zscninit(struct consdev *); 173 int zscngetc(dev_t); 174 void zscnputc(dev_t, int); 175 void zscnpollc(dev_t, int); 176 177 /* 178 * Is the zs chip present? 179 */ 180 static int 181 zsc_match(device_t parent, cfdata_t cf, void *aux) 182 { 183 struct confargs *ca = aux; 184 185 if (strcmp(ca->ca_name, "escc") != 0) 186 return 0; 187 188 if (zsc_attached) 189 return 0; 190 191 return 1; 192 } 193 194 /* 195 * Attach a found zs. 196 * 197 * Match slave number to zs unit number, so that misconfiguration will 198 * not set up the keyboard as ttya, etc. 199 */ 200 static void 201 zsc_attach(device_t parent, device_t self, void *aux) 202 { 203 struct zsc_softc *zsc = device_private(self); 204 struct confargs *ca = aux; 205 struct zsc_attach_args zsc_args; 206 volatile struct zschan *zc; 207 struct xzs_chanstate *xcs; 208 struct zs_chanstate *cs; 209 struct zsdevice *zsd; 210 int channel; 211 int s, chip, theflags; 212 int node, intr[2][3]; 213 u_int regs[6]; 214 char intr_xname[INTRDEVNAMEBUF]; 215 216 zsc_attached = 1; 217 218 zsc->zsc_dev = self; 219 220 chip = 0; 221 ca->ca_reg[0] += ca->ca_baseaddr; 222 zsd = mapiodev(ca->ca_reg[0], ca->ca_reg[1], false); 223 224 node = OF_child(ca->ca_node); /* ch-a */ 225 226 for (channel = 0; channel < 2; channel++) { 227 if (OF_getprop(node, "AAPL,interrupts", 228 intr[channel], sizeof(intr[0])) == -1 && 229 OF_getprop(node, "interrupts", 230 intr[channel], sizeof(intr[0])) == -1) { 231 aprint_error(": cannot find interrupt property\n"); 232 return; 233 } 234 235 if (OF_getprop(node, "reg", regs, sizeof(regs)) < 24) { 236 aprint_error(": cannot find reg property\n"); 237 return; 238 } 239 regs[2] += ca->ca_baseaddr; 240 regs[4] += ca->ca_baseaddr; 241 #ifdef ZS_TXDMA 242 zsc->zsc_txdmareg[channel] = mapiodev(regs[2], regs[3], false); 243 zsc->zsc_txdmacmd[channel] = 244 dbdma_alloc(sizeof(dbdma_command_t) * 3); 245 memset(zsc->zsc_txdmacmd[channel], 0, 246 sizeof(dbdma_command_t) * 3); 247 dbdma_reset(zsc->zsc_txdmareg[channel]); 248 #endif 249 node = OF_peer(node); /* ch-b */ 250 } 251 252 aprint_normal(" irq %d,%d\n", intr[0][0], intr[1][0]); 253 254 /* 255 * Initialize software state for each channel. 256 */ 257 for (channel = 0; channel < 2; channel++) { 258 zsc_args.channel = channel; 259 zsc_args.hwflags = (channel == zs_conschannel ? 260 ZS_HWFLAG_CONSOLE : 0); 261 xcs = &zsc->xzsc_xcs_store[channel]; 262 cs = &xcs->xzs_cs; 263 zsc->zsc_cs[channel] = cs; 264 265 zs_lock_init(cs); 266 cs->cs_channel = channel; 267 cs->cs_private = NULL; 268 cs->cs_ops = &zsops_null; 269 270 zc = (channel == 0) ? &zsd->zs_chan_a : &zsd->zs_chan_b; 271 272 cs->cs_reg_csr = &zc->zc_csr; 273 cs->cs_reg_data = &zc->zc_data; 274 275 memcpy(cs->cs_creg, zs_init_reg, 16); 276 memcpy(cs->cs_preg, zs_init_reg, 16); 277 278 /* Current BAUD rate generator clock. */ 279 cs->cs_brg_clk = PCLK / 16; /* RTxC is 230400*16, so use 230400 */ 280 if (zsc_args.hwflags & ZS_HWFLAG_CONSOLE) 281 cs->cs_defspeed = zs_get_speed(cs); 282 else 283 cs->cs_defspeed = zs_defspeed[channel]; 284 cs->cs_defcflag = zs_def_cflag; 285 286 /* Make these correspond to cs_defcflag (-crtscts) */ 287 cs->cs_rr0_dcd = ZSRR0_DCD; 288 cs->cs_rr0_cts = 0; 289 cs->cs_wr5_dtr = ZSWR5_DTR; 290 cs->cs_wr5_rts = 0; 291 292 #ifdef __notyet__ 293 cs->cs_slave_type = ZS_SLAVE_NONE; 294 #endif 295 296 /* Define BAUD rate stuff. */ 297 xcs->cs_clocks[0].clk = PCLK; 298 xcs->cs_clocks[0].flags = ZSC_RTXBRG | ZSC_RTXDIV; 299 xcs->cs_clocks[1].flags = 300 ZSC_RTXBRG | ZSC_RTXDIV | ZSC_VARIABLE | ZSC_EXTERN; 301 xcs->cs_clocks[2].flags = ZSC_TRXDIV | ZSC_VARIABLE; 302 xcs->cs_clock_count = 3; 303 if (channel == 0) { 304 theflags = 0; /*mac68k_machine.modem_flags;*/ 305 /*xcs->cs_clocks[1].clk = mac68k_machine.modem_dcd_clk;*/ 306 /*xcs->cs_clocks[2].clk = mac68k_machine.modem_cts_clk;*/ 307 xcs->cs_clocks[1].clk = 0; 308 xcs->cs_clocks[2].clk = 0; 309 } else { 310 theflags = 0; /*mac68k_machine.print_flags;*/ 311 xcs->cs_clocks[1].flags = ZSC_VARIABLE; 312 /* 313 * Yes, we aren't defining ANY clock source enables for the 314 * printer's DCD clock in. The hardware won't let us 315 * use it. But a clock will freak out the chip, so we 316 * let you set it, telling us to bar interrupts on the line. 317 */ 318 /*xcs->cs_clocks[1].clk = mac68k_machine.print_dcd_clk;*/ 319 /*xcs->cs_clocks[2].clk = mac68k_machine.print_cts_clk;*/ 320 xcs->cs_clocks[1].clk = 0; 321 xcs->cs_clocks[2].clk = 0; 322 } 323 if (xcs->cs_clocks[1].clk) 324 zsc_args.hwflags |= ZS_HWFLAG_NO_DCD; 325 if (xcs->cs_clocks[2].clk) 326 zsc_args.hwflags |= ZS_HWFLAG_NO_CTS; 327 328 /* Set defaults in our "extended" chanstate. */ 329 xcs->cs_csource = 0; 330 xcs->cs_psource = 0; 331 xcs->cs_cclk_flag = 0; /* Nothing fancy by default */ 332 xcs->cs_pclk_flag = 0; 333 334 if (theflags & ZSMAC_RAW) { 335 zsc_args.hwflags |= ZS_HWFLAG_RAW; 336 printf(" (raw defaults)"); 337 } 338 339 /* 340 * XXX - This might be better done with a "stub" driver 341 * (to replace zstty) that ignores LocalTalk for now. 342 */ 343 if (theflags & ZSMAC_LOCALTALK) { 344 printf(" shielding from LocalTalk"); 345 cs->cs_defspeed = 1; 346 cs->cs_creg[ZSRR_BAUDLO] = cs->cs_preg[ZSRR_BAUDLO] = 0xff; 347 cs->cs_creg[ZSRR_BAUDHI] = cs->cs_preg[ZSRR_BAUDHI] = 0xff; 348 zs_write_reg(cs, ZSRR_BAUDLO, 0xff); 349 zs_write_reg(cs, ZSRR_BAUDHI, 0xff); 350 /* 351 * If we might have LocalTalk, then make sure we have the 352 * Baud rate low-enough to not do any damage. 353 */ 354 } 355 356 /* 357 * We used to disable chip interrupts here, but we now 358 * do that in zscnprobe, just in case MacOS left the chip on. 359 */ 360 361 xcs->cs_chip = chip; 362 363 /* Stash away a copy of the final H/W flags. */ 364 xcs->cs_hwflags = zsc_args.hwflags; 365 366 /* 367 * Look for a child driver for this channel. 368 * The child attach will setup the hardware. 369 */ 370 if (!config_found(self, (void *)&zsc_args, zsc_print)) { 371 /* No sub-driver. Just reset it. */ 372 uint8_t reset = (channel == 0) ? 373 ZSWR9_A_RESET : ZSWR9_B_RESET; 374 s = splzs(); 375 zs_write_reg(cs, 9, reset); 376 splx(s); 377 } 378 } 379 380 /* XXX - Now safe to install interrupt handlers. */ 381 for (channel = 0; channel < 2; channel++) { 382 snprintf(intr_xname, sizeof(intr_xname), "%s pio%d", 383 device_xname(self), channel); 384 intr_establish_xname(intr[channel][0], IST_EDGE, IPL_TTY, 385 zshard, zsc, intr_xname); 386 #ifdef ZS_TXDMA 387 snprintf(intr_xname, sizeof(intr_xname), "%s dma%d", 388 device_xname(self), channel); 389 intr_establish_xname(intr[channel][1], IST_EDGE, IPL_TTY, 390 zs_txdma_int, (void *)channel, intr_xname); 391 #endif 392 } 393 394 zsc->zsc_si = softint_establish(SOFTINT_SERIAL, 395 (void (*)(void *)) zsc_intr_soft, zsc); 396 397 /* 398 * Set the master interrupt enable and interrupt vector. 399 * (common to both channels, do it on A) 400 */ 401 cs = zsc->zsc_cs[0]; 402 s = splzs(); 403 /* interrupt vector */ 404 zs_write_reg(cs, 2, zs_init_reg[2]); 405 /* master interrupt control (enable) */ 406 zs_write_reg(cs, 9, zs_init_reg[9]); 407 splx(s); 408 } 409 410 static int 411 zsc_print(void *aux, const char *name) 412 { 413 struct zsc_attach_args *args = aux; 414 415 if (name != NULL) 416 aprint_normal("%s: ", name); 417 418 if (args->channel != -1) 419 aprint_normal(" channel %d", args->channel); 420 421 return UNCONF; 422 } 423 424 int 425 zsmdioctl(struct zs_chanstate *cs, u_long cmd, void *data) 426 { 427 switch (cmd) { 428 default: 429 return (EPASSTHROUGH); 430 } 431 return (0); 432 } 433 434 void 435 zsmd_setclock(struct zs_chanstate *cs) 436 { 437 #ifdef NOTYET 438 struct xzs_chanstate *xcs = (void *)cs; 439 440 if (cs->cs_channel != 0) 441 return; 442 443 /* 444 * If the new clock has the external bit set, then select the 445 * external source. 446 */ 447 via_set_modem((xcs->cs_pclk_flag & ZSC_EXTERN) ? 1 : 0); 448 #endif 449 } 450 451 int 452 zshard(void *arg) 453 { 454 struct zsc_softc *zsc; 455 int rval; 456 457 zsc = arg; 458 rval = zsc_intr_hard(zsc); 459 if ((zsc->zsc_cs[0]->cs_softreq) || (zsc->zsc_cs[1]->cs_softreq)) 460 softint_schedule(zsc->zsc_si); 461 462 return rval; 463 } 464 465 #ifdef ZS_TXDMA 466 int 467 zs_txdma_int(void *arg) 468 { 469 int ch = (int)arg; 470 struct zsc_softc *zsc; 471 struct zs_chanstate *cs; 472 473 zsc = device_lookup_private(&zsc_cd, ch); 474 if (zsc == NULL) 475 panic("zs_txdma_int"); 476 477 cs = zsc->zsc_cs[ch]; 478 zstty_txdma_int(cs); 479 480 if (cs->cs_softreq) 481 softint_schedule(zsc->zsc_si); 482 483 return 1; 484 } 485 486 void 487 zs_dma_setup(struct zs_chanstate *cs, void *pa, int len) 488 { 489 struct zsc_softc *zsc; 490 dbdma_command_t *cmdp; 491 int ch = cs->cs_channel; 492 493 zsc = device_lookup_private(&zsc_cd, ch); 494 cmdp = zsc->zsc_txdmacmd[ch]; 495 496 DBDMA_BUILD(cmdp, DBDMA_CMD_OUT_LAST, 0, len, kvtop(pa), 497 DBDMA_INT_ALWAYS, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER); 498 cmdp++; 499 DBDMA_BUILD(cmdp, DBDMA_CMD_STOP, 0, 0, 0, 500 DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER); 501 502 __asm volatile("eieio"); 503 504 dbdma_start(zsc->zsc_txdmareg[ch], zsc->zsc_txdmacmd[ch]); 505 } 506 #endif 507 508 /* 509 * Compute the current baud rate given a ZS channel. 510 * XXX Assume internal BRG. 511 */ 512 int 513 zs_get_speed(struct zs_chanstate *cs) 514 { 515 int tconst; 516 517 tconst = zs_read_reg(cs, 12); 518 tconst |= zs_read_reg(cs, 13) << 8; 519 return TCONST_TO_BPS(cs->cs_brg_clk, tconst); 520 } 521 522 #ifndef ZS_TOLERANCE 523 #define ZS_TOLERANCE 51 524 /* 5% in tenths of a %, plus 1 so that exactly 5% will be ok. */ 525 #endif 526 527 /* 528 * Search through the signal sources in the channel, and 529 * pick the best one for the baud rate requested. Return 530 * a -1 if not achievable in tolerance. Otherwise return 0 531 * and fill in the values. 532 * 533 * This routine draws inspiration from the Atari port's zs.c 534 * driver in NetBSD 1.1 which did the same type of source switching. 535 * Tolerance code inspired by comspeed routine in isa/com.c. 536 * 537 * By Bill Studenmund, 1996-05-12 538 */ 539 int 540 zs_set_speed(struct zs_chanstate *cs, int bps) 541 { 542 struct xzs_chanstate *xcs = (void *) cs; 543 int i, tc, tc0 = 0, tc1, s, sf = 0; 544 int src, rate0, rate1, err, tol; 545 546 if (bps == 0) 547 return (0); 548 549 src = -1; /* no valid source yet */ 550 tol = ZS_TOLERANCE; 551 552 /* 553 * Step through all the sources and see which one matches 554 * the best. A source has to match BETTER than tol to be chosen. 555 * Thus if two sources give the same error, the first one will be 556 * chosen. Also, allow for the possability that one source might run 557 * both the BRG and the direct divider (i.e. RTxC). 558 */ 559 for (i = 0; i < xcs->cs_clock_count; i++) { 560 if (xcs->cs_clocks[i].clk <= 0) 561 continue; /* skip non-existent or bad clocks */ 562 if (xcs->cs_clocks[i].flags & ZSC_BRG) { 563 /* check out BRG at /16 */ 564 tc1 = BPS_TO_TCONST(xcs->cs_clocks[i].clk >> 4, bps); 565 if (tc1 >= 0) { 566 rate1 = TCONST_TO_BPS(xcs->cs_clocks[i].clk >> 4, tc1); 567 err = abs(((rate1 - bps)*1000)/bps); 568 if (err < tol) { 569 tol = err; 570 src = i; 571 sf = xcs->cs_clocks[i].flags & ~ZSC_DIV; 572 tc0 = tc1; 573 rate0 = rate1; 574 } 575 } 576 } 577 if (xcs->cs_clocks[i].flags & ZSC_DIV) { 578 /* 579 * Check out either /1, /16, /32, or /64 580 * Note: for /1, you'd better be using a synchronized 581 * clock! 582 */ 583 int b0 = xcs->cs_clocks[i].clk, e0 = abs(b0-bps); 584 int b1 = b0 >> 4, e1 = abs(b1-bps); 585 int b2 = b1 >> 1, e2 = abs(b2-bps); 586 int b3 = b2 >> 1, e3 = abs(b3-bps); 587 588 if (e0 < e1 && e0 < e2 && e0 < e3) { 589 err = e0; 590 rate1 = b0; 591 tc1 = ZSWR4_CLK_X1; 592 } else if (e0 > e1 && e1 < e2 && e1 < e3) { 593 err = e1; 594 rate1 = b1; 595 tc1 = ZSWR4_CLK_X16; 596 } else if (e0 > e2 && e1 > e2 && e2 < e3) { 597 err = e2; 598 rate1 = b2; 599 tc1 = ZSWR4_CLK_X32; 600 } else { 601 err = e3; 602 rate1 = b3; 603 tc1 = ZSWR4_CLK_X64; 604 } 605 606 err = (err * 1000)/bps; 607 if (err < tol) { 608 tol = err; 609 src = i; 610 sf = xcs->cs_clocks[i].flags & ~ZSC_BRG; 611 tc0 = tc1; 612 rate0 = rate1; 613 } 614 } 615 } 616 #ifdef ZSMACDEBUG 617 zsprintf("Checking for rate %d. Found source #%d.\n",bps, src); 618 #endif 619 if (src == -1) 620 return (EINVAL); /* no can do */ 621 622 /* 623 * The M.I. layer likes to keep cs_brg_clk current, even though 624 * we are the only ones who should be touching the BRG's rate. 625 * 626 * Note: we are assuming that any ZSC_EXTERN signal source comes in 627 * on the RTxC pin. Correct for the mac68k obio zsc. 628 */ 629 if (sf & ZSC_EXTERN) 630 cs->cs_brg_clk = xcs->cs_clocks[i].clk >> 4; 631 else 632 cs->cs_brg_clk = PCLK / 16; 633 634 /* 635 * Now we have a source, so set it up. 636 */ 637 s = splzs(); 638 xcs->cs_psource = src; 639 xcs->cs_pclk_flag = sf; 640 bps = rate0; 641 if (sf & ZSC_BRG) { 642 cs->cs_preg[4] = ZSWR4_CLK_X16; 643 cs->cs_preg[11]= ZSWR11_RXCLK_BAUD | ZSWR11_TXCLK_BAUD; 644 if (sf & ZSC_PCLK) { 645 cs->cs_preg[14] = ZSWR14_BAUD_ENA | ZSWR14_BAUD_FROM_PCLK; 646 } else { 647 cs->cs_preg[14] = ZSWR14_BAUD_ENA; 648 } 649 tc = tc0; 650 } else { 651 cs->cs_preg[4] = tc0; 652 if (sf & ZSC_RTXDIV) { 653 cs->cs_preg[11] = ZSWR11_RXCLK_RTXC | ZSWR11_TXCLK_RTXC; 654 } else { 655 cs->cs_preg[11] = ZSWR11_RXCLK_TRXC | ZSWR11_TXCLK_TRXC; 656 } 657 cs->cs_preg[14]= 0; 658 tc = 0xffff; 659 } 660 /* Set the BAUD rate divisor. */ 661 cs->cs_preg[12] = tc; 662 cs->cs_preg[13] = tc >> 8; 663 splx(s); 664 665 #ifdef ZSMACDEBUG 666 zsprintf("Rate is %7d, tc is %7d, source no. %2d, flags %4x\n", \ 667 bps, tc, src, sf); 668 zsprintf("Registers are: 4 %x, 11 %x, 14 %x\n\n", 669 cs->cs_preg[4], cs->cs_preg[11], cs->cs_preg[14]); 670 #endif 671 672 cs->cs_preg[5] |= ZSWR5_RTS; /* Make sure the drivers are on! */ 673 674 /* Caller will stuff the pending registers. */ 675 return (0); 676 } 677 678 int 679 zs_set_modes(struct zs_chanstate *cs, int cflag) 680 { 681 struct xzs_chanstate *xcs = (void*)cs; 682 int s; 683 684 /* 685 * Make sure we don't enable hfc on a signal line we're ignoring. 686 * As we enable CTS interrupts only if we have CRTSCTS or CDTRCTS, 687 * this code also effectivly turns off ZSWR15_CTS_IE. 688 * 689 * Also, disable DCD interrupts if we've been told to ignore 690 * the DCD pin. Happens on mac68k because the input line for 691 * DCD can also be used as a clock input. (Just set CLOCAL.) 692 * 693 * If someone tries to turn an invalid flow mode on, Just Say No 694 * (Suggested by gwr) 695 */ 696 if ((cflag & CDTRCTS) && (cflag & (CRTSCTS | MDMBUF))) 697 return (EINVAL); 698 if (xcs->cs_hwflags & ZS_HWFLAG_NO_DCD) { 699 if (cflag & MDMBUF) 700 return (EINVAL); 701 cflag |= CLOCAL; 702 } 703 if ((xcs->cs_hwflags & ZS_HWFLAG_NO_CTS) && (cflag & (CRTSCTS | CDTRCTS))) 704 return (EINVAL); 705 706 /* 707 * Output hardware flow control on the chip is horrendous: 708 * if carrier detect drops, the receiver is disabled, and if 709 * CTS drops, the transmitter is stoped IN MID CHARACTER! 710 * Therefore, NEVER set the HFC bit, and instead use the 711 * status interrupt to detect CTS changes. 712 */ 713 s = splzs(); 714 if ((cflag & (CLOCAL | MDMBUF)) != 0) 715 cs->cs_rr0_dcd = 0; 716 else 717 cs->cs_rr0_dcd = ZSRR0_DCD; 718 /* 719 * The mac hardware only has one output, DTR (HSKo in Mac 720 * parlance). In HFC mode, we use it for the functions 721 * typically served by RTS and DTR on other ports, so we 722 * have to fake the upper layer out some. 723 * 724 * CRTSCTS we use CTS as an input which tells us when to shut up. 725 * We make no effort to shut up the other side of the connection. 726 * DTR is used to hang up the modem. 727 * 728 * In CDTRCTS, we use CTS to tell us to stop, but we use DTR to 729 * shut up the other side. 730 */ 731 if ((cflag & CRTSCTS) != 0) { 732 cs->cs_wr5_dtr = ZSWR5_DTR; 733 cs->cs_wr5_rts = 0; 734 cs->cs_rr0_cts = ZSRR0_CTS; 735 } else if ((cflag & CDTRCTS) != 0) { 736 cs->cs_wr5_dtr = 0; 737 cs->cs_wr5_rts = ZSWR5_DTR; 738 cs->cs_rr0_cts = ZSRR0_CTS; 739 } else if ((cflag & MDMBUF) != 0) { 740 cs->cs_wr5_dtr = 0; 741 cs->cs_wr5_rts = ZSWR5_DTR; 742 cs->cs_rr0_cts = ZSRR0_DCD; 743 } else { 744 cs->cs_wr5_dtr = ZSWR5_DTR; 745 cs->cs_wr5_rts = 0; 746 cs->cs_rr0_cts = 0; 747 } 748 splx(s); 749 750 /* Caller will stuff the pending registers. */ 751 return (0); 752 } 753 754 755 /* 756 * Read or write the chip with suitable delays. 757 * MacII hardware has the delay built in. 758 * No need for extra delay. :-) However, some clock-chirped 759 * macs, or zsc's on serial add-on boards might need it. 760 */ 761 #define ZS_DELAY() 762 763 uint8_t 764 zs_read_reg(struct zs_chanstate *cs, uint8_t reg) 765 { 766 uint8_t val; 767 768 out8(cs->cs_reg_csr, reg); 769 ZS_DELAY(); 770 val = in8(cs->cs_reg_csr); 771 ZS_DELAY(); 772 return val; 773 } 774 775 void 776 zs_write_reg(struct zs_chanstate *cs, uint8_t reg, uint8_t val) 777 { 778 out8(cs->cs_reg_csr, reg); 779 ZS_DELAY(); 780 out8(cs->cs_reg_csr, val); 781 ZS_DELAY(); 782 } 783 784 uint8_t 785 zs_read_csr(struct zs_chanstate *cs) 786 { 787 uint8_t val; 788 789 val = in8(cs->cs_reg_csr); 790 ZS_DELAY(); 791 /* make up for the fact CTS is wired backwards */ 792 val ^= ZSRR0_CTS; 793 return val; 794 } 795 796 void 797 zs_write_csr(struct zs_chanstate *cs, uint8_t val) 798 { 799 /* Note, the csr does not write CTS... */ 800 out8(cs->cs_reg_csr, val); 801 ZS_DELAY(); 802 } 803 804 uint8_t 805 zs_read_data(struct zs_chanstate *cs) 806 { 807 uint8_t val; 808 809 val = in8(cs->cs_reg_data); 810 ZS_DELAY(); 811 return val; 812 } 813 814 void 815 zs_write_data(struct zs_chanstate *cs, uint8_t val) 816 { 817 out8(cs->cs_reg_data, val); 818 ZS_DELAY(); 819 } 820 821 /**************************************************************** 822 * Console support functions (powermac specific!) 823 * Note: this code is allowed to know about the layout of 824 * the chip registers, and uses that to keep things simple. 825 * XXX - I think I like the mvme167 code better. -gwr 826 * XXX - Well :-P :-) -wrs 827 ****************************************************************/ 828 829 #define zscnpollc nullcnpollc 830 cons_decl(zs); 831 832 static int stdin, stdout; 833 834 /* 835 * Console functions. 836 */ 837 838 /* 839 * zscnprobe is the routine which gets called as the kernel is trying to 840 * figure out where the console should be. Each io driver which might 841 * be the console (as defined in mac68k/conf.c) gets probed. The probe 842 * fills in the consdev structure. Important parts are the device #, 843 * and the console priority. Values are CN_DEAD (don't touch me), 844 * CN_NORMAL (I'm here, but elsewhere might be better), CN_INTERNAL 845 * (the video, better than CN_NORMAL), and CN_REMOTE (pick me!) 846 * 847 * As the mac's a bit different, we do extra work here. We mainly check 848 * to see if we have serial echo going on. Also chould check for default 849 * speeds. 850 */ 851 852 /* 853 * Polled input char. 854 */ 855 int 856 zs_getc(void *v) 857 { 858 volatile struct zschan *zc = v; 859 int s, c, rr0; 860 861 s = splhigh(); 862 /* Wait for a character to arrive. */ 863 do { 864 rr0 = in8(&zc->zc_csr); 865 ZS_DELAY(); 866 } while ((rr0 & ZSRR0_RX_READY) == 0); 867 868 c = in8(&zc->zc_data); 869 ZS_DELAY(); 870 splx(s); 871 872 /* 873 * This is used by the kd driver to read scan codes, 874 * so don't translate '\r' ==> '\n' here... 875 */ 876 return (c); 877 } 878 879 /* 880 * Polled output char. 881 */ 882 void 883 zs_putc(void *v, int c) 884 { 885 volatile struct zschan *zc = v; 886 int s, rr0; 887 long wait = 0; 888 889 s = splhigh(); 890 /* Wait for transmitter to become ready. */ 891 do { 892 rr0 = in8(&zc->zc_csr); 893 ZS_DELAY(); 894 } while (((rr0 & ZSRR0_TX_READY) == 0) && (wait++ < 1000000)); 895 896 if ((rr0 & ZSRR0_TX_READY) != 0) { 897 out8(&zc->zc_data, c); 898 ZS_DELAY(); 899 } 900 splx(s); 901 } 902 903 904 /* 905 * Polled console input putchar. 906 */ 907 int 908 zscngetc(dev_t dev) 909 { 910 volatile struct zschan *zc = zs_conschan; 911 int c; 912 913 if (zc) { 914 c = zs_getc(__UNVOLATILE(zc)); 915 } else { 916 char ch = 0; 917 OF_read(stdin, &ch, 1); 918 c = ch; 919 } 920 return c; 921 } 922 923 /* 924 * Polled console output putchar. 925 */ 926 void 927 zscnputc(dev_t dev, int c) 928 { 929 volatile struct zschan *zc = zs_conschan; 930 931 if (zc) { 932 zs_putc(__UNVOLATILE(zc), c); 933 } else { 934 char ch = c; 935 OF_write(stdout, &ch, 1); 936 } 937 } 938 939 /* 940 * Handle user request to enter kernel debugger. 941 */ 942 void 943 zs_abort(struct zs_chanstate *cs) 944 { 945 volatile struct zschan *zc = zs_conschan; 946 int rr0; 947 long wait = 0; 948 949 if (zs_cons_canabort == 0) 950 return; 951 952 /* Wait for end of break to avoid PROM abort. */ 953 do { 954 rr0 = in8(&zc->zc_csr); 955 ZS_DELAY(); 956 } while ((rr0 & ZSRR0_BREAK) && (wait++ < ZSABORT_DELAY)); 957 958 if (wait > ZSABORT_DELAY) { 959 zs_cons_canabort = 0; 960 /* If we time out, turn off the abort ability! */ 961 } 962 963 #if defined(KGDB) 964 kgdb_connect(1); 965 #elif defined(DDB) 966 Debugger(); 967 #endif 968 } 969 970 extern int ofccngetc(dev_t); 971 extern void ofccnputc(dev_t, int); 972 973 struct consdev consdev_zs = { 974 zscnprobe, 975 zscninit, 976 zscngetc, 977 zscnputc, 978 zscnpollc, 979 }; 980 981 void 982 zscnprobe(struct consdev *cp) 983 { 984 int chosen, pkg; 985 char name[16]; 986 987 if ((chosen = OF_finddevice("/chosen")) == -1) 988 return; 989 990 if (OF_getprop(chosen, "stdin", &stdin, sizeof(stdin)) == -1) 991 return; 992 if (OF_getprop(chosen, "stdout", &stdout, sizeof(stdout)) == -1) 993 return; 994 995 if ((pkg = OF_instance_to_package(stdin)) == -1) 996 return; 997 998 memset(name, 0, sizeof(name)); 999 if (OF_getprop(pkg, "device_type", name, sizeof(name)) == -1) 1000 return; 1001 1002 if (strcmp(name, "serial") != 0) 1003 return; 1004 1005 memset(name, 0, sizeof(name)); 1006 if (OF_getprop(pkg, "name", name, sizeof(name)) == -1) 1007 return; 1008 1009 cp->cn_pri = CN_REMOTE; 1010 } 1011 1012 void 1013 zscninit(struct consdev *cp) 1014 { 1015 int escc, escc_ch, obio, zs_offset; 1016 u_int32_t reg[5]; 1017 char name[16]; 1018 1019 if ((escc_ch = OF_instance_to_package(stdin)) == -1) 1020 return; 1021 1022 memset(name, 0, sizeof(name)); 1023 if (OF_getprop(escc_ch, "name", name, sizeof(name)) == -1) 1024 return; 1025 1026 zs_conschannel = strcmp(name, "ch-b") == 0; 1027 1028 if (OF_getprop(escc_ch, "reg", reg, sizeof(reg)) < 4) 1029 return; 1030 zs_offset = reg[0]; 1031 1032 escc = OF_parent(escc_ch); 1033 obio = OF_parent(escc); 1034 1035 if (OF_getprop(obio, "assigned-addresses", reg, sizeof(reg)) < 12) 1036 return; 1037 zs_conschan = (void *)(reg[2] + zs_offset); 1038 } 1039