1 /* $NetBSD: zs.c,v 1.48 2008/12/07 08:24:26 tsutsui Exp $ */ 2 3 /* 4 * Copyright (c) 1996, 1998 Bill Studenmund 5 * Copyright (c) 1995 Gordon W. Ross 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. The name of the author may not be used to endorse or promote products 17 * derived from this software without specific prior written permission. 18 * 4. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by Gordon Ross 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 23 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 24 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 25 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 26 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 27 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 31 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 /* 35 * Zilog Z8530 Dual UART driver (machine-dependent part) 36 * 37 * Runs two serial lines per chip using slave drivers. 38 * Plain tty/async lines use the zs_async slave. 39 * Sun keyboard/mouse uses the zs_kbd/zs_ms slaves. 40 * Other ports use their own mice & keyboard slaves. 41 * 42 * Credits & history: 43 * 44 * With NetBSD 1.1, port-mac68k started using a port of the port-sparc 45 * (port-sun3?) zs.c driver (which was in turn based on code in the 46 * Berkeley 4.4 Lite release). Bill Studenmund did the port, with 47 * help from Allen Briggs and Gordon Ross <gwr@NetBSD.org>. Noud de 48 * Brouwer field-tested the driver at a local ISP. 49 * 50 * Bill Studenmund and Gordon Ross then ported the machine-independent 51 * z8530 driver to work with port-mac68k. NetBSD 1.2 contained an 52 * intermediate version (mac68k using a local, patched version of 53 * the m.i. drivers), with NetBSD 1.3 containing a full version. 54 */ 55 56 #include <sys/cdefs.h> 57 __KERNEL_RCSID(0, "$NetBSD: zs.c,v 1.48 2008/12/07 08:24:26 tsutsui Exp $"); 58 59 #include "opt_ddb.h" 60 #include "opt_kgdb.h" 61 62 #include <sys/param.h> 63 #include <sys/systm.h> 64 #include <sys/proc.h> 65 #include <sys/device.h> 66 #include <sys/conf.h> 67 #include <sys/file.h> 68 #include <sys/ioctl.h> 69 #include <sys/tty.h> 70 #include <sys/time.h> 71 #include <sys/kernel.h> 72 #include <sys/syslog.h> 73 #include <sys/intr.h> 74 #include <sys/cpu.h> 75 #ifdef KGDB 76 #include <sys/kgdb.h> 77 #endif 78 79 #include <dev/cons.h> 80 #include <dev/ofw/openfirm.h> 81 #include <dev/ic/z8530reg.h> 82 83 #include <machine/z8530var.h> 84 #include <machine/autoconf.h> 85 #include <machine/pio.h> 86 87 /* Are these in a header file anywhere? */ 88 /* Booter flags interface */ 89 #define ZSMAC_RAW 0x01 90 #define ZSMAC_LOCALTALK 0x02 91 92 /* 93 * Some warts needed by z8530tty.c - 94 */ 95 int zs_def_cflag = (CREAD | CS8 | HUPCL); 96 97 /* 98 * abort detection on console will now timeout after iterating on a loop 99 * the following # of times. Cheep hack. Also, abort detection is turned 100 * off after a timeout (i.e. maybe there's not a terminal hooked up). 101 */ 102 #define ZSABORT_DELAY 3000000 103 104 struct zsdevice { 105 /* Yes, they are backwards. */ 106 struct zschan zs_chan_b; 107 struct zschan zs_chan_a; 108 }; 109 110 static int zs_defspeed[2] = { 111 38400, /* ttyZ0 */ 112 38400, /* ttyZ1 */ 113 }; 114 115 /* console stuff */ 116 void *zs_conschan = 0; 117 int zs_conschannel = -1; 118 #ifdef ZS_CONSOLE_ABORT 119 int zs_cons_canabort = 1; 120 #else 121 int zs_cons_canabort = 0; 122 #endif /* ZS_CONSOLE_ABORT*/ 123 124 /* device to which the console is attached--if serial. */ 125 /* Mac stuff */ 126 127 static int zs_get_speed(struct zs_chanstate *); 128 129 /* 130 * Even though zsparam will set up the clock multiples, etc., we 131 * still set them here as: 1) mice & keyboards don't use zsparam, 132 * and 2) the console stuff uses these defaults before device 133 * attach. 134 */ 135 136 static uint8_t zs_init_reg[16] = { 137 0, /* 0: CMD (reset, etc.) */ 138 0, /* 1: No interrupts yet. */ 139 0, /* IVECT */ 140 ZSWR3_RX_8 | ZSWR3_RX_ENABLE, 141 ZSWR4_CLK_X16 | ZSWR4_ONESB | ZSWR4_EVENP, 142 ZSWR5_TX_8 | ZSWR5_TX_ENABLE, 143 0, /* 6: TXSYNC/SYNCLO */ 144 0, /* 7: RXSYNC/SYNCHI */ 145 0, /* 8: alias for data port */ 146 ZSWR9_MASTER_IE, 147 0, /*10: Misc. TX/RX control bits */ 148 ZSWR11_TXCLK_BAUD | ZSWR11_RXCLK_BAUD, 149 ((PCLK/32)/38400)-2, /*12: BAUDLO (default=38400) */ 150 0, /*13: BAUDHI (default=38400) */ 151 ZSWR14_BAUD_ENA, 152 ZSWR15_BREAK_IE, 153 }; 154 155 /**************************************************************** 156 * Autoconfig 157 ****************************************************************/ 158 159 /* Definition of the driver for autoconfig. */ 160 static int zsc_match(device_t, cfdata_t, void *); 161 static void zsc_attach(device_t, device_t, void *); 162 static int zsc_print(void *, const char *); 163 164 CFATTACH_DECL_NEW(zsc, sizeof(struct zsc_softc), 165 zsc_match, zsc_attach, NULL, NULL); 166 167 extern struct cfdriver zsc_cd; 168 169 int zsc_attached; 170 171 int zshard(void *); 172 #ifdef ZS_TXDMA 173 static int zs_txdma_int(void *); 174 #endif 175 176 void zscnprobe(struct consdev *); 177 void zscninit(struct consdev *); 178 int zscngetc(dev_t); 179 void zscnputc(dev_t, int); 180 void zscnpollc(dev_t, int); 181 182 /* 183 * Is the zs chip present? 184 */ 185 static int 186 zsc_match(device_t parent, cfdata_t cf, void *aux) 187 { 188 struct confargs *ca = aux; 189 190 if (strcmp(ca->ca_name, "escc") != 0) 191 return 0; 192 193 if (zsc_attached) 194 return 0; 195 196 return 1; 197 } 198 199 /* 200 * Attach a found zs. 201 * 202 * Match slave number to zs unit number, so that misconfiguration will 203 * not set up the keyboard as ttya, etc. 204 */ 205 static void 206 zsc_attach(device_t parent, device_t self, void *aux) 207 { 208 struct zsc_softc *zsc = device_private(self); 209 struct confargs *ca = aux; 210 struct zsc_attach_args zsc_args; 211 volatile struct zschan *zc; 212 struct xzs_chanstate *xcs; 213 struct zs_chanstate *cs; 214 struct zsdevice *zsd; 215 int channel; 216 int s, chip, theflags; 217 int node, intr[2][3]; 218 u_int regs[6]; 219 220 zsc_attached = 1; 221 222 zsc->zsc_dev = self; 223 224 chip = 0; 225 ca->ca_reg[0] += ca->ca_baseaddr; 226 zsd = mapiodev(ca->ca_reg[0], ca->ca_reg[1]); 227 228 node = OF_child(ca->ca_node); /* ch-a */ 229 230 for (channel = 0; channel < 2; channel++) { 231 if (OF_getprop(node, "AAPL,interrupts", 232 intr[channel], sizeof(intr[0])) == -1 && 233 OF_getprop(node, "interrupts", 234 intr[channel], sizeof(intr[0])) == -1) { 235 aprint_error(": cannot find interrupt property\n"); 236 return; 237 } 238 239 if (OF_getprop(node, "reg", regs, sizeof(regs)) < 24) { 240 aprint_error(": cannot find reg property\n"); 241 return; 242 } 243 regs[2] += ca->ca_baseaddr; 244 regs[4] += ca->ca_baseaddr; 245 #ifdef ZS_TXDMA 246 zsc->zsc_txdmareg[channel] = mapiodev(regs[2], regs[3]); 247 zsc->zsc_txdmacmd[channel] = 248 dbdma_alloc(sizeof(dbdma_command_t) * 3); 249 memset(zsc->zsc_txdmacmd[channel], 0, 250 sizeof(dbdma_command_t) * 3); 251 dbdma_reset(zsc->zsc_txdmareg[channel]); 252 #endif 253 node = OF_peer(node); /* ch-b */ 254 } 255 256 aprint_normal(" irq %d,%d\n", intr[0][0], intr[1][0]); 257 258 /* 259 * Initialize software state for each channel. 260 */ 261 for (channel = 0; channel < 2; channel++) { 262 zsc_args.channel = channel; 263 zsc_args.hwflags = (channel == zs_conschannel ? 264 ZS_HWFLAG_CONSOLE : 0); 265 xcs = &zsc->xzsc_xcs_store[channel]; 266 cs = &xcs->xzs_cs; 267 zsc->zsc_cs[channel] = cs; 268 269 zs_lock_init(cs); 270 cs->cs_channel = channel; 271 cs->cs_private = NULL; 272 cs->cs_ops = &zsops_null; 273 274 zc = (channel == 0) ? &zsd->zs_chan_a : &zsd->zs_chan_b; 275 276 cs->cs_reg_csr = &zc->zc_csr; 277 cs->cs_reg_data = &zc->zc_data; 278 279 memcpy(cs->cs_creg, zs_init_reg, 16); 280 memcpy(cs->cs_preg, zs_init_reg, 16); 281 282 /* Current BAUD rate generator clock. */ 283 cs->cs_brg_clk = PCLK / 16; /* RTxC is 230400*16, so use 230400 */ 284 if (zsc_args.hwflags & ZS_HWFLAG_CONSOLE) 285 cs->cs_defspeed = zs_get_speed(cs); 286 else 287 cs->cs_defspeed = zs_defspeed[channel]; 288 cs->cs_defcflag = zs_def_cflag; 289 290 /* Make these correspond to cs_defcflag (-crtscts) */ 291 cs->cs_rr0_dcd = ZSRR0_DCD; 292 cs->cs_rr0_cts = 0; 293 cs->cs_wr5_dtr = ZSWR5_DTR; 294 cs->cs_wr5_rts = 0; 295 296 #ifdef __notyet__ 297 cs->cs_slave_type = ZS_SLAVE_NONE; 298 #endif 299 300 /* Define BAUD rate stuff. */ 301 xcs->cs_clocks[0].clk = PCLK; 302 xcs->cs_clocks[0].flags = ZSC_RTXBRG | ZSC_RTXDIV; 303 xcs->cs_clocks[1].flags = 304 ZSC_RTXBRG | ZSC_RTXDIV | ZSC_VARIABLE | ZSC_EXTERN; 305 xcs->cs_clocks[2].flags = ZSC_TRXDIV | ZSC_VARIABLE; 306 xcs->cs_clock_count = 3; 307 if (channel == 0) { 308 theflags = 0; /*mac68k_machine.modem_flags;*/ 309 /*xcs->cs_clocks[1].clk = mac68k_machine.modem_dcd_clk;*/ 310 /*xcs->cs_clocks[2].clk = mac68k_machine.modem_cts_clk;*/ 311 xcs->cs_clocks[1].clk = 0; 312 xcs->cs_clocks[2].clk = 0; 313 } else { 314 theflags = 0; /*mac68k_machine.print_flags;*/ 315 xcs->cs_clocks[1].flags = ZSC_VARIABLE; 316 /* 317 * Yes, we aren't defining ANY clock source enables for the 318 * printer's DCD clock in. The hardware won't let us 319 * use it. But a clock will freak out the chip, so we 320 * let you set it, telling us to bar interrupts on the line. 321 */ 322 /*xcs->cs_clocks[1].clk = mac68k_machine.print_dcd_clk;*/ 323 /*xcs->cs_clocks[2].clk = mac68k_machine.print_cts_clk;*/ 324 xcs->cs_clocks[1].clk = 0; 325 xcs->cs_clocks[2].clk = 0; 326 } 327 if (xcs->cs_clocks[1].clk) 328 zsc_args.hwflags |= ZS_HWFLAG_NO_DCD; 329 if (xcs->cs_clocks[2].clk) 330 zsc_args.hwflags |= ZS_HWFLAG_NO_CTS; 331 332 /* Set defaults in our "extended" chanstate. */ 333 xcs->cs_csource = 0; 334 xcs->cs_psource = 0; 335 xcs->cs_cclk_flag = 0; /* Nothing fancy by default */ 336 xcs->cs_pclk_flag = 0; 337 338 if (theflags & ZSMAC_RAW) { 339 zsc_args.hwflags |= ZS_HWFLAG_RAW; 340 printf(" (raw defaults)"); 341 } 342 343 /* 344 * XXX - This might be better done with a "stub" driver 345 * (to replace zstty) that ignores LocalTalk for now. 346 */ 347 if (theflags & ZSMAC_LOCALTALK) { 348 printf(" shielding from LocalTalk"); 349 cs->cs_defspeed = 1; 350 cs->cs_creg[ZSRR_BAUDLO] = cs->cs_preg[ZSRR_BAUDLO] = 0xff; 351 cs->cs_creg[ZSRR_BAUDHI] = cs->cs_preg[ZSRR_BAUDHI] = 0xff; 352 zs_write_reg(cs, ZSRR_BAUDLO, 0xff); 353 zs_write_reg(cs, ZSRR_BAUDHI, 0xff); 354 /* 355 * If we might have LocalTalk, then make sure we have the 356 * Baud rate low-enough to not do any damage. 357 */ 358 } 359 360 /* 361 * We used to disable chip interrupts here, but we now 362 * do that in zscnprobe, just in case MacOS left the chip on. 363 */ 364 365 xcs->cs_chip = chip; 366 367 /* Stash away a copy of the final H/W flags. */ 368 xcs->cs_hwflags = zsc_args.hwflags; 369 370 /* 371 * Look for a child driver for this channel. 372 * The child attach will setup the hardware. 373 */ 374 if (!config_found(self, (void *)&zsc_args, zsc_print)) { 375 /* No sub-driver. Just reset it. */ 376 uint8_t reset = (channel == 0) ? 377 ZSWR9_A_RESET : ZSWR9_B_RESET; 378 s = splzs(); 379 zs_write_reg(cs, 9, reset); 380 splx(s); 381 } 382 } 383 384 /* XXX - Now safe to install interrupt handlers. */ 385 intr_establish(intr[0][0], IST_EDGE, IPL_TTY, zshard, zsc); 386 intr_establish(intr[1][0], IST_EDGE, IPL_TTY, zshard, zsc); 387 #ifdef ZS_TXDMA 388 intr_establish(intr[0][1], IST_EDGE, IPL_TTY, zs_txdma_int, (void *)0); 389 intr_establish(intr[1][1], IST_EDGE, IPL_TTY, zs_txdma_int, (void *)1); 390 #endif 391 392 zsc->zsc_si = softint_establish(SOFTINT_SERIAL, 393 (void (*)(void *)) zsc_intr_soft, zsc); 394 395 /* 396 * Set the master interrupt enable and interrupt vector. 397 * (common to both channels, do it on A) 398 */ 399 cs = zsc->zsc_cs[0]; 400 s = splzs(); 401 /* interrupt vector */ 402 zs_write_reg(cs, 2, zs_init_reg[2]); 403 /* master interrupt control (enable) */ 404 zs_write_reg(cs, 9, zs_init_reg[9]); 405 splx(s); 406 } 407 408 static int 409 zsc_print(void *aux, const char *name) 410 { 411 struct zsc_attach_args *args = aux; 412 413 if (name != NULL) 414 aprint_normal("%s: ", name); 415 416 if (args->channel != -1) 417 aprint_normal(" channel %d", args->channel); 418 419 return UNCONF; 420 } 421 422 int 423 zsmdioctl(struct zs_chanstate *cs, u_long cmd, void *data) 424 { 425 switch (cmd) { 426 default: 427 return (EPASSTHROUGH); 428 } 429 return (0); 430 } 431 432 void 433 zsmd_setclock(struct zs_chanstate *cs) 434 { 435 #ifdef NOTYET 436 struct xzs_chanstate *xcs = (void *)cs; 437 438 if (cs->cs_channel != 0) 439 return; 440 441 /* 442 * If the new clock has the external bit set, then select the 443 * external source. 444 */ 445 via_set_modem((xcs->cs_pclk_flag & ZSC_EXTERN) ? 1 : 0); 446 #endif 447 } 448 449 int 450 zshard(void *arg) 451 { 452 struct zsc_softc *zsc; 453 int rval; 454 455 zsc = arg; 456 rval = zsc_intr_hard(zsc); 457 if ((zsc->zsc_cs[0]->cs_softreq) || (zsc->zsc_cs[1]->cs_softreq)) 458 softint_schedule(zsc->zsc_si); 459 460 return rval; 461 } 462 463 #ifdef ZS_TXDMA 464 int 465 zs_txdma_int(void *arg) 466 { 467 int ch = (int)arg; 468 struct zsc_softc *zsc; 469 struct zs_chanstate *cs; 470 471 zsc = device_lookup_private(&zsc_cd, ch); 472 if (zsc == NULL) 473 panic("zs_txdma_int"); 474 475 cs = zsc->zsc_cs[ch]; 476 zstty_txdma_int(cs); 477 478 if (cs->cs_softreq) 479 softint_schedule(zsc->zsc_si); 480 481 return 1; 482 } 483 484 void 485 zs_dma_setup(struct zs_chanstate *cs, void *pa, int len) 486 { 487 struct zsc_softc *zsc; 488 dbdma_command_t *cmdp; 489 int ch = cs->cs_channel; 490 491 zsc = device_lookup_private(&zsc_cd, ch); 492 cmdp = zsc->zsc_txdmacmd[ch]; 493 494 DBDMA_BUILD(cmdp, DBDMA_CMD_OUT_LAST, 0, len, kvtop(pa), 495 DBDMA_INT_ALWAYS, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER); 496 cmdp++; 497 DBDMA_BUILD(cmdp, DBDMA_CMD_STOP, 0, 0, 0, 498 DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER); 499 500 __asm volatile("eieio"); 501 502 dbdma_start(zsc->zsc_txdmareg[ch], zsc->zsc_txdmacmd[ch]); 503 } 504 #endif 505 506 /* 507 * Compute the current baud rate given a ZS channel. 508 * XXX Assume internal BRG. 509 */ 510 int 511 zs_get_speed(struct zs_chanstate *cs) 512 { 513 int tconst; 514 515 tconst = zs_read_reg(cs, 12); 516 tconst |= zs_read_reg(cs, 13) << 8; 517 return TCONST_TO_BPS(cs->cs_brg_clk, tconst); 518 } 519 520 #ifndef ZS_TOLERANCE 521 #define ZS_TOLERANCE 51 522 /* 5% in tenths of a %, plus 1 so that exactly 5% will be ok. */ 523 #endif 524 525 /* 526 * Search through the signal sources in the channel, and 527 * pick the best one for the baud rate requested. Return 528 * a -1 if not achievable in tolerance. Otherwise return 0 529 * and fill in the values. 530 * 531 * This routine draws inspiration from the Atari port's zs.c 532 * driver in NetBSD 1.1 which did the same type of source switching. 533 * Tolerance code inspired by comspeed routine in isa/com.c. 534 * 535 * By Bill Studenmund, 1996-05-12 536 */ 537 int 538 zs_set_speed(struct zs_chanstate *cs, int bps) 539 { 540 struct xzs_chanstate *xcs = (void *) cs; 541 int i, tc, tc0 = 0, tc1, s, sf = 0; 542 int src, rate0, rate1, err, tol; 543 544 if (bps == 0) 545 return (0); 546 547 src = -1; /* no valid source yet */ 548 tol = ZS_TOLERANCE; 549 550 /* 551 * Step through all the sources and see which one matches 552 * the best. A source has to match BETTER than tol to be chosen. 553 * Thus if two sources give the same error, the first one will be 554 * chosen. Also, allow for the possability that one source might run 555 * both the BRG and the direct divider (i.e. RTxC). 556 */ 557 for (i = 0; i < xcs->cs_clock_count; i++) { 558 if (xcs->cs_clocks[i].clk <= 0) 559 continue; /* skip non-existent or bad clocks */ 560 if (xcs->cs_clocks[i].flags & ZSC_BRG) { 561 /* check out BRG at /16 */ 562 tc1 = BPS_TO_TCONST(xcs->cs_clocks[i].clk >> 4, bps); 563 if (tc1 >= 0) { 564 rate1 = TCONST_TO_BPS(xcs->cs_clocks[i].clk >> 4, tc1); 565 err = abs(((rate1 - bps)*1000)/bps); 566 if (err < tol) { 567 tol = err; 568 src = i; 569 sf = xcs->cs_clocks[i].flags & ~ZSC_DIV; 570 tc0 = tc1; 571 rate0 = rate1; 572 } 573 } 574 } 575 if (xcs->cs_clocks[i].flags & ZSC_DIV) { 576 /* 577 * Check out either /1, /16, /32, or /64 578 * Note: for /1, you'd better be using a synchronized 579 * clock! 580 */ 581 int b0 = xcs->cs_clocks[i].clk, e0 = abs(b0-bps); 582 int b1 = b0 >> 4, e1 = abs(b1-bps); 583 int b2 = b1 >> 1, e2 = abs(b2-bps); 584 int b3 = b2 >> 1, e3 = abs(b3-bps); 585 586 if (e0 < e1 && e0 < e2 && e0 < e3) { 587 err = e0; 588 rate1 = b0; 589 tc1 = ZSWR4_CLK_X1; 590 } else if (e0 > e1 && e1 < e2 && e1 < e3) { 591 err = e1; 592 rate1 = b1; 593 tc1 = ZSWR4_CLK_X16; 594 } else if (e0 > e2 && e1 > e2 && e2 < e3) { 595 err = e2; 596 rate1 = b2; 597 tc1 = ZSWR4_CLK_X32; 598 } else { 599 err = e3; 600 rate1 = b3; 601 tc1 = ZSWR4_CLK_X64; 602 } 603 604 err = (err * 1000)/bps; 605 if (err < tol) { 606 tol = err; 607 src = i; 608 sf = xcs->cs_clocks[i].flags & ~ZSC_BRG; 609 tc0 = tc1; 610 rate0 = rate1; 611 } 612 } 613 } 614 #ifdef ZSMACDEBUG 615 zsprintf("Checking for rate %d. Found source #%d.\n",bps, src); 616 #endif 617 if (src == -1) 618 return (EINVAL); /* no can do */ 619 620 /* 621 * The M.I. layer likes to keep cs_brg_clk current, even though 622 * we are the only ones who should be touching the BRG's rate. 623 * 624 * Note: we are assuming that any ZSC_EXTERN signal source comes in 625 * on the RTxC pin. Correct for the mac68k obio zsc. 626 */ 627 if (sf & ZSC_EXTERN) 628 cs->cs_brg_clk = xcs->cs_clocks[i].clk >> 4; 629 else 630 cs->cs_brg_clk = PCLK / 16; 631 632 /* 633 * Now we have a source, so set it up. 634 */ 635 s = splzs(); 636 xcs->cs_psource = src; 637 xcs->cs_pclk_flag = sf; 638 bps = rate0; 639 if (sf & ZSC_BRG) { 640 cs->cs_preg[4] = ZSWR4_CLK_X16; 641 cs->cs_preg[11]= ZSWR11_RXCLK_BAUD | ZSWR11_TXCLK_BAUD; 642 if (sf & ZSC_PCLK) { 643 cs->cs_preg[14] = ZSWR14_BAUD_ENA | ZSWR14_BAUD_FROM_PCLK; 644 } else { 645 cs->cs_preg[14] = ZSWR14_BAUD_ENA; 646 } 647 tc = tc0; 648 } else { 649 cs->cs_preg[4] = tc0; 650 if (sf & ZSC_RTXDIV) { 651 cs->cs_preg[11] = ZSWR11_RXCLK_RTXC | ZSWR11_TXCLK_RTXC; 652 } else { 653 cs->cs_preg[11] = ZSWR11_RXCLK_TRXC | ZSWR11_TXCLK_TRXC; 654 } 655 cs->cs_preg[14]= 0; 656 tc = 0xffff; 657 } 658 /* Set the BAUD rate divisor. */ 659 cs->cs_preg[12] = tc; 660 cs->cs_preg[13] = tc >> 8; 661 splx(s); 662 663 #ifdef ZSMACDEBUG 664 zsprintf("Rate is %7d, tc is %7d, source no. %2d, flags %4x\n", \ 665 bps, tc, src, sf); 666 zsprintf("Registers are: 4 %x, 11 %x, 14 %x\n\n", 667 cs->cs_preg[4], cs->cs_preg[11], cs->cs_preg[14]); 668 #endif 669 670 cs->cs_preg[5] |= ZSWR5_RTS; /* Make sure the drivers are on! */ 671 672 /* Caller will stuff the pending registers. */ 673 return (0); 674 } 675 676 int 677 zs_set_modes(struct zs_chanstate *cs, int cflag) 678 { 679 struct xzs_chanstate *xcs = (void*)cs; 680 int s; 681 682 /* 683 * Make sure we don't enable hfc on a signal line we're ignoring. 684 * As we enable CTS interrupts only if we have CRTSCTS or CDTRCTS, 685 * this code also effectivly turns off ZSWR15_CTS_IE. 686 * 687 * Also, disable DCD interrupts if we've been told to ignore 688 * the DCD pin. Happens on mac68k because the input line for 689 * DCD can also be used as a clock input. (Just set CLOCAL.) 690 * 691 * If someone tries to turn an invalid flow mode on, Just Say No 692 * (Suggested by gwr) 693 */ 694 if ((cflag & CDTRCTS) && (cflag & (CRTSCTS | MDMBUF))) 695 return (EINVAL); 696 if (xcs->cs_hwflags & ZS_HWFLAG_NO_DCD) { 697 if (cflag & MDMBUF) 698 return (EINVAL); 699 cflag |= CLOCAL; 700 } 701 if ((xcs->cs_hwflags & ZS_HWFLAG_NO_CTS) && (cflag & (CRTSCTS | CDTRCTS))) 702 return (EINVAL); 703 704 /* 705 * Output hardware flow control on the chip is horrendous: 706 * if carrier detect drops, the receiver is disabled, and if 707 * CTS drops, the transmitter is stoped IN MID CHARACTER! 708 * Therefore, NEVER set the HFC bit, and instead use the 709 * status interrupt to detect CTS changes. 710 */ 711 s = splzs(); 712 if ((cflag & (CLOCAL | MDMBUF)) != 0) 713 cs->cs_rr0_dcd = 0; 714 else 715 cs->cs_rr0_dcd = ZSRR0_DCD; 716 /* 717 * The mac hardware only has one output, DTR (HSKo in Mac 718 * parlance). In HFC mode, we use it for the functions 719 * typically served by RTS and DTR on other ports, so we 720 * have to fake the upper layer out some. 721 * 722 * CRTSCTS we use CTS as an input which tells us when to shut up. 723 * We make no effort to shut up the other side of the connection. 724 * DTR is used to hang up the modem. 725 * 726 * In CDTRCTS, we use CTS to tell us to stop, but we use DTR to 727 * shut up the other side. 728 */ 729 if ((cflag & CRTSCTS) != 0) { 730 cs->cs_wr5_dtr = ZSWR5_DTR; 731 cs->cs_wr5_rts = 0; 732 cs->cs_rr0_cts = ZSRR0_CTS; 733 } else if ((cflag & CDTRCTS) != 0) { 734 cs->cs_wr5_dtr = 0; 735 cs->cs_wr5_rts = ZSWR5_DTR; 736 cs->cs_rr0_cts = ZSRR0_CTS; 737 } else if ((cflag & MDMBUF) != 0) { 738 cs->cs_wr5_dtr = 0; 739 cs->cs_wr5_rts = ZSWR5_DTR; 740 cs->cs_rr0_cts = ZSRR0_DCD; 741 } else { 742 cs->cs_wr5_dtr = ZSWR5_DTR; 743 cs->cs_wr5_rts = 0; 744 cs->cs_rr0_cts = 0; 745 } 746 splx(s); 747 748 /* Caller will stuff the pending registers. */ 749 return (0); 750 } 751 752 753 /* 754 * Read or write the chip with suitable delays. 755 * MacII hardware has the delay built in. 756 * No need for extra delay. :-) However, some clock-chirped 757 * macs, or zsc's on serial add-on boards might need it. 758 */ 759 #define ZS_DELAY() 760 761 uint8_t 762 zs_read_reg(struct zs_chanstate *cs, uint8_t reg) 763 { 764 uint8_t val; 765 766 out8(cs->cs_reg_csr, reg); 767 ZS_DELAY(); 768 val = in8(cs->cs_reg_csr); 769 ZS_DELAY(); 770 return val; 771 } 772 773 void 774 zs_write_reg(struct zs_chanstate *cs, uint8_t reg, uint8_t val) 775 { 776 out8(cs->cs_reg_csr, reg); 777 ZS_DELAY(); 778 out8(cs->cs_reg_csr, val); 779 ZS_DELAY(); 780 } 781 782 uint8_t 783 zs_read_csr(struct zs_chanstate *cs) 784 { 785 uint8_t val; 786 787 val = in8(cs->cs_reg_csr); 788 ZS_DELAY(); 789 /* make up for the fact CTS is wired backwards */ 790 val ^= ZSRR0_CTS; 791 return val; 792 } 793 794 void 795 zs_write_csr(struct zs_chanstate *cs, uint8_t val) 796 { 797 /* Note, the csr does not write CTS... */ 798 out8(cs->cs_reg_csr, val); 799 ZS_DELAY(); 800 } 801 802 uint8_t 803 zs_read_data(struct zs_chanstate *cs) 804 { 805 uint8_t val; 806 807 val = in8(cs->cs_reg_data); 808 ZS_DELAY(); 809 return val; 810 } 811 812 void 813 zs_write_data(struct zs_chanstate *cs, uint8_t val) 814 { 815 out8(cs->cs_reg_data, val); 816 ZS_DELAY(); 817 } 818 819 /**************************************************************** 820 * Console support functions (powermac specific!) 821 * Note: this code is allowed to know about the layout of 822 * the chip registers, and uses that to keep things simple. 823 * XXX - I think I like the mvme167 code better. -gwr 824 * XXX - Well :-P :-) -wrs 825 ****************************************************************/ 826 827 #define zscnpollc nullcnpollc 828 cons_decl(zs); 829 830 static int stdin, stdout; 831 832 /* 833 * Console functions. 834 */ 835 836 /* 837 * zscnprobe is the routine which gets called as the kernel is trying to 838 * figure out where the console should be. Each io driver which might 839 * be the console (as defined in mac68k/conf.c) gets probed. The probe 840 * fills in the consdev structure. Important parts are the device #, 841 * and the console priority. Values are CN_DEAD (don't touch me), 842 * CN_NORMAL (I'm here, but elsewhere might be better), CN_INTERNAL 843 * (the video, better than CN_NORMAL), and CN_REMOTE (pick me!) 844 * 845 * As the mac's a bit different, we do extra work here. We mainly check 846 * to see if we have serial echo going on. Also chould check for default 847 * speeds. 848 */ 849 850 /* 851 * Polled input char. 852 */ 853 int 854 zs_getc(void *v) 855 { 856 volatile struct zschan *zc = v; 857 int s, c, rr0; 858 859 s = splhigh(); 860 /* Wait for a character to arrive. */ 861 do { 862 rr0 = in8(&zc->zc_csr); 863 ZS_DELAY(); 864 } while ((rr0 & ZSRR0_RX_READY) == 0); 865 866 c = in8(&zc->zc_data); 867 ZS_DELAY(); 868 splx(s); 869 870 /* 871 * This is used by the kd driver to read scan codes, 872 * so don't translate '\r' ==> '\n' here... 873 */ 874 return (c); 875 } 876 877 /* 878 * Polled output char. 879 */ 880 void 881 zs_putc(void *v, int c) 882 { 883 volatile struct zschan *zc = v; 884 int s, rr0; 885 long wait = 0; 886 887 s = splhigh(); 888 /* Wait for transmitter to become ready. */ 889 do { 890 rr0 = in8(&zc->zc_csr); 891 ZS_DELAY(); 892 } while (((rr0 & ZSRR0_TX_READY) == 0) && (wait++ < 1000000)); 893 894 if ((rr0 & ZSRR0_TX_READY) != 0) { 895 out8(&zc->zc_data, c); 896 ZS_DELAY(); 897 } 898 splx(s); 899 } 900 901 902 /* 903 * Polled console input putchar. 904 */ 905 int 906 zscngetc(dev_t dev) 907 { 908 volatile struct zschan *zc = zs_conschan; 909 int c; 910 911 if (zc) { 912 c = zs_getc(__UNVOLATILE(zc)); 913 } else { 914 char ch = 0; 915 OF_read(stdin, &ch, 1); 916 c = ch; 917 } 918 return c; 919 } 920 921 /* 922 * Polled console output putchar. 923 */ 924 void 925 zscnputc(dev_t dev, int c) 926 { 927 volatile struct zschan *zc = zs_conschan; 928 929 if (zc) { 930 zs_putc(__UNVOLATILE(zc), c); 931 } else { 932 char ch = c; 933 OF_write(stdout, &ch, 1); 934 } 935 } 936 937 /* 938 * Handle user request to enter kernel debugger. 939 */ 940 void 941 zs_abort(struct zs_chanstate *cs) 942 { 943 volatile struct zschan *zc = zs_conschan; 944 int rr0; 945 long wait = 0; 946 947 if (zs_cons_canabort == 0) 948 return; 949 950 /* Wait for end of break to avoid PROM abort. */ 951 do { 952 rr0 = in8(&zc->zc_csr); 953 ZS_DELAY(); 954 } while ((rr0 & ZSRR0_BREAK) && (wait++ < ZSABORT_DELAY)); 955 956 if (wait > ZSABORT_DELAY) { 957 zs_cons_canabort = 0; 958 /* If we time out, turn off the abort ability! */ 959 } 960 961 #if defined(KGDB) 962 kgdb_connect(1); 963 #elif defined(DDB) 964 Debugger(); 965 #endif 966 } 967 968 extern int ofccngetc(dev_t); 969 extern void ofccnputc(dev_t, int); 970 971 struct consdev consdev_zs = { 972 zscnprobe, 973 zscninit, 974 zscngetc, 975 zscnputc, 976 zscnpollc, 977 }; 978 979 void 980 zscnprobe(struct consdev *cp) 981 { 982 int chosen, pkg; 983 char name[16]; 984 985 if ((chosen = OF_finddevice("/chosen")) == -1) 986 return; 987 988 if (OF_getprop(chosen, "stdin", &stdin, sizeof(stdin)) == -1) 989 return; 990 if (OF_getprop(chosen, "stdout", &stdout, sizeof(stdout)) == -1) 991 return; 992 993 if ((pkg = OF_instance_to_package(stdin)) == -1) 994 return; 995 996 memset(name, 0, sizeof(name)); 997 if (OF_getprop(pkg, "device_type", name, sizeof(name)) == -1) 998 return; 999 1000 if (strcmp(name, "serial") != 0) 1001 return; 1002 1003 memset(name, 0, sizeof(name)); 1004 if (OF_getprop(pkg, "name", name, sizeof(name)) == -1) 1005 return; 1006 1007 cp->cn_pri = CN_REMOTE; 1008 } 1009 1010 void 1011 zscninit(struct consdev *cp) 1012 { 1013 int escc, escc_ch, obio, zs_offset; 1014 u_int32_t reg[5]; 1015 char name[16]; 1016 1017 if ((escc_ch = OF_instance_to_package(stdin)) == -1) 1018 return; 1019 1020 memset(name, 0, sizeof(name)); 1021 if (OF_getprop(escc_ch, "name", name, sizeof(name)) == -1) 1022 return; 1023 1024 zs_conschannel = strcmp(name, "ch-b") == 0; 1025 1026 if (OF_getprop(escc_ch, "reg", reg, sizeof(reg)) < 4) 1027 return; 1028 zs_offset = reg[0]; 1029 1030 escc = OF_parent(escc_ch); 1031 obio = OF_parent(escc); 1032 1033 if (OF_getprop(obio, "assigned-addresses", reg, sizeof(reg)) < 12) 1034 return; 1035 zs_conschan = (void *)(reg[2] + zs_offset); 1036 } 1037