xref: /netbsd-src/sys/arch/macppc/dev/kauai.c (revision d710132b4b8ce7f7cccaaf660cb16aa16b4077a0)
1 /*	$NetBSD: kauai.c,v 1.1 2003/06/11 07:35:39 hamajima Exp $	*/
2 
3 /*-
4  * Copyright (c) 2003 Tsubai Masanari.  All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  * 3. The name of the author may not be used to endorse or promote products
15  *    derived from this software without specific prior written permission.
16  *
17  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27  */
28 
29 #include <sys/param.h>
30 #include <sys/systm.h>
31 #include <sys/device.h>
32 #include <sys/malloc.h>
33 
34 #include <uvm/uvm_extern.h>
35 
36 #include <machine/bus.h>
37 
38 #include <dev/ata/atareg.h>
39 #include <dev/ata/atavar.h>
40 #include <dev/ic/wdcvar.h>
41 
42 #include <dev/ofw/openfirm.h>
43 
44 #include <dev/pci/pcivar.h>
45 #include <dev/pci/pcireg.h>
46 #include <dev/pci/pcidevs.h>
47 
48 #include <macppc/dev/dbdma.h>
49 
50 #define WDC_REG_NPORTS		8
51 #define WDC_AUXREG_OFFSET	0x16
52 
53 #define PIO_CONFIG_REG (0x200 >> 4)	/* PIO and DMA access timing */
54 #define DMA_CONFIG_REG (0x210 >> 4)	/* UDMA access timing */
55 
56 struct kauai_softc {
57 	struct wdc_softc sc_wdcdev;
58 	struct channel_softc *wdc_chanptr;
59 	struct channel_softc wdc_channel;
60 	struct channel_queue wdc_queue;
61 	dbdma_regmap_t *sc_dmareg;
62 	dbdma_command_t	*sc_dmacmd;
63 	u_int sc_piotiming_r[2];
64 	u_int sc_piotiming_w[2];
65 	u_int sc_dmatiming_r[2];
66 	u_int sc_dmatiming_w[2];
67 	void (*sc_calc_timing)(struct kauai_softc *, int);
68 };
69 
70 int kauai_match __P((struct device *, struct cfdata *, void *));
71 void kauai_attach __P((struct device *, struct device *, void *));
72 int kauai_dma_init __P((void *, int, int, void *, size_t, int));
73 void kauai_dma_start __P((void *, int, int));
74 int kauai_dma_finish __P((void *, int, int, int));
75 void kauai_set_modes __P((struct channel_softc *));
76 static void calc_timing_kauai __P((struct kauai_softc *, int));
77 static int getnodebypci(pci_chipset_tag_t, pcitag_t);
78 
79 CFATTACH_DECL(kauai, sizeof(struct kauai_softc),
80     kauai_match, kauai_attach, NULL, wdcactivate);
81 
82 int
83 kauai_match(parent, match, aux)
84 	struct device *parent;
85 	struct cfdata *match;
86 	void *aux;
87 {
88 	struct pci_attach_args *pa = aux;
89 
90 	if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_APPLE &&
91 	    PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_APPLE_KAUAI)
92 		return 5;
93 
94 	return 0;
95 }
96 
97 void
98 kauai_attach(parent, self, aux)
99 	struct device *parent, *self;
100 	void *aux;
101 {
102 	struct kauai_softc *sc = (void *)self;
103 	struct pci_attach_args *pa = aux;
104 	struct channel_softc *chp = &sc->wdc_channel;
105 	pci_intr_handle_t ih;
106 	paddr_t regbase, dmabase;
107 	int node, reg[5];
108 
109 #ifdef DIAGNOSTIC
110 	if ((vaddr_t)sc->sc_dmacmd & 0x0f) {
111 		printf(": bad dbdma alignment\n");
112 		return;
113 	}
114 #endif
115 
116 	node = getnodebypci(pa->pa_pc, pa->pa_tag);
117 	if (node == 0) {
118 		printf(": cannot find gmac node\n");
119 		return;
120 	}
121 
122 	if (OF_getprop(node, "assigned-addresses", reg, sizeof reg) < 12) {
123 		printf(": cannot get address property\n");
124 		return;
125 	}
126 	regbase = reg[2] + 0x2000;
127 	dmabase = reg[2] + 0x1000;
128 
129 	/*
130 	 * XXX PCI_INTERRUPT_REG seems to be wired to 0.
131 	 * XXX So use fixed intrpin and intrline values.
132 	 */
133 	if (pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_INTERRUPT_REG) == 0) {
134 		pa->pa_intrpin = 1;
135 		pa->pa_intrline = 39;
136 	}
137 
138 	if (pci_intr_map(pa, &ih)) {
139 		printf(": unable to map interrupt\n");
140 		return;
141 	}
142 	printf(": interrupting at %s\n", pci_intr_string(pa->pa_pc, ih));
143 
144 	chp->cmd_iot = chp->ctl_iot = macppc_make_bus_space_tag(regbase, 4);
145 
146 	if (bus_space_map(chp->cmd_iot, 0, WDC_REG_NPORTS, 0, &chp->cmd_ioh) ||
147 	    bus_space_subregion(chp->cmd_iot, chp->cmd_ioh,
148 			WDC_AUXREG_OFFSET, 1, &chp->ctl_ioh)) {
149 		printf("%s: couldn't map registers\n", self->dv_xname);
150 		return;
151 	}
152 
153 	if (pci_intr_establish(pa->pa_pc, ih, IPL_BIO, wdcintr, chp) == NULL) {
154 		printf("%s: unable to establish interrupt\n", self->dv_xname);
155 		return;
156 	}
157 
158 
159 	sc->sc_wdcdev.PIO_cap = 4;
160 	sc->sc_wdcdev.DMA_cap = 2;
161 	sc->sc_wdcdev.UDMA_cap = 5;
162 	sc->sc_wdcdev.cap |= WDC_CAPABILITY_DATA16 | WDC_CAPABILITY_MODE;
163 	sc->sc_wdcdev.cap |= WDC_CAPABILITY_DMA | WDC_CAPABILITY_UDMA;
164 	sc->wdc_chanptr = chp;
165 	sc->sc_wdcdev.channels = &sc->wdc_chanptr;
166 	sc->sc_wdcdev.nchannels = 1;
167 	sc->sc_wdcdev.dma_arg = sc;
168 	sc->sc_wdcdev.dma_init = kauai_dma_init;
169 	sc->sc_wdcdev.dma_start = kauai_dma_start;
170 	sc->sc_wdcdev.dma_finish = kauai_dma_finish;
171 	sc->sc_wdcdev.set_modes = kauai_set_modes;
172 	sc->sc_calc_timing = calc_timing_kauai;
173 	sc->sc_dmareg = (void *)dmabase;
174 
175 	chp->channel = 0;
176 	chp->wdc = &sc->sc_wdcdev;
177 	chp->ch_queue = &sc->wdc_queue;
178 
179 	wdcattach(chp);
180 
181 	/* Modify access timings. */
182 	kauai_set_modes(chp);
183 }
184 
185 void
186 kauai_set_modes(chp)
187 	struct channel_softc *chp;
188 {
189 	struct kauai_softc *sc = (void *)chp->wdc;
190 	struct ata_drive_datas *drvp0 = &chp->ch_drive[0];
191 	struct ata_drive_datas *drvp1 = &chp->ch_drive[1];
192 	struct ata_drive_datas *drvp;
193 	int drive;
194 
195 	if ((drvp0->drive_flags & DRIVE) && (drvp1->drive_flags & DRIVE)) {
196 		drvp0->PIO_mode = drvp1->PIO_mode =
197 		    min(drvp0->PIO_mode, drvp1->PIO_mode);
198 	}
199 
200 	for (drive = 0; drive < 2; drive++) {
201 		drvp = &chp->ch_drive[drive];
202 		if (drvp->drive_flags & DRIVE) {
203 			(*sc->sc_calc_timing)(sc, drive);
204 			bus_space_write_4(chp->cmd_iot, chp->cmd_ioh,
205 			    PIO_CONFIG_REG, sc->sc_piotiming_r[drive]);
206 			bus_space_write_4(chp->cmd_iot, chp->cmd_ioh,
207 			    DMA_CONFIG_REG, sc->sc_dmatiming_r[drive]);
208 		}
209 	}
210 
211 	wdc_print_modes(chp);
212 }
213 
214 /*
215  * IDE transfer timings
216  */
217 static const u_int pio_timing_kauai[] = {	/* 0xff000fff */
218 	0x08000a92,	/* Mode 0 */
219 	0x0800060f,	/*      1 */
220 	0x0800038b,	/*      2 */
221 	0x05000249,	/*      3 */
222 	0x04000148	/*      4 */
223 };
224 static const u_int dma_timing_kauai[] = {	/* 0x00fff000 */
225 	0x00618000,	/* Mode 0 */
226 	0x00209000,	/*      1 */
227 	0x00148000	/*      2 */
228 };
229 static const u_int udma_timing_kauai[] = {	/* 0x0000ffff */
230 	0x000070c0,	/* Mode 0 */
231 	0x00005d80,	/*      1 */
232 	0x00004a60,	/*      2 */
233 	0x00003a50,	/*      3 */
234 	0x00002a30,	/*      4 */
235 	0x00002921	/*      5 */
236 };
237 
238 /*
239  * Timing calculation for Kauai.
240  */
241 void
242 calc_timing_kauai(sc, drive)
243 	struct kauai_softc *sc;
244 	int drive;
245 {
246 	struct channel_softc *chp = &sc->wdc_channel;
247 	struct ata_drive_datas *drvp = &chp->ch_drive[drive];
248 	int piomode = drvp->PIO_mode;
249 	int dmamode = drvp->DMA_mode;
250 	int udmamode = drvp->UDMA_mode;
251 	u_int pioconf, dmaconf;
252 
253 	pioconf = pio_timing_kauai[piomode];
254 
255 	dmaconf = 0;
256 	if (drvp->drive_flags & DRIVE_DMA)
257 		dmaconf |= dma_timing_kauai[dmamode];
258 	if (drvp->drive_flags & DRIVE_UDMA)
259 		dmaconf |= udma_timing_kauai[udmamode];
260 
261 	if (drvp->drive_flags & DRIVE_UDMA)
262 		dmaconf |= 1;
263 
264 	sc->sc_piotiming_r[drive] = sc->sc_piotiming_w[drive] = pioconf;
265 	sc->sc_dmatiming_r[drive] = sc->sc_dmatiming_w[drive] = dmaconf;
266 }
267 
268 int
269 kauai_dma_init(v, channel, drive, databuf, datalen, flags)
270 	void *v;
271 	void *databuf;
272 	size_t datalen;
273 	int flags;
274 {
275 	struct kauai_softc *sc = v;
276 	dbdma_command_t *cmdp = sc->sc_dmacmd;
277 	struct channel_softc *chp = &sc->wdc_channel;
278 	vaddr_t va = (vaddr_t)databuf;
279 	int read = flags & WDC_DMA_READ;
280 	int cmd = read ? DBDMA_CMD_IN_MORE : DBDMA_CMD_OUT_MORE;
281 	u_int offset;
282 
283 	bus_space_write_4(chp->cmd_iot, chp->cmd_ioh, DMA_CONFIG_REG,
284 	    read ? sc->sc_dmatiming_r[drive] : sc->sc_dmatiming_w[drive]);
285 	bus_space_read_4(chp->cmd_iot, chp->cmd_ioh, DMA_CONFIG_REG);
286 
287 	offset = va & PGOFSET;
288 
289 	/* if va is not page-aligned, setup the first page */
290 	if (offset != 0) {
291 		int rest = PAGE_SIZE - offset;	/* the rest of the page */
292 
293 		if (datalen > rest) {		/* if continues to next page */
294 			DBDMA_BUILD(cmdp, cmd, 0, rest, vtophys(va),
295 				DBDMA_INT_NEVER, DBDMA_WAIT_NEVER,
296 				DBDMA_BRANCH_NEVER);
297 			datalen -= rest;
298 			va += rest;
299 			cmdp++;
300 		}
301 	}
302 
303 	/* now va is page-aligned */
304 	while (datalen > PAGE_SIZE) {
305 		DBDMA_BUILD(cmdp, cmd, 0, PAGE_SIZE, vtophys(va),
306 			DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER);
307 		datalen -= PAGE_SIZE;
308 		va += PAGE_SIZE;
309 		cmdp++;
310 	}
311 
312 	/* the last page (datalen <= PAGE_SIZE here) */
313 	cmd = read ? DBDMA_CMD_IN_LAST : DBDMA_CMD_OUT_LAST;
314 	DBDMA_BUILD(cmdp, cmd, 0, datalen, vtophys(va),
315 		DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER);
316 	cmdp++;
317 
318 	DBDMA_BUILD(cmdp, DBDMA_CMD_STOP, 0, 0, 0,
319 		DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER);
320 
321 	return 0;
322 }
323 
324 void
325 kauai_dma_start(v, channel, drive)
326 	void *v;
327 	int channel, drive;
328 {
329 	struct kauai_softc *sc = v;
330 
331 	dbdma_start(sc->sc_dmareg, sc->sc_dmacmd);
332 }
333 
334 int
335 kauai_dma_finish(v, channel, drive, read)
336 	void *v;
337 	int channel, drive;
338 	int read;
339 {
340 	struct kauai_softc *sc = v;
341 
342 	dbdma_stop(sc->sc_dmareg);
343 	return 0;
344 }
345 
346 /*
347  * Find OF-device corresponding to the PCI device.
348  */
349 int
350 getnodebypci(pc, tag)
351 	pci_chipset_tag_t pc;
352 	pcitag_t tag;
353 {
354 	int bus, dev, func;
355 	u_int reg[5];
356 	int p, q;
357 	int l, b, d, f;
358 
359 	pci_decompose_tag(pc, tag, &bus, &dev, &func);
360 
361 	for (q = OF_peer(0); q; q = p) {
362 		l = OF_getprop(q, "assigned-addresses", reg, sizeof(reg));
363 		if (l > 4) {
364 			b = (reg[0] >> 16) & 0xff;
365 			d = (reg[0] >> 11) & 0x1f;
366 			f = (reg[0] >> 8) & 0x07;
367 
368 			if (b == bus && d == dev && f == func)
369 				return q;
370 		}
371 		if ((p = OF_child(q)))
372 			continue;
373 		while (q) {
374 			if ((p = OF_peer(q)))
375 				break;
376 			q = OF_parent(q);
377 		}
378 	}
379 	return 0;
380 }
381