1 /* $NetBSD: if_bm.c,v 1.26 2005/12/11 12:18:03 christos Exp $ */ 2 3 /*- 4 * Copyright (C) 1998, 1999, 2000 Tsubai Masanari. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __KERNEL_RCSID(0, "$NetBSD: if_bm.c,v 1.26 2005/12/11 12:18:03 christos Exp $"); 31 32 #include "opt_inet.h" 33 #include "opt_ns.h" 34 #include "bpfilter.h" 35 36 #include <sys/param.h> 37 #include <sys/device.h> 38 #include <sys/ioctl.h> 39 #include <sys/kernel.h> 40 #include <sys/mbuf.h> 41 #include <sys/socket.h> 42 #include <sys/systm.h> 43 #include <sys/callout.h> 44 45 #include <uvm/uvm_extern.h> 46 47 #include <net/if.h> 48 #include <net/if_dl.h> 49 #include <net/if_ether.h> 50 #include <net/if_media.h> 51 52 #if NBPFILTER > 0 53 #include <net/bpf.h> 54 #endif 55 56 #ifdef INET 57 #include <netinet/in.h> 58 #include <netinet/if_inarp.h> 59 #endif 60 61 #ifdef NS 62 #include <netns/ns.h> 63 #include <netns/ns_if.h> 64 #endif 65 66 #include <dev/ofw/openfirm.h> 67 68 #include <dev/mii/mii.h> 69 #include <dev/mii/miivar.h> 70 #include <dev/mii/mii_bitbang.h> 71 72 #include <powerpc/spr.h> 73 74 #include <machine/autoconf.h> 75 #include <machine/pio.h> 76 77 #include <macppc/dev/dbdma.h> 78 #include <macppc/dev/if_bmreg.h> 79 80 #define BMAC_TXBUFS 2 81 #define BMAC_RXBUFS 16 82 #define BMAC_BUFLEN 2048 83 84 struct bmac_softc { 85 struct device sc_dev; 86 struct ethercom sc_ethercom; 87 #define sc_if sc_ethercom.ec_if 88 struct callout sc_tick_ch; 89 vaddr_t sc_regs; 90 dbdma_regmap_t *sc_txdma; 91 dbdma_regmap_t *sc_rxdma; 92 dbdma_command_t *sc_txcmd; 93 dbdma_command_t *sc_rxcmd; 94 caddr_t sc_txbuf; 95 caddr_t sc_rxbuf; 96 int sc_rxlast; 97 int sc_flags; 98 struct mii_data sc_mii; 99 u_char sc_enaddr[6]; 100 }; 101 102 #define BMAC_BMACPLUS 0x01 103 #define BMAC_DEBUGFLAG 0x02 104 105 extern u_int *heathrow_FCR; 106 107 static __inline int bmac_read_reg __P((struct bmac_softc *, int)); 108 static __inline void bmac_write_reg __P((struct bmac_softc *, int, int)); 109 static __inline void bmac_set_bits __P((struct bmac_softc *, int, int)); 110 static __inline void bmac_reset_bits __P((struct bmac_softc *, int, int)); 111 112 int bmac_match __P((struct device *, struct cfdata *, void *)); 113 void bmac_attach __P((struct device *, struct device *, void *)); 114 void bmac_reset_chip __P((struct bmac_softc *)); 115 void bmac_init __P((struct bmac_softc *)); 116 void bmac_init_dma __P((struct bmac_softc *)); 117 int bmac_intr __P((void *)); 118 int bmac_rint __P((void *)); 119 void bmac_reset __P((struct bmac_softc *)); 120 void bmac_stop __P((struct bmac_softc *)); 121 void bmac_start __P((struct ifnet *)); 122 void bmac_transmit_packet __P((struct bmac_softc *, void *, int)); 123 int bmac_put __P((struct bmac_softc *, caddr_t, struct mbuf *)); 124 struct mbuf *bmac_get __P((struct bmac_softc *, caddr_t, int)); 125 void bmac_watchdog __P((struct ifnet *)); 126 int bmac_ioctl __P((struct ifnet *, u_long, caddr_t)); 127 int bmac_mediachange __P((struct ifnet *)); 128 void bmac_mediastatus __P((struct ifnet *, struct ifmediareq *)); 129 void bmac_setladrf __P((struct bmac_softc *)); 130 131 int bmac_mii_readreg __P((struct device *, int, int)); 132 void bmac_mii_writereg __P((struct device *, int, int, int)); 133 void bmac_mii_statchg __P((struct device *)); 134 void bmac_mii_tick __P((void *)); 135 u_int32_t bmac_mbo_read __P((struct device *)); 136 void bmac_mbo_write __P((struct device *, u_int32_t)); 137 138 CFATTACH_DECL(bm, sizeof(struct bmac_softc), 139 bmac_match, bmac_attach, NULL, NULL); 140 141 struct mii_bitbang_ops bmac_mbo = { 142 bmac_mbo_read, bmac_mbo_write, 143 { MIFDO, MIFDI, MIFDC, MIFDIR, 0 } 144 }; 145 146 int 147 bmac_read_reg(sc, off) 148 struct bmac_softc *sc; 149 int off; 150 { 151 return in16rb(sc->sc_regs + off); 152 } 153 154 void 155 bmac_write_reg(sc, off, val) 156 struct bmac_softc *sc; 157 int off, val; 158 { 159 out16rb(sc->sc_regs + off, val); 160 } 161 162 void 163 bmac_set_bits(sc, off, val) 164 struct bmac_softc *sc; 165 int off, val; 166 { 167 val |= bmac_read_reg(sc, off); 168 bmac_write_reg(sc, off, val); 169 } 170 171 void 172 bmac_reset_bits(sc, off, val) 173 struct bmac_softc *sc; 174 int off, val; 175 { 176 bmac_write_reg(sc, off, bmac_read_reg(sc, off) & ~val); 177 } 178 179 int 180 bmac_match(parent, cf, aux) 181 struct device *parent; 182 struct cfdata *cf; 183 void *aux; 184 { 185 struct confargs *ca = aux; 186 187 if (ca->ca_nreg < 24 || ca->ca_nintr < 12) 188 return 0; 189 190 if (strcmp(ca->ca_name, "bmac") == 0) /* bmac */ 191 return 1; 192 if (strcmp(ca->ca_name, "ethernet") == 0) /* bmac+ */ 193 return 1; 194 195 return 0; 196 } 197 198 void 199 bmac_attach(parent, self, aux) 200 struct device *parent, *self; 201 void *aux; 202 { 203 struct confargs *ca = aux; 204 struct bmac_softc *sc = (void *)self; 205 struct ifnet *ifp = &sc->sc_if; 206 struct mii_data *mii = &sc->sc_mii; 207 u_char laddr[6]; 208 209 callout_init(&sc->sc_tick_ch); 210 211 sc->sc_flags =0; 212 if (strcmp(ca->ca_name, "ethernet") == 0) { 213 char name[64]; 214 215 memset(name, 0, 64); 216 OF_package_to_path(ca->ca_node, name, sizeof(name)); 217 OF_open(name); 218 sc->sc_flags |= BMAC_BMACPLUS; 219 } 220 221 ca->ca_reg[0] += ca->ca_baseaddr; 222 ca->ca_reg[2] += ca->ca_baseaddr; 223 ca->ca_reg[4] += ca->ca_baseaddr; 224 225 sc->sc_regs = (vaddr_t)mapiodev(ca->ca_reg[0], PAGE_SIZE); 226 227 bmac_write_reg(sc, INTDISABLE, NoEventsMask); 228 229 if (OF_getprop(ca->ca_node, "local-mac-address", laddr, 6) == -1 && 230 OF_getprop(ca->ca_node, "mac-address", laddr, 6) == -1) { 231 printf(": cannot get mac-address\n"); 232 return; 233 } 234 memcpy(sc->sc_enaddr, laddr, 6); 235 236 sc->sc_txdma = mapiodev(ca->ca_reg[2], PAGE_SIZE); 237 sc->sc_rxdma = mapiodev(ca->ca_reg[4], PAGE_SIZE); 238 sc->sc_txcmd = dbdma_alloc(BMAC_TXBUFS * sizeof(dbdma_command_t)); 239 sc->sc_rxcmd = dbdma_alloc((BMAC_RXBUFS + 1) * sizeof(dbdma_command_t)); 240 sc->sc_txbuf = malloc(BMAC_BUFLEN * BMAC_TXBUFS, M_DEVBUF, M_NOWAIT); 241 sc->sc_rxbuf = malloc(BMAC_BUFLEN * BMAC_RXBUFS, M_DEVBUF, M_NOWAIT); 242 if (sc->sc_txbuf == NULL || sc->sc_rxbuf == NULL || 243 sc->sc_txcmd == NULL || sc->sc_rxcmd == NULL) { 244 printf("cannot allocate memory\n"); 245 return; 246 } 247 248 printf(" irq %d,%d: address %s\n", ca->ca_intr[0], ca->ca_intr[2], 249 ether_sprintf(laddr)); 250 251 intr_establish(ca->ca_intr[0], IST_LEVEL, IPL_NET, bmac_intr, sc); 252 intr_establish(ca->ca_intr[2], IST_LEVEL, IPL_NET, bmac_rint, sc); 253 254 memcpy(ifp->if_xname, sc->sc_dev.dv_xname, IFNAMSIZ); 255 ifp->if_softc = sc; 256 ifp->if_ioctl = bmac_ioctl; 257 ifp->if_start = bmac_start; 258 ifp->if_flags = 259 IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_MULTICAST; 260 ifp->if_watchdog = bmac_watchdog; 261 IFQ_SET_READY(&ifp->if_snd); 262 263 mii->mii_ifp = ifp; 264 mii->mii_readreg = bmac_mii_readreg; 265 mii->mii_writereg = bmac_mii_writereg; 266 mii->mii_statchg = bmac_mii_statchg; 267 268 ifmedia_init(&mii->mii_media, 0, bmac_mediachange, bmac_mediastatus); 269 mii_attach(&sc->sc_dev, mii, 0xffffffff, MII_PHY_ANY, 270 MII_OFFSET_ANY, 0); 271 272 /* Choose a default media. */ 273 if (LIST_FIRST(&mii->mii_phys) == NULL) { 274 ifmedia_add(&mii->mii_media, IFM_ETHER|IFM_10_T, 0, NULL); 275 ifmedia_set(&mii->mii_media, IFM_ETHER|IFM_10_T); 276 } else 277 ifmedia_set(&mii->mii_media, IFM_ETHER|IFM_AUTO); 278 279 bmac_reset_chip(sc); 280 281 if_attach(ifp); 282 ether_ifattach(ifp, sc->sc_enaddr); 283 } 284 285 /* 286 * Reset and enable bmac by heathrow FCR. 287 */ 288 void 289 bmac_reset_chip(sc) 290 struct bmac_softc *sc; 291 { 292 u_int v; 293 294 dbdma_reset(sc->sc_txdma); 295 dbdma_reset(sc->sc_rxdma); 296 297 v = in32rb(heathrow_FCR); 298 299 v |= EnetEnable; 300 out32rb(heathrow_FCR, v); 301 delay(50000); 302 303 v |= ResetEnetCell; 304 out32rb(heathrow_FCR, v); 305 delay(50000); 306 307 v &= ~ResetEnetCell; 308 out32rb(heathrow_FCR, v); 309 delay(50000); 310 311 out32rb(heathrow_FCR, v); 312 } 313 314 void 315 bmac_init(sc) 316 struct bmac_softc *sc; 317 { 318 struct ifnet *ifp = &sc->sc_if; 319 struct ether_header *eh; 320 caddr_t data; 321 int i, tb, bmcr; 322 u_short *p; 323 324 bmac_reset_chip(sc); 325 326 /* XXX */ 327 bmcr = bmac_mii_readreg((struct device *)sc, 0, MII_BMCR); 328 bmcr &= ~BMCR_ISO; 329 bmac_mii_writereg((struct device *)sc, 0, MII_BMCR, bmcr); 330 331 bmac_write_reg(sc, RXRST, RxResetValue); 332 bmac_write_reg(sc, TXRST, TxResetBit); 333 334 /* Wait for reset completion. */ 335 for (i = 1000; i > 0; i -= 10) { 336 if ((bmac_read_reg(sc, TXRST) & TxResetBit) == 0) 337 break; 338 delay(10); 339 } 340 if (i <= 0) 341 printf("%s: reset timeout\n", ifp->if_xname); 342 343 if (! (sc->sc_flags & BMAC_BMACPLUS)) 344 bmac_set_bits(sc, XCVRIF, ClkBit|SerialMode|COLActiveLow); 345 346 if ((mfpvr() >> 16) == MPC601) 347 tb = mfrtcl(); 348 else 349 tb = mftbl(); 350 bmac_write_reg(sc, RSEED, tb); 351 bmac_set_bits(sc, XIFC, TxOutputEnable); 352 bmac_read_reg(sc, PAREG); 353 354 /* Reset various counters. */ 355 bmac_write_reg(sc, NCCNT, 0); 356 bmac_write_reg(sc, NTCNT, 0); 357 bmac_write_reg(sc, EXCNT, 0); 358 bmac_write_reg(sc, LTCNT, 0); 359 bmac_write_reg(sc, FRCNT, 0); 360 bmac_write_reg(sc, LECNT, 0); 361 bmac_write_reg(sc, AECNT, 0); 362 bmac_write_reg(sc, FECNT, 0); 363 bmac_write_reg(sc, RXCV, 0); 364 365 /* Set tx fifo information. */ 366 bmac_write_reg(sc, TXTH, 4); /* 4 octets before tx starts */ 367 368 bmac_write_reg(sc, TXFIFOCSR, 0); 369 bmac_write_reg(sc, TXFIFOCSR, TxFIFOEnable); 370 371 /* Set rx fifo information. */ 372 bmac_write_reg(sc, RXFIFOCSR, 0); 373 bmac_write_reg(sc, RXFIFOCSR, RxFIFOEnable); 374 375 /* Clear status register. */ 376 bmac_read_reg(sc, STATUS); 377 378 bmac_write_reg(sc, HASH3, 0); 379 bmac_write_reg(sc, HASH2, 0); 380 bmac_write_reg(sc, HASH1, 0); 381 bmac_write_reg(sc, HASH0, 0); 382 383 /* Set MAC address. */ 384 p = (u_short *)sc->sc_enaddr; 385 bmac_write_reg(sc, MADD0, *p++); 386 bmac_write_reg(sc, MADD1, *p++); 387 bmac_write_reg(sc, MADD2, *p); 388 389 bmac_write_reg(sc, RXCFG, 390 RxCRCEnable | RxHashFilterEnable | RxRejectOwnPackets); 391 392 if (ifp->if_flags & IFF_PROMISC) 393 bmac_set_bits(sc, RXCFG, RxPromiscEnable); 394 395 bmac_init_dma(sc); 396 397 /* Enable TX/RX */ 398 bmac_set_bits(sc, RXCFG, RxMACEnable); 399 bmac_set_bits(sc, TXCFG, TxMACEnable); 400 401 bmac_write_reg(sc, INTDISABLE, NormalIntEvents); 402 403 ifp->if_flags |= IFF_RUNNING; 404 ifp->if_flags &= ~IFF_OACTIVE; 405 ifp->if_timer = 0; 406 407 data = sc->sc_txbuf; 408 eh = (struct ether_header *)data; 409 410 memset(data, 0, sizeof(eh) + ETHERMIN); 411 memcpy(eh->ether_dhost, sc->sc_enaddr, ETHER_ADDR_LEN); 412 memcpy(eh->ether_shost, sc->sc_enaddr, ETHER_ADDR_LEN); 413 bmac_transmit_packet(sc, data, sizeof(eh) + ETHERMIN); 414 415 bmac_start(ifp); 416 417 callout_reset(&sc->sc_tick_ch, hz, bmac_mii_tick, sc); 418 } 419 420 void 421 bmac_init_dma(sc) 422 struct bmac_softc *sc; 423 { 424 dbdma_command_t *cmd = sc->sc_rxcmd; 425 int i; 426 427 dbdma_reset(sc->sc_txdma); 428 dbdma_reset(sc->sc_rxdma); 429 430 memset(sc->sc_txcmd, 0, BMAC_TXBUFS * sizeof(dbdma_command_t)); 431 memset(sc->sc_rxcmd, 0, (BMAC_RXBUFS + 1) * sizeof(dbdma_command_t)); 432 433 for (i = 0; i < BMAC_RXBUFS; i++) { 434 DBDMA_BUILD(cmd, DBDMA_CMD_IN_LAST, 0, BMAC_BUFLEN, 435 vtophys((vaddr_t)sc->sc_rxbuf + BMAC_BUFLEN * i), 436 DBDMA_INT_ALWAYS, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER); 437 cmd++; 438 } 439 DBDMA_BUILD(cmd, DBDMA_CMD_NOP, 0, 0, 0, 440 DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_ALWAYS); 441 dbdma_st32(&cmd->d_cmddep, vtophys((vaddr_t)sc->sc_rxcmd)); 442 443 sc->sc_rxlast = 0; 444 445 dbdma_start(sc->sc_rxdma, sc->sc_rxcmd); 446 } 447 448 int 449 bmac_intr(v) 450 void *v; 451 { 452 struct bmac_softc *sc = v; 453 int stat; 454 455 stat = bmac_read_reg(sc, STATUS); 456 if (stat == 0) 457 return 0; 458 459 #ifdef BMAC_DEBUG 460 printf("bmac_intr status = 0x%x\n", stat); 461 #endif 462 463 if (stat & IntFrameSent) { 464 sc->sc_if.if_flags &= ~IFF_OACTIVE; 465 sc->sc_if.if_timer = 0; 466 sc->sc_if.if_opackets++; 467 bmac_start(&sc->sc_if); 468 } 469 470 /* XXX should do more! */ 471 472 return 1; 473 } 474 475 int 476 bmac_rint(v) 477 void *v; 478 { 479 struct bmac_softc *sc = v; 480 struct ifnet *ifp = &sc->sc_if; 481 struct mbuf *m; 482 dbdma_command_t *cmd; 483 int status, resid, count, datalen; 484 int i, n; 485 void *data; 486 487 i = sc->sc_rxlast; 488 for (n = 0; n < BMAC_RXBUFS; n++, i++) { 489 if (i == BMAC_RXBUFS) 490 i = 0; 491 cmd = &sc->sc_rxcmd[i]; 492 status = dbdma_ld16(&cmd->d_status); 493 resid = dbdma_ld16(&cmd->d_resid); 494 495 #ifdef BMAC_DEBUG 496 if (status != 0 && status != 0x8440 && status != 0x9440) 497 printf("bmac_rint status = 0x%x\n", status); 498 #endif 499 500 if ((status & DBDMA_CNTRL_ACTIVE) == 0) /* 0x9440 | 0x8440 */ 501 continue; 502 count = dbdma_ld16(&cmd->d_count); 503 datalen = count - resid - 2; /* 2 == framelen */ 504 if (datalen < sizeof(struct ether_header)) { 505 printf("%s: short packet len = %d\n", 506 ifp->if_xname, datalen); 507 goto next; 508 } 509 DBDMA_BUILD_CMD(cmd, DBDMA_CMD_STOP, 0, 0, 0, 0); 510 data = sc->sc_rxbuf + BMAC_BUFLEN * i; 511 512 /* XXX Sometimes bmac reads one extra byte. */ 513 if (datalen == ETHER_MAX_LEN + 1) 514 datalen--; 515 516 /* Trim the CRC. */ 517 datalen -= ETHER_CRC_LEN; 518 519 m = bmac_get(sc, data, datalen); 520 if (m == NULL) { 521 ifp->if_ierrors++; 522 goto next; 523 } 524 525 #if NBPFILTER > 0 526 /* 527 * Check if there's a BPF listener on this interface. 528 * If so, hand off the raw packet to BPF. 529 */ 530 if (ifp->if_bpf) 531 bpf_mtap(ifp->if_bpf, m); 532 #endif 533 (*ifp->if_input)(ifp, m); 534 ifp->if_ipackets++; 535 536 next: 537 DBDMA_BUILD_CMD(cmd, DBDMA_CMD_IN_LAST, 0, DBDMA_INT_ALWAYS, 538 DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER); 539 540 cmd->d_status = 0; 541 cmd->d_resid = 0; 542 sc->sc_rxlast = i + 1; 543 } 544 dbdma_continue(sc->sc_rxdma); 545 546 return 1; 547 } 548 549 void 550 bmac_reset(sc) 551 struct bmac_softc *sc; 552 { 553 int s; 554 555 s = splnet(); 556 bmac_init(sc); 557 splx(s); 558 } 559 560 void 561 bmac_stop(sc) 562 struct bmac_softc *sc; 563 { 564 struct ifnet *ifp = &sc->sc_if; 565 int s; 566 567 s = splnet(); 568 569 callout_stop(&sc->sc_tick_ch); 570 mii_down(&sc->sc_mii); 571 572 /* Disable TX/RX. */ 573 bmac_reset_bits(sc, TXCFG, TxMACEnable); 574 bmac_reset_bits(sc, RXCFG, RxMACEnable); 575 576 /* Disable all interrupts. */ 577 bmac_write_reg(sc, INTDISABLE, NoEventsMask); 578 579 dbdma_stop(sc->sc_txdma); 580 dbdma_stop(sc->sc_rxdma); 581 582 ifp->if_flags &= ~(IFF_UP | IFF_RUNNING); 583 ifp->if_timer = 0; 584 585 splx(s); 586 } 587 588 void 589 bmac_start(ifp) 590 struct ifnet *ifp; 591 { 592 struct bmac_softc *sc = ifp->if_softc; 593 struct mbuf *m; 594 int tlen; 595 596 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 597 return; 598 599 while (1) { 600 if (ifp->if_flags & IFF_OACTIVE) 601 return; 602 603 IFQ_DEQUEUE(&ifp->if_snd, m); 604 if (m == 0) 605 break; 606 #if NBPFILTER > 0 607 /* 608 * If BPF is listening on this interface, let it see the 609 * packet before we commit it to the wire. 610 */ 611 if (ifp->if_bpf) 612 bpf_mtap(ifp->if_bpf, m); 613 #endif 614 615 ifp->if_flags |= IFF_OACTIVE; 616 tlen = bmac_put(sc, sc->sc_txbuf, m); 617 618 /* 5 seconds to watch for failing to transmit */ 619 ifp->if_timer = 5; 620 ifp->if_opackets++; /* # of pkts */ 621 622 bmac_transmit_packet(sc, sc->sc_txbuf, tlen); 623 } 624 } 625 626 void 627 bmac_transmit_packet(sc, buff, len) 628 struct bmac_softc *sc; 629 void *buff; 630 int len; 631 { 632 dbdma_command_t *cmd = sc->sc_txcmd; 633 vaddr_t va = (vaddr_t)buff; 634 635 #ifdef BMAC_DEBUG 636 if (vtophys(va) + len - 1 != vtophys(va + len - 1)) 637 panic("bmac_transmit_packet"); 638 #endif 639 640 DBDMA_BUILD(cmd, DBDMA_CMD_OUT_LAST, 0, len, vtophys(va), 641 DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER); 642 cmd++; 643 DBDMA_BUILD(cmd, DBDMA_CMD_STOP, 0, 0, 0, 644 DBDMA_INT_ALWAYS, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER); 645 646 dbdma_start(sc->sc_txdma, sc->sc_txcmd); 647 } 648 649 int 650 bmac_put(sc, buff, m) 651 struct bmac_softc *sc; 652 caddr_t buff; 653 struct mbuf *m; 654 { 655 struct mbuf *n; 656 int len, tlen = 0; 657 658 for (; m; m = n) { 659 len = m->m_len; 660 if (len == 0) { 661 MFREE(m, n); 662 continue; 663 } 664 memcpy(buff, mtod(m, caddr_t), len); 665 buff += len; 666 tlen += len; 667 MFREE(m, n); 668 } 669 if (tlen > PAGE_SIZE) 670 panic("%s: putpacket packet overflow", sc->sc_dev.dv_xname); 671 672 return tlen; 673 } 674 675 struct mbuf * 676 bmac_get(sc, pkt, totlen) 677 struct bmac_softc *sc; 678 caddr_t pkt; 679 int totlen; 680 { 681 struct mbuf *m; 682 struct mbuf *top, **mp; 683 int len; 684 685 MGETHDR(m, M_DONTWAIT, MT_DATA); 686 if (m == 0) 687 return 0; 688 m->m_pkthdr.rcvif = &sc->sc_if; 689 m->m_pkthdr.len = totlen; 690 len = MHLEN; 691 top = 0; 692 mp = ⊤ 693 694 while (totlen > 0) { 695 if (top) { 696 MGET(m, M_DONTWAIT, MT_DATA); 697 if (m == 0) { 698 m_freem(top); 699 return 0; 700 } 701 len = MLEN; 702 } 703 if (totlen >= MINCLSIZE) { 704 MCLGET(m, M_DONTWAIT); 705 if ((m->m_flags & M_EXT) == 0) { 706 m_free(m); 707 m_freem(top); 708 return 0; 709 } 710 len = MCLBYTES; 711 } 712 m->m_len = len = min(totlen, len); 713 memcpy(mtod(m, caddr_t), pkt, len); 714 pkt += len; 715 totlen -= len; 716 *mp = m; 717 mp = &m->m_next; 718 } 719 720 return top; 721 } 722 723 void 724 bmac_watchdog(ifp) 725 struct ifnet *ifp; 726 { 727 struct bmac_softc *sc = ifp->if_softc; 728 729 bmac_reset_bits(sc, RXCFG, RxMACEnable); 730 bmac_reset_bits(sc, TXCFG, TxMACEnable); 731 732 printf("%s: device timeout\n", ifp->if_xname); 733 ifp->if_oerrors++; 734 735 bmac_reset(sc); 736 } 737 738 int 739 bmac_ioctl(ifp, cmd, data) 740 struct ifnet *ifp; 741 u_long cmd; 742 caddr_t data; 743 { 744 struct bmac_softc *sc = ifp->if_softc; 745 struct ifaddr *ifa = (struct ifaddr *)data; 746 struct ifreq *ifr = (struct ifreq *)data; 747 int s, error = 0; 748 749 s = splnet(); 750 751 switch (cmd) { 752 753 case SIOCSIFADDR: 754 ifp->if_flags |= IFF_UP; 755 756 switch (ifa->ifa_addr->sa_family) { 757 #ifdef INET 758 case AF_INET: 759 bmac_init(sc); 760 arp_ifinit(ifp, ifa); 761 break; 762 #endif 763 #ifdef NS 764 case AF_NS: 765 { 766 struct ns_addr *ina = &IA_SNS(ifa)->sns_addr; 767 768 if (ns_nullhost(*ina)) 769 ina->x_host = 770 *(union ns_host *)LLADDR(ifp->if_sadl); 771 else { 772 memcpy(LLADDR(ifp->if_sadl), 773 ina->x_host.c_host, 774 sizeof(sc->sc_enaddr)); 775 } 776 /* Set new address. */ 777 bmac_init(sc); 778 break; 779 } 780 #endif 781 default: 782 bmac_init(sc); 783 break; 784 } 785 break; 786 787 case SIOCSIFFLAGS: 788 if ((ifp->if_flags & IFF_UP) == 0 && 789 (ifp->if_flags & IFF_RUNNING) != 0) { 790 /* 791 * If interface is marked down and it is running, then 792 * stop it. 793 */ 794 bmac_stop(sc); 795 ifp->if_flags &= ~IFF_RUNNING; 796 } else if ((ifp->if_flags & IFF_UP) != 0 && 797 (ifp->if_flags & IFF_RUNNING) == 0) { 798 /* 799 * If interface is marked up and it is stopped, then 800 * start it. 801 */ 802 bmac_init(sc); 803 } else { 804 /* 805 * Reset the interface to pick up changes in any other 806 * flags that affect hardware registers. 807 */ 808 /*bmac_stop(sc);*/ 809 bmac_init(sc); 810 } 811 #ifdef BMAC_DEBUG 812 if (ifp->if_flags & IFF_DEBUG) 813 sc->sc_flags |= BMAC_DEBUGFLAG; 814 #endif 815 break; 816 817 case SIOCADDMULTI: 818 case SIOCDELMULTI: 819 error = (cmd == SIOCADDMULTI) ? 820 ether_addmulti(ifr, &sc->sc_ethercom) : 821 ether_delmulti(ifr, &sc->sc_ethercom); 822 823 if (error == ENETRESET) { 824 /* 825 * Multicast list has changed; set the hardware filter 826 * accordingly. 827 */ 828 if (ifp->if_flags & IFF_RUNNING) { 829 bmac_init(sc); 830 bmac_setladrf(sc); 831 } 832 error = 0; 833 } 834 break; 835 836 case SIOCGIFMEDIA: 837 case SIOCSIFMEDIA: 838 error = ifmedia_ioctl(ifp, ifr, &sc->sc_mii.mii_media, cmd); 839 break; 840 841 default: 842 error = EINVAL; 843 } 844 845 splx(s); 846 return error; 847 } 848 849 int 850 bmac_mediachange(ifp) 851 struct ifnet *ifp; 852 { 853 struct bmac_softc *sc = ifp->if_softc; 854 855 return mii_mediachg(&sc->sc_mii); 856 } 857 858 void 859 bmac_mediastatus(ifp, ifmr) 860 struct ifnet *ifp; 861 struct ifmediareq *ifmr; 862 { 863 struct bmac_softc *sc = ifp->if_softc; 864 865 mii_pollstat(&sc->sc_mii); 866 867 ifmr->ifm_status = sc->sc_mii.mii_media_status; 868 ifmr->ifm_active = sc->sc_mii.mii_media_active; 869 } 870 871 /* 872 * Set up the logical address filter. 873 */ 874 void 875 bmac_setladrf(sc) 876 struct bmac_softc *sc; 877 { 878 struct ifnet *ifp = &sc->sc_if; 879 struct ether_multi *enm; 880 struct ether_multistep step; 881 u_int32_t crc; 882 u_int16_t hash[4]; 883 int x; 884 885 /* 886 * Set up multicast address filter by passing all multicast addresses 887 * through a crc generator, and then using the high order 6 bits as an 888 * index into the 64 bit logical address filter. The high order bit 889 * selects the word, while the rest of the bits select the bit within 890 * the word. 891 */ 892 893 if (ifp->if_flags & IFF_PROMISC) { 894 bmac_set_bits(sc, RXCFG, RxPromiscEnable); 895 return; 896 } 897 898 if (ifp->if_flags & IFF_ALLMULTI) { 899 hash[3] = hash[2] = hash[1] = hash[0] = 0xffff; 900 goto chipit; 901 } 902 903 hash[3] = hash[2] = hash[1] = hash[0] = 0; 904 905 ETHER_FIRST_MULTI(step, &sc->sc_ethercom, enm); 906 while (enm != NULL) { 907 if (memcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) { 908 /* 909 * We must listen to a range of multicast addresses. 910 * For now, just accept all multicasts, rather than 911 * trying to set only those filter bits needed to match 912 * the range. (At this time, the only use of address 913 * ranges is for IP multicast routing, for which the 914 * range is big enough to require all bits set.) 915 */ 916 hash[3] = hash[2] = hash[1] = hash[0] = 0xffff; 917 ifp->if_flags |= IFF_ALLMULTI; 918 goto chipit; 919 } 920 921 crc = ether_crc32_le(enm->enm_addrlo, ETHER_ADDR_LEN); 922 923 /* Just want the 6 most significant bits. */ 924 crc >>= 26; 925 926 /* Set the corresponding bit in the filter. */ 927 hash[crc >> 4] |= 1 << (crc & 0xf); 928 929 ETHER_NEXT_MULTI(step, enm); 930 } 931 932 ifp->if_flags &= ~IFF_ALLMULTI; 933 934 chipit: 935 bmac_write_reg(sc, HASH0, hash[0]); 936 bmac_write_reg(sc, HASH1, hash[1]); 937 bmac_write_reg(sc, HASH2, hash[2]); 938 bmac_write_reg(sc, HASH3, hash[3]); 939 x = bmac_read_reg(sc, RXCFG); 940 x &= ~RxPromiscEnable; 941 x |= RxHashFilterEnable; 942 bmac_write_reg(sc, RXCFG, x); 943 } 944 945 int 946 bmac_mii_readreg(dev, phy, reg) 947 struct device *dev; 948 int phy, reg; 949 { 950 return mii_bitbang_readreg(dev, &bmac_mbo, phy, reg); 951 } 952 953 void 954 bmac_mii_writereg(dev, phy, reg, val) 955 struct device *dev; 956 int phy, reg, val; 957 { 958 mii_bitbang_writereg(dev, &bmac_mbo, phy, reg, val); 959 } 960 961 u_int32_t 962 bmac_mbo_read(dev) 963 struct device *dev; 964 { 965 struct bmac_softc *sc = (void *)dev; 966 967 return bmac_read_reg(sc, MIFCSR); 968 } 969 970 void 971 bmac_mbo_write(dev, val) 972 struct device *dev; 973 u_int32_t val; 974 { 975 struct bmac_softc *sc = (void *)dev; 976 977 bmac_write_reg(sc, MIFCSR, val); 978 } 979 980 void 981 bmac_mii_statchg(dev) 982 struct device *dev; 983 { 984 struct bmac_softc *sc = (void *)dev; 985 int x; 986 987 /* Update duplex mode in TX configuration */ 988 x = bmac_read_reg(sc, TXCFG); 989 if ((IFM_OPTIONS(sc->sc_mii.mii_media_active) & IFM_FDX) != 0) 990 x |= TxFullDuplex; 991 else 992 x &= ~TxFullDuplex; 993 bmac_write_reg(sc, TXCFG, x); 994 995 #ifdef BMAC_DEBUG 996 printf("bmac_mii_statchg 0x%x\n", 997 IFM_OPTIONS(sc->sc_mii.mii_media_active)); 998 #endif 999 } 1000 1001 void 1002 bmac_mii_tick(v) 1003 void *v; 1004 { 1005 struct bmac_softc *sc = v; 1006 int s; 1007 1008 s = splnet(); 1009 mii_tick(&sc->sc_mii); 1010 splx(s); 1011 1012 callout_reset(&sc->sc_tick_ch, hz, bmac_mii_tick, sc); 1013 } 1014