1 /* $NetBSD: if_bm.c,v 1.49 2016/07/15 22:10:47 macallan Exp $ */ 2 3 /*- 4 * Copyright (C) 1998, 1999, 2000 Tsubai Masanari. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __KERNEL_RCSID(0, "$NetBSD: if_bm.c,v 1.49 2016/07/15 22:10:47 macallan Exp $"); 31 32 #include "opt_inet.h" 33 34 #include <sys/param.h> 35 #include <sys/device.h> 36 #include <sys/ioctl.h> 37 #include <sys/kernel.h> 38 #include <sys/mbuf.h> 39 #include <sys/socket.h> 40 #include <sys/systm.h> 41 #include <sys/callout.h> 42 43 #include <uvm/uvm_extern.h> 44 45 #include <net/if.h> 46 #include <net/if_dl.h> 47 #include <net/if_ether.h> 48 #include <net/if_media.h> 49 50 #include <net/bpf.h> 51 52 #ifdef INET 53 #include <netinet/in.h> 54 #include <netinet/if_inarp.h> 55 #endif 56 57 58 #include <dev/ofw/openfirm.h> 59 60 #include <dev/mii/mii.h> 61 #include <dev/mii/miivar.h> 62 #include <dev/mii/mii_bitbang.h> 63 64 #include <powerpc/spr.h> 65 #include <powerpc/oea/spr.h> 66 67 #include <machine/autoconf.h> 68 #include <machine/pio.h> 69 70 #include <macppc/dev/dbdma.h> 71 #include <macppc/dev/if_bmreg.h> 72 #include <macppc/dev/obiovar.h> 73 74 #define BMAC_TXBUFS 2 75 #define BMAC_RXBUFS 16 76 #define BMAC_BUFLEN 2048 77 78 struct bmac_softc { 79 device_t sc_dev; 80 struct ethercom sc_ethercom; 81 #define sc_if sc_ethercom.ec_if 82 struct callout sc_tick_ch; 83 bus_space_tag_t sc_iot; 84 bus_space_handle_t sc_ioh; 85 dbdma_regmap_t *sc_txdma; 86 dbdma_regmap_t *sc_rxdma; 87 dbdma_command_t *sc_txcmd; 88 dbdma_command_t *sc_rxcmd; 89 void *sc_txbuf; 90 void *sc_rxbuf; 91 int sc_rxlast; 92 int sc_flags; 93 struct mii_data sc_mii; 94 u_char sc_enaddr[6]; 95 }; 96 97 #define BMAC_BMACPLUS 0x01 98 #define BMAC_DEBUGFLAG 0x02 99 100 int bmac_match(device_t, cfdata_t, void *); 101 void bmac_attach(device_t, device_t, void *); 102 void bmac_reset_chip(struct bmac_softc *); 103 void bmac_init(struct bmac_softc *); 104 void bmac_init_dma(struct bmac_softc *); 105 int bmac_intr(void *); 106 int bmac_rint(void *); 107 void bmac_reset(struct bmac_softc *); 108 void bmac_stop(struct bmac_softc *); 109 void bmac_start(struct ifnet *); 110 void bmac_transmit_packet(struct bmac_softc *, void *, int); 111 int bmac_put(struct bmac_softc *, void *, struct mbuf *); 112 struct mbuf *bmac_get(struct bmac_softc *, void *, int); 113 void bmac_watchdog(struct ifnet *); 114 int bmac_ioctl(struct ifnet *, u_long, void *); 115 void bmac_setladrf(struct bmac_softc *); 116 117 int bmac_mii_readreg(device_t, int, int); 118 void bmac_mii_writereg(device_t, int, int, int); 119 void bmac_mii_statchg(struct ifnet *); 120 void bmac_mii_tick(void *); 121 u_int32_t bmac_mbo_read(device_t); 122 void bmac_mbo_write(device_t, u_int32_t); 123 124 CFATTACH_DECL_NEW(bm, sizeof(struct bmac_softc), 125 bmac_match, bmac_attach, NULL, NULL); 126 127 const struct mii_bitbang_ops bmac_mbo = { 128 bmac_mbo_read, bmac_mbo_write, 129 { MIFDO, MIFDI, MIFDC, MIFDIR, 0 } 130 }; 131 132 static inline uint16_t 133 bmac_read_reg(struct bmac_softc *sc, bus_size_t off) 134 { 135 return bus_space_read_2(sc->sc_iot, sc->sc_ioh, off); 136 } 137 138 static inline void 139 bmac_write_reg(struct bmac_softc *sc, bus_size_t off, uint16_t val) 140 { 141 bus_space_write_2(sc->sc_iot, sc->sc_ioh, off, val); 142 } 143 144 static inline void 145 bmac_set_bits(struct bmac_softc *sc, bus_size_t off, uint16_t val) 146 { 147 val |= bmac_read_reg(sc, off); 148 bmac_write_reg(sc, off, val); 149 } 150 151 static inline void 152 bmac_reset_bits(struct bmac_softc *sc, bus_size_t off, uint16_t val) 153 { 154 bmac_write_reg(sc, off, bmac_read_reg(sc, off) & ~val); 155 } 156 157 int 158 bmac_match(device_t parent, cfdata_t cf, void *aux) 159 { 160 struct confargs *ca = aux; 161 162 if (ca->ca_nreg < 24 || ca->ca_nintr < 12) 163 return 0; 164 165 if (strcmp(ca->ca_name, "bmac") == 0) /* bmac */ 166 return 1; 167 if (strcmp(ca->ca_name, "ethernet") == 0) /* bmac+ */ 168 return 1; 169 170 return 0; 171 } 172 173 void 174 bmac_attach(device_t parent, device_t self, void *aux) 175 { 176 struct confargs *ca = aux; 177 struct bmac_softc *sc = device_private(self); 178 struct ifnet *ifp = &sc->sc_if; 179 struct mii_data *mii = &sc->sc_mii; 180 u_char laddr[6]; 181 182 callout_init(&sc->sc_tick_ch, 0); 183 184 sc->sc_dev = self; 185 sc->sc_flags = 0; 186 if (strcmp(ca->ca_name, "ethernet") == 0) { 187 char name[64]; 188 189 memset(name, 0, 64); 190 OF_package_to_path(ca->ca_node, name, sizeof(name)); 191 OF_open(name); 192 sc->sc_flags |= BMAC_BMACPLUS; 193 } 194 195 ca->ca_reg[0] += ca->ca_baseaddr; 196 ca->ca_reg[2] += ca->ca_baseaddr; 197 ca->ca_reg[4] += ca->ca_baseaddr; 198 199 sc->sc_iot = ca->ca_tag; 200 if (bus_space_map(sc->sc_iot, ca->ca_reg[0], ca->ca_reg[1], 0, 201 &sc->sc_ioh) != 0) { 202 aprint_error(": couldn't map %#x", ca->ca_reg[0]); 203 return; 204 } 205 206 bmac_write_reg(sc, INTDISABLE, NoEventsMask); 207 208 if (OF_getprop(ca->ca_node, "local-mac-address", laddr, 6) == -1 && 209 OF_getprop(ca->ca_node, "mac-address", laddr, 6) == -1) { 210 aprint_error(": cannot get mac-address\n"); 211 return; 212 } 213 memcpy(sc->sc_enaddr, laddr, 6); 214 215 sc->sc_txdma = mapiodev(ca->ca_reg[2], PAGE_SIZE, false); 216 sc->sc_rxdma = mapiodev(ca->ca_reg[4], PAGE_SIZE, false); 217 sc->sc_txcmd = dbdma_alloc(BMAC_TXBUFS * sizeof(dbdma_command_t), NULL); 218 sc->sc_rxcmd = dbdma_alloc((BMAC_RXBUFS + 1) * sizeof(dbdma_command_t), 219 NULL); 220 sc->sc_txbuf = malloc(BMAC_BUFLEN * BMAC_TXBUFS, M_DEVBUF, M_NOWAIT); 221 sc->sc_rxbuf = malloc(BMAC_BUFLEN * BMAC_RXBUFS, M_DEVBUF, M_NOWAIT); 222 if (sc->sc_txbuf == NULL || sc->sc_rxbuf == NULL || 223 sc->sc_txcmd == NULL || sc->sc_rxcmd == NULL) { 224 aprint_error("cannot allocate memory\n"); 225 return; 226 } 227 228 aprint_normal(" irq %d,%d: address %s\n", 229 ca->ca_intr[0], ca->ca_intr[2], 230 ether_sprintf(laddr)); 231 232 intr_establish(ca->ca_intr[0], IST_EDGE, IPL_NET, bmac_intr, sc); 233 intr_establish(ca->ca_intr[2], IST_EDGE, IPL_NET, bmac_rint, sc); 234 235 memcpy(ifp->if_xname, device_xname(sc->sc_dev), IFNAMSIZ); 236 ifp->if_softc = sc; 237 ifp->if_ioctl = bmac_ioctl; 238 ifp->if_start = bmac_start; 239 ifp->if_flags = 240 IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_MULTICAST; 241 ifp->if_watchdog = bmac_watchdog; 242 IFQ_SET_READY(&ifp->if_snd); 243 244 mii->mii_ifp = ifp; 245 mii->mii_readreg = bmac_mii_readreg; 246 mii->mii_writereg = bmac_mii_writereg; 247 mii->mii_statchg = bmac_mii_statchg; 248 249 sc->sc_ethercom.ec_mii = mii; 250 ifmedia_init(&mii->mii_media, 0, ether_mediachange, ether_mediastatus); 251 mii_attach(sc->sc_dev, mii, 0xffffffff, MII_PHY_ANY, MII_OFFSET_ANY, 0); 252 253 /* Choose a default media. */ 254 if (LIST_FIRST(&mii->mii_phys) == NULL) { 255 ifmedia_add(&mii->mii_media, IFM_ETHER|IFM_10_T, 0, NULL); 256 ifmedia_set(&mii->mii_media, IFM_ETHER|IFM_10_T); 257 } else 258 ifmedia_set(&mii->mii_media, IFM_ETHER|IFM_AUTO); 259 260 bmac_reset_chip(sc); 261 262 if_attach(ifp); 263 ether_ifattach(ifp, sc->sc_enaddr); 264 } 265 266 /* 267 * Reset and enable bmac by heathrow FCR. 268 */ 269 void 270 bmac_reset_chip(struct bmac_softc *sc) 271 { 272 u_int v; 273 274 dbdma_reset(sc->sc_txdma); 275 dbdma_reset(sc->sc_rxdma); 276 277 v = obio_read_4(HEATHROW_FCR); 278 279 v |= EnetEnable; 280 obio_write_4(HEATHROW_FCR, v); 281 delay(50000); 282 283 v |= ResetEnetCell; 284 obio_write_4(HEATHROW_FCR, v); 285 delay(50000); 286 287 v &= ~ResetEnetCell; 288 obio_write_4(HEATHROW_FCR, v); 289 delay(50000); 290 291 obio_write_4(HEATHROW_FCR, v); 292 } 293 294 void 295 bmac_init(struct bmac_softc *sc) 296 { 297 struct ifnet *ifp = &sc->sc_if; 298 struct ether_header *eh; 299 void *data; 300 int i, tb, bmcr; 301 u_short *p; 302 303 bmac_reset_chip(sc); 304 305 /* XXX */ 306 bmcr = bmac_mii_readreg(sc->sc_dev, 0, MII_BMCR); 307 bmcr &= ~BMCR_ISO; 308 bmac_mii_writereg(sc->sc_dev, 0, MII_BMCR, bmcr); 309 310 bmac_write_reg(sc, RXRST, RxResetValue); 311 bmac_write_reg(sc, TXRST, TxResetBit); 312 313 /* Wait for reset completion. */ 314 for (i = 1000; i > 0; i -= 10) { 315 if ((bmac_read_reg(sc, TXRST) & TxResetBit) == 0) 316 break; 317 delay(10); 318 } 319 if (i <= 0) 320 printf("%s: reset timeout\n", ifp->if_xname); 321 322 if (! (sc->sc_flags & BMAC_BMACPLUS)) 323 bmac_set_bits(sc, XCVRIF, ClkBit|SerialMode|COLActiveLow); 324 325 if ((mfpvr() >> 16) == MPC601) 326 tb = mfrtcl(); 327 else 328 tb = mftbl(); 329 bmac_write_reg(sc, RSEED, tb); 330 bmac_set_bits(sc, XIFC, TxOutputEnable); 331 bmac_read_reg(sc, PAREG); 332 333 /* Reset various counters. */ 334 bmac_write_reg(sc, NCCNT, 0); 335 bmac_write_reg(sc, NTCNT, 0); 336 bmac_write_reg(sc, EXCNT, 0); 337 bmac_write_reg(sc, LTCNT, 0); 338 bmac_write_reg(sc, FRCNT, 0); 339 bmac_write_reg(sc, LECNT, 0); 340 bmac_write_reg(sc, AECNT, 0); 341 bmac_write_reg(sc, FECNT, 0); 342 bmac_write_reg(sc, RXCV, 0); 343 344 /* Set tx fifo information. */ 345 bmac_write_reg(sc, TXTH, 4); /* 4 octets before tx starts */ 346 347 bmac_write_reg(sc, TXFIFOCSR, 0); 348 bmac_write_reg(sc, TXFIFOCSR, TxFIFOEnable); 349 350 /* Set rx fifo information. */ 351 bmac_write_reg(sc, RXFIFOCSR, 0); 352 bmac_write_reg(sc, RXFIFOCSR, RxFIFOEnable); 353 354 /* Clear status register. */ 355 bmac_read_reg(sc, STATUS); 356 357 bmac_write_reg(sc, HASH3, 0); 358 bmac_write_reg(sc, HASH2, 0); 359 bmac_write_reg(sc, HASH1, 0); 360 bmac_write_reg(sc, HASH0, 0); 361 362 /* Set MAC address. */ 363 p = (u_short *)sc->sc_enaddr; 364 bmac_write_reg(sc, MADD0, *p++); 365 bmac_write_reg(sc, MADD1, *p++); 366 bmac_write_reg(sc, MADD2, *p); 367 368 bmac_write_reg(sc, RXCFG, 369 RxCRCEnable | RxHashFilterEnable | RxRejectOwnPackets); 370 371 if (ifp->if_flags & IFF_PROMISC) 372 bmac_set_bits(sc, RXCFG, RxPromiscEnable); 373 374 bmac_init_dma(sc); 375 376 /* Enable TX/RX */ 377 bmac_set_bits(sc, RXCFG, RxMACEnable); 378 bmac_set_bits(sc, TXCFG, TxMACEnable); 379 380 bmac_write_reg(sc, INTDISABLE, NormalIntEvents); 381 382 ifp->if_flags |= IFF_RUNNING; 383 ifp->if_flags &= ~IFF_OACTIVE; 384 ifp->if_timer = 0; 385 386 data = sc->sc_txbuf; 387 eh = (struct ether_header *)data; 388 389 memset(data, 0, sizeof(eh) + ETHERMIN); 390 memcpy(eh->ether_dhost, sc->sc_enaddr, ETHER_ADDR_LEN); 391 memcpy(eh->ether_shost, sc->sc_enaddr, ETHER_ADDR_LEN); 392 bmac_transmit_packet(sc, data, sizeof(eh) + ETHERMIN); 393 394 bmac_start(ifp); 395 396 callout_reset(&sc->sc_tick_ch, hz, bmac_mii_tick, sc); 397 } 398 399 void 400 bmac_init_dma(struct bmac_softc *sc) 401 { 402 dbdma_command_t *cmd = sc->sc_rxcmd; 403 int i; 404 405 dbdma_reset(sc->sc_txdma); 406 dbdma_reset(sc->sc_rxdma); 407 408 memset(sc->sc_txcmd, 0, BMAC_TXBUFS * sizeof(dbdma_command_t)); 409 memset(sc->sc_rxcmd, 0, (BMAC_RXBUFS + 1) * sizeof(dbdma_command_t)); 410 411 for (i = 0; i < BMAC_RXBUFS; i++) { 412 DBDMA_BUILD(cmd, DBDMA_CMD_IN_LAST, 0, BMAC_BUFLEN, 413 vtophys((vaddr_t)sc->sc_rxbuf + BMAC_BUFLEN * i), 414 DBDMA_INT_ALWAYS, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER); 415 cmd++; 416 } 417 DBDMA_BUILD(cmd, DBDMA_CMD_NOP, 0, 0, 0, 418 DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_ALWAYS); 419 out32rb(&cmd->d_cmddep, vtophys((vaddr_t)sc->sc_rxcmd)); 420 421 sc->sc_rxlast = 0; 422 423 dbdma_start(sc->sc_rxdma, sc->sc_rxcmd); 424 } 425 426 int 427 bmac_intr(void *v) 428 { 429 struct bmac_softc *sc = v; 430 int stat; 431 432 stat = bmac_read_reg(sc, STATUS); 433 if (stat == 0) 434 return 0; 435 436 #ifdef BMAC_DEBUG 437 printf("bmac_intr status = 0x%x\n", stat); 438 #endif 439 440 if (stat & IntFrameSent) { 441 sc->sc_if.if_flags &= ~IFF_OACTIVE; 442 sc->sc_if.if_timer = 0; 443 sc->sc_if.if_opackets++; 444 bmac_start(&sc->sc_if); 445 } 446 447 /* XXX should do more! */ 448 449 return 1; 450 } 451 452 int 453 bmac_rint(void *v) 454 { 455 struct bmac_softc *sc = v; 456 struct ifnet *ifp = &sc->sc_if; 457 struct mbuf *m; 458 dbdma_command_t *cmd; 459 int status, resid, count, datalen; 460 int i, n; 461 void *data; 462 463 i = sc->sc_rxlast; 464 for (n = 0; n < BMAC_RXBUFS; n++, i++) { 465 if (i == BMAC_RXBUFS) 466 i = 0; 467 cmd = &sc->sc_rxcmd[i]; 468 status = in16rb(&cmd->d_status); 469 resid = in16rb(&cmd->d_resid); 470 471 #ifdef BMAC_DEBUG 472 if (status != 0 && status != 0x8440 && status != 0x9440) 473 printf("bmac_rint status = 0x%x\n", status); 474 #endif 475 476 if ((status & DBDMA_CNTRL_ACTIVE) == 0) /* 0x9440 | 0x8440 */ 477 continue; 478 count = in16rb(&cmd->d_count); 479 datalen = count - resid - 2; /* 2 == framelen */ 480 if (datalen < sizeof(struct ether_header)) { 481 printf("%s: short packet len = %d\n", 482 ifp->if_xname, datalen); 483 goto next; 484 } 485 DBDMA_BUILD_CMD(cmd, DBDMA_CMD_STOP, 0, 0, 0, 0); 486 data = (char *)sc->sc_rxbuf + BMAC_BUFLEN * i; 487 488 /* XXX Sometimes bmac reads one extra byte. */ 489 if (datalen == ETHER_MAX_LEN + 1) 490 datalen--; 491 492 /* Trim the CRC. */ 493 datalen -= ETHER_CRC_LEN; 494 495 m = bmac_get(sc, data, datalen); 496 if (m == NULL) { 497 ifp->if_ierrors++; 498 goto next; 499 } 500 501 /* 502 * Check if there's a BPF listener on this interface. 503 * If so, hand off the raw packet to BPF. 504 */ 505 bpf_mtap(ifp, m); 506 if_percpuq_enqueue(ifp->if_percpuq, m); 507 ifp->if_ipackets++; 508 509 next: 510 DBDMA_BUILD_CMD(cmd, DBDMA_CMD_IN_LAST, 0, DBDMA_INT_ALWAYS, 511 DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER); 512 513 cmd->d_status = 0; 514 cmd->d_resid = 0; 515 sc->sc_rxlast = i + 1; 516 } 517 ether_mediachange(ifp); 518 519 dbdma_continue(sc->sc_rxdma); 520 521 return 1; 522 } 523 524 void 525 bmac_reset(struct bmac_softc *sc) 526 { 527 int s; 528 529 s = splnet(); 530 bmac_init(sc); 531 splx(s); 532 } 533 534 void 535 bmac_stop(struct bmac_softc *sc) 536 { 537 struct ifnet *ifp = &sc->sc_if; 538 int s; 539 540 s = splnet(); 541 542 callout_stop(&sc->sc_tick_ch); 543 mii_down(&sc->sc_mii); 544 545 /* Disable TX/RX. */ 546 bmac_reset_bits(sc, TXCFG, TxMACEnable); 547 bmac_reset_bits(sc, RXCFG, RxMACEnable); 548 549 /* Disable all interrupts. */ 550 bmac_write_reg(sc, INTDISABLE, NoEventsMask); 551 552 dbdma_stop(sc->sc_txdma); 553 dbdma_stop(sc->sc_rxdma); 554 555 ifp->if_flags &= ~(IFF_UP | IFF_RUNNING); 556 ifp->if_timer = 0; 557 558 splx(s); 559 } 560 561 void 562 bmac_start(struct ifnet *ifp) 563 { 564 struct bmac_softc *sc = ifp->if_softc; 565 struct mbuf *m; 566 int tlen; 567 568 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 569 return; 570 571 while (1) { 572 if (ifp->if_flags & IFF_OACTIVE) 573 return; 574 575 IFQ_DEQUEUE(&ifp->if_snd, m); 576 if (m == 0) 577 break; 578 /* 579 * If BPF is listening on this interface, let it see the 580 * packet before we commit it to the wire. 581 */ 582 bpf_mtap(ifp, m); 583 584 ifp->if_flags |= IFF_OACTIVE; 585 tlen = bmac_put(sc, sc->sc_txbuf, m); 586 587 /* 5 seconds to watch for failing to transmit */ 588 ifp->if_timer = 5; 589 ifp->if_opackets++; /* # of pkts */ 590 591 bmac_transmit_packet(sc, sc->sc_txbuf, tlen); 592 } 593 } 594 595 void 596 bmac_transmit_packet(struct bmac_softc *sc, void *buff, int len) 597 { 598 dbdma_command_t *cmd = sc->sc_txcmd; 599 vaddr_t va = (vaddr_t)buff; 600 601 #ifdef BMAC_DEBUG 602 if (vtophys(va) + len - 1 != vtophys(va + len - 1)) 603 panic("bmac_transmit_packet"); 604 #endif 605 606 DBDMA_BUILD(cmd, DBDMA_CMD_OUT_LAST, 0, len, vtophys(va), 607 DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER); 608 cmd++; 609 DBDMA_BUILD(cmd, DBDMA_CMD_STOP, 0, 0, 0, 610 DBDMA_INT_ALWAYS, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER); 611 612 dbdma_start(sc->sc_txdma, sc->sc_txcmd); 613 } 614 615 int 616 bmac_put(struct bmac_softc *sc, void *buff, struct mbuf *m) 617 { 618 struct mbuf *n; 619 int len, tlen = 0; 620 621 for (; m; m = n) { 622 len = m->m_len; 623 if (len == 0) { 624 MFREE(m, n); 625 continue; 626 } 627 memcpy(buff, mtod(m, void *), len); 628 buff = (char *)buff + len; 629 tlen += len; 630 MFREE(m, n); 631 } 632 if (tlen > PAGE_SIZE) 633 panic("%s: putpacket packet overflow", 634 device_xname(sc->sc_dev)); 635 636 return tlen; 637 } 638 639 struct mbuf * 640 bmac_get(struct bmac_softc *sc, void *pkt, int totlen) 641 { 642 struct mbuf *m; 643 struct mbuf *top, **mp; 644 int len; 645 646 MGETHDR(m, M_DONTWAIT, MT_DATA); 647 if (m == 0) 648 return 0; 649 m_set_rcvif(m, &sc->sc_if); 650 m->m_pkthdr.len = totlen; 651 len = MHLEN; 652 top = 0; 653 mp = ⊤ 654 655 while (totlen > 0) { 656 if (top) { 657 MGET(m, M_DONTWAIT, MT_DATA); 658 if (m == 0) { 659 m_freem(top); 660 return 0; 661 } 662 len = MLEN; 663 } 664 if (totlen >= MINCLSIZE) { 665 MCLGET(m, M_DONTWAIT); 666 if ((m->m_flags & M_EXT) == 0) { 667 m_free(m); 668 m_freem(top); 669 return 0; 670 } 671 len = MCLBYTES; 672 } 673 m->m_len = len = min(totlen, len); 674 memcpy(mtod(m, void *), pkt, len); 675 pkt = (char *)pkt + len; 676 totlen -= len; 677 *mp = m; 678 mp = &m->m_next; 679 } 680 681 return top; 682 } 683 684 void 685 bmac_watchdog(struct ifnet *ifp) 686 { 687 struct bmac_softc *sc = ifp->if_softc; 688 689 bmac_reset_bits(sc, RXCFG, RxMACEnable); 690 bmac_reset_bits(sc, TXCFG, TxMACEnable); 691 692 printf("%s: device timeout\n", ifp->if_xname); 693 ifp->if_oerrors++; 694 695 bmac_reset(sc); 696 } 697 698 int 699 bmac_ioctl(struct ifnet *ifp, unsigned long cmd, void *data) 700 { 701 struct bmac_softc *sc = ifp->if_softc; 702 struct ifaddr *ifa = (struct ifaddr *)data; 703 int s, error = 0; 704 705 s = splnet(); 706 707 switch (cmd) { 708 709 case SIOCINITIFADDR: 710 ifp->if_flags |= IFF_UP; 711 712 bmac_init(sc); 713 switch (ifa->ifa_addr->sa_family) { 714 #ifdef INET 715 case AF_INET: 716 arp_ifinit(ifp, ifa); 717 break; 718 #endif 719 default: 720 break; 721 } 722 break; 723 724 case SIOCSIFFLAGS: 725 if ((error = ifioctl_common(ifp, cmd, data)) != 0) 726 break; 727 /* XXX see the comment in ed_ioctl() about code re-use */ 728 if ((ifp->if_flags & IFF_UP) == 0 && 729 (ifp->if_flags & IFF_RUNNING) != 0) { 730 /* 731 * If interface is marked down and it is running, then 732 * stop it. 733 */ 734 bmac_stop(sc); 735 ifp->if_flags &= ~IFF_RUNNING; 736 } else if ((ifp->if_flags & IFF_UP) != 0 && 737 (ifp->if_flags & IFF_RUNNING) == 0) { 738 /* 739 * If interface is marked up and it is stopped, then 740 * start it. 741 */ 742 bmac_init(sc); 743 } else { 744 /* 745 * Reset the interface to pick up changes in any other 746 * flags that affect hardware registers. 747 */ 748 /*bmac_stop(sc);*/ 749 bmac_init(sc); 750 } 751 #ifdef BMAC_DEBUG 752 if (ifp->if_flags & IFF_DEBUG) 753 sc->sc_flags |= BMAC_DEBUGFLAG; 754 #endif 755 break; 756 757 case SIOCADDMULTI: 758 case SIOCDELMULTI: 759 case SIOCGIFMEDIA: 760 case SIOCSIFMEDIA: 761 if ((error = ether_ioctl(ifp, cmd, data)) == ENETRESET) { 762 /* 763 * Multicast list has changed; set the hardware filter 764 * accordingly. 765 */ 766 if (ifp->if_flags & IFF_RUNNING) { 767 bmac_init(sc); 768 bmac_setladrf(sc); 769 } 770 error = 0; 771 } 772 break; 773 default: 774 error = ether_ioctl(ifp, cmd, data); 775 break; 776 } 777 778 splx(s); 779 return error; 780 } 781 782 /* 783 * Set up the logical address filter. 784 */ 785 void 786 bmac_setladrf(struct bmac_softc *sc) 787 { 788 struct ifnet *ifp = &sc->sc_if; 789 struct ether_multi *enm; 790 struct ether_multistep step; 791 u_int32_t crc; 792 u_int16_t hash[4]; 793 int x; 794 795 /* 796 * Set up multicast address filter by passing all multicast addresses 797 * through a crc generator, and then using the high order 6 bits as an 798 * index into the 64 bit logical address filter. The high order bit 799 * selects the word, while the rest of the bits select the bit within 800 * the word. 801 */ 802 803 if (ifp->if_flags & IFF_PROMISC) { 804 bmac_set_bits(sc, RXCFG, RxPromiscEnable); 805 return; 806 } 807 808 if (ifp->if_flags & IFF_ALLMULTI) { 809 hash[3] = hash[2] = hash[1] = hash[0] = 0xffff; 810 goto chipit; 811 } 812 813 hash[3] = hash[2] = hash[1] = hash[0] = 0; 814 815 ETHER_FIRST_MULTI(step, &sc->sc_ethercom, enm); 816 while (enm != NULL) { 817 if (memcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) { 818 /* 819 * We must listen to a range of multicast addresses. 820 * For now, just accept all multicasts, rather than 821 * trying to set only those filter bits needed to match 822 * the range. (At this time, the only use of address 823 * ranges is for IP multicast routing, for which the 824 * range is big enough to require all bits set.) 825 */ 826 hash[3] = hash[2] = hash[1] = hash[0] = 0xffff; 827 ifp->if_flags |= IFF_ALLMULTI; 828 goto chipit; 829 } 830 831 crc = ether_crc32_le(enm->enm_addrlo, ETHER_ADDR_LEN); 832 833 /* Just want the 6 most significant bits. */ 834 crc >>= 26; 835 836 /* Set the corresponding bit in the filter. */ 837 hash[crc >> 4] |= 1 << (crc & 0xf); 838 839 ETHER_NEXT_MULTI(step, enm); 840 } 841 842 ifp->if_flags &= ~IFF_ALLMULTI; 843 844 chipit: 845 bmac_write_reg(sc, HASH0, hash[0]); 846 bmac_write_reg(sc, HASH1, hash[1]); 847 bmac_write_reg(sc, HASH2, hash[2]); 848 bmac_write_reg(sc, HASH3, hash[3]); 849 x = bmac_read_reg(sc, RXCFG); 850 x &= ~RxPromiscEnable; 851 x |= RxHashFilterEnable; 852 bmac_write_reg(sc, RXCFG, x); 853 } 854 855 int 856 bmac_mii_readreg(device_t self, int phy, int reg) 857 { 858 return mii_bitbang_readreg(self, &bmac_mbo, phy, reg); 859 } 860 861 void 862 bmac_mii_writereg(device_t self, int phy, int reg, int val) 863 { 864 mii_bitbang_writereg(self, &bmac_mbo, phy, reg, val); 865 } 866 867 u_int32_t 868 bmac_mbo_read(device_t self) 869 { 870 struct bmac_softc *sc = device_private(self); 871 872 return bmac_read_reg(sc, MIFCSR); 873 } 874 875 void 876 bmac_mbo_write(device_t self, u_int32_t val) 877 { 878 struct bmac_softc *sc = device_private(self); 879 880 bmac_write_reg(sc, MIFCSR, val); 881 } 882 883 void 884 bmac_mii_statchg(struct ifnet *ifp) 885 { 886 struct bmac_softc *sc = ifp->if_softc; 887 int x; 888 889 /* Update duplex mode in TX configuration */ 890 x = bmac_read_reg(sc, TXCFG); 891 if ((IFM_OPTIONS(sc->sc_mii.mii_media_active) & IFM_FDX) != 0) 892 x |= TxFullDuplex; 893 else 894 x &= ~TxFullDuplex; 895 bmac_write_reg(sc, TXCFG, x); 896 897 #ifdef BMAC_DEBUG 898 printf("bmac_mii_statchg 0x%x\n", 899 IFM_OPTIONS(sc->sc_mii.mii_media_active)); 900 #endif 901 } 902 903 void 904 bmac_mii_tick(void *v) 905 { 906 struct bmac_softc *sc = v; 907 int s; 908 909 s = splnet(); 910 mii_tick(&sc->sc_mii); 911 splx(s); 912 913 callout_reset(&sc->sc_tick_ch, hz, bmac_mii_tick, sc); 914 } 915