1 /* $NetBSD: if_bm.c,v 1.46 2012/07/22 14:32:51 matt Exp $ */ 2 3 /*- 4 * Copyright (C) 1998, 1999, 2000 Tsubai Masanari. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __KERNEL_RCSID(0, "$NetBSD: if_bm.c,v 1.46 2012/07/22 14:32:51 matt Exp $"); 31 32 #include "opt_inet.h" 33 34 #include <sys/param.h> 35 #include <sys/device.h> 36 #include <sys/ioctl.h> 37 #include <sys/kernel.h> 38 #include <sys/mbuf.h> 39 #include <sys/socket.h> 40 #include <sys/systm.h> 41 #include <sys/callout.h> 42 43 #include <uvm/uvm_extern.h> 44 45 #include <net/if.h> 46 #include <net/if_dl.h> 47 #include <net/if_ether.h> 48 #include <net/if_media.h> 49 50 #include <net/bpf.h> 51 52 #ifdef INET 53 #include <netinet/in.h> 54 #include <netinet/if_inarp.h> 55 #endif 56 57 58 #include <dev/ofw/openfirm.h> 59 60 #include <dev/mii/mii.h> 61 #include <dev/mii/miivar.h> 62 #include <dev/mii/mii_bitbang.h> 63 64 #include <powerpc/spr.h> 65 #include <powerpc/oea/spr.h> 66 67 #include <machine/autoconf.h> 68 #include <machine/pio.h> 69 70 #include <macppc/dev/dbdma.h> 71 #include <macppc/dev/if_bmreg.h> 72 #include <macppc/dev/obiovar.h> 73 74 #define BMAC_TXBUFS 2 75 #define BMAC_RXBUFS 16 76 #define BMAC_BUFLEN 2048 77 78 struct bmac_softc { 79 device_t sc_dev; 80 struct ethercom sc_ethercom; 81 #define sc_if sc_ethercom.ec_if 82 struct callout sc_tick_ch; 83 bus_space_tag_t sc_iot; 84 bus_space_handle_t sc_ioh; 85 dbdma_regmap_t *sc_txdma; 86 dbdma_regmap_t *sc_rxdma; 87 dbdma_command_t *sc_txcmd; 88 dbdma_command_t *sc_rxcmd; 89 void *sc_txbuf; 90 void *sc_rxbuf; 91 int sc_rxlast; 92 int sc_flags; 93 struct mii_data sc_mii; 94 u_char sc_enaddr[6]; 95 }; 96 97 #define BMAC_BMACPLUS 0x01 98 #define BMAC_DEBUGFLAG 0x02 99 100 int bmac_match(device_t, cfdata_t, void *); 101 void bmac_attach(device_t, device_t, void *); 102 void bmac_reset_chip(struct bmac_softc *); 103 void bmac_init(struct bmac_softc *); 104 void bmac_init_dma(struct bmac_softc *); 105 int bmac_intr(void *); 106 int bmac_rint(void *); 107 void bmac_reset(struct bmac_softc *); 108 void bmac_stop(struct bmac_softc *); 109 void bmac_start(struct ifnet *); 110 void bmac_transmit_packet(struct bmac_softc *, void *, int); 111 int bmac_put(struct bmac_softc *, void *, struct mbuf *); 112 struct mbuf *bmac_get(struct bmac_softc *, void *, int); 113 void bmac_watchdog(struct ifnet *); 114 int bmac_ioctl(struct ifnet *, u_long, void *); 115 void bmac_setladrf(struct bmac_softc *); 116 117 int bmac_mii_readreg(device_t, int, int); 118 void bmac_mii_writereg(device_t, int, int, int); 119 void bmac_mii_statchg(struct ifnet *); 120 void bmac_mii_tick(void *); 121 u_int32_t bmac_mbo_read(device_t); 122 void bmac_mbo_write(device_t, u_int32_t); 123 124 CFATTACH_DECL_NEW(bm, sizeof(struct bmac_softc), 125 bmac_match, bmac_attach, NULL, NULL); 126 127 const struct mii_bitbang_ops bmac_mbo = { 128 bmac_mbo_read, bmac_mbo_write, 129 { MIFDO, MIFDI, MIFDC, MIFDIR, 0 } 130 }; 131 132 static inline uint16_t 133 bmac_read_reg(struct bmac_softc *sc, bus_size_t off) 134 { 135 return bus_space_read_2(sc->sc_iot, sc->sc_ioh, off); 136 } 137 138 static inline void 139 bmac_write_reg(struct bmac_softc *sc, bus_size_t off, uint16_t val) 140 { 141 bus_space_write_2(sc->sc_iot, sc->sc_ioh, off, val); 142 } 143 144 static inline void 145 bmac_set_bits(struct bmac_softc *sc, bus_size_t off, uint16_t val) 146 { 147 val |= bmac_read_reg(sc, off); 148 bmac_write_reg(sc, off, val); 149 } 150 151 static inline void 152 bmac_reset_bits(struct bmac_softc *sc, bus_size_t off, uint16_t val) 153 { 154 bmac_write_reg(sc, off, bmac_read_reg(sc, off) & ~val); 155 } 156 157 int 158 bmac_match(device_t parent, cfdata_t cf, void *aux) 159 { 160 struct confargs *ca = aux; 161 162 if (ca->ca_nreg < 24 || ca->ca_nintr < 12) 163 return 0; 164 165 if (strcmp(ca->ca_name, "bmac") == 0) /* bmac */ 166 return 1; 167 if (strcmp(ca->ca_name, "ethernet") == 0) /* bmac+ */ 168 return 1; 169 170 return 0; 171 } 172 173 void 174 bmac_attach(device_t parent, device_t self, void *aux) 175 { 176 struct confargs *ca = aux; 177 struct bmac_softc *sc = device_private(self); 178 struct ifnet *ifp = &sc->sc_if; 179 struct mii_data *mii = &sc->sc_mii; 180 u_char laddr[6]; 181 182 callout_init(&sc->sc_tick_ch, 0); 183 184 sc->sc_dev = self; 185 sc->sc_flags = 0; 186 if (strcmp(ca->ca_name, "ethernet") == 0) { 187 char name[64]; 188 189 memset(name, 0, 64); 190 OF_package_to_path(ca->ca_node, name, sizeof(name)); 191 OF_open(name); 192 sc->sc_flags |= BMAC_BMACPLUS; 193 } 194 195 ca->ca_reg[0] += ca->ca_baseaddr; 196 ca->ca_reg[2] += ca->ca_baseaddr; 197 ca->ca_reg[4] += ca->ca_baseaddr; 198 199 sc->sc_iot = ca->ca_tag; 200 if (bus_space_map(sc->sc_iot, ca->ca_reg[0], ca->ca_reg[1], 0, 201 &sc->sc_ioh) != 0) { 202 aprint_error(": couldn't map %#x", ca->ca_reg[0]); 203 return; 204 } 205 206 bmac_write_reg(sc, INTDISABLE, NoEventsMask); 207 208 if (OF_getprop(ca->ca_node, "local-mac-address", laddr, 6) == -1 && 209 OF_getprop(ca->ca_node, "mac-address", laddr, 6) == -1) { 210 aprint_error(": cannot get mac-address\n"); 211 return; 212 } 213 memcpy(sc->sc_enaddr, laddr, 6); 214 215 sc->sc_txdma = mapiodev(ca->ca_reg[2], PAGE_SIZE, false); 216 sc->sc_rxdma = mapiodev(ca->ca_reg[4], PAGE_SIZE, false); 217 sc->sc_txcmd = dbdma_alloc(BMAC_TXBUFS * sizeof(dbdma_command_t)); 218 sc->sc_rxcmd = dbdma_alloc((BMAC_RXBUFS + 1) * sizeof(dbdma_command_t)); 219 sc->sc_txbuf = malloc(BMAC_BUFLEN * BMAC_TXBUFS, M_DEVBUF, M_NOWAIT); 220 sc->sc_rxbuf = malloc(BMAC_BUFLEN * BMAC_RXBUFS, M_DEVBUF, M_NOWAIT); 221 if (sc->sc_txbuf == NULL || sc->sc_rxbuf == NULL || 222 sc->sc_txcmd == NULL || sc->sc_rxcmd == NULL) { 223 aprint_error("cannot allocate memory\n"); 224 return; 225 } 226 227 aprint_normal(" irq %d,%d: address %s\n", 228 ca->ca_intr[0], ca->ca_intr[2], 229 ether_sprintf(laddr)); 230 231 intr_establish(ca->ca_intr[0], IST_EDGE, IPL_NET, bmac_intr, sc); 232 intr_establish(ca->ca_intr[2], IST_EDGE, IPL_NET, bmac_rint, sc); 233 234 memcpy(ifp->if_xname, device_xname(sc->sc_dev), IFNAMSIZ); 235 ifp->if_softc = sc; 236 ifp->if_ioctl = bmac_ioctl; 237 ifp->if_start = bmac_start; 238 ifp->if_flags = 239 IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_MULTICAST; 240 ifp->if_watchdog = bmac_watchdog; 241 IFQ_SET_READY(&ifp->if_snd); 242 243 mii->mii_ifp = ifp; 244 mii->mii_readreg = bmac_mii_readreg; 245 mii->mii_writereg = bmac_mii_writereg; 246 mii->mii_statchg = bmac_mii_statchg; 247 248 sc->sc_ethercom.ec_mii = mii; 249 ifmedia_init(&mii->mii_media, 0, ether_mediachange, ether_mediastatus); 250 mii_attach(sc->sc_dev, mii, 0xffffffff, MII_PHY_ANY, MII_OFFSET_ANY, 0); 251 252 /* Choose a default media. */ 253 if (LIST_FIRST(&mii->mii_phys) == NULL) { 254 ifmedia_add(&mii->mii_media, IFM_ETHER|IFM_10_T, 0, NULL); 255 ifmedia_set(&mii->mii_media, IFM_ETHER|IFM_10_T); 256 } else 257 ifmedia_set(&mii->mii_media, IFM_ETHER|IFM_AUTO); 258 259 bmac_reset_chip(sc); 260 261 if_attach(ifp); 262 ether_ifattach(ifp, sc->sc_enaddr); 263 } 264 265 /* 266 * Reset and enable bmac by heathrow FCR. 267 */ 268 void 269 bmac_reset_chip(struct bmac_softc *sc) 270 { 271 u_int v; 272 273 dbdma_reset(sc->sc_txdma); 274 dbdma_reset(sc->sc_rxdma); 275 276 v = obio_read_4(HEATHROW_FCR); 277 278 v |= EnetEnable; 279 obio_write_4(HEATHROW_FCR, v); 280 delay(50000); 281 282 v |= ResetEnetCell; 283 obio_write_4(HEATHROW_FCR, v); 284 delay(50000); 285 286 v &= ~ResetEnetCell; 287 obio_write_4(HEATHROW_FCR, v); 288 delay(50000); 289 290 obio_write_4(HEATHROW_FCR, v); 291 } 292 293 void 294 bmac_init(struct bmac_softc *sc) 295 { 296 struct ifnet *ifp = &sc->sc_if; 297 struct ether_header *eh; 298 void *data; 299 int i, tb, bmcr; 300 u_short *p; 301 302 bmac_reset_chip(sc); 303 304 /* XXX */ 305 bmcr = bmac_mii_readreg(sc->sc_dev, 0, MII_BMCR); 306 bmcr &= ~BMCR_ISO; 307 bmac_mii_writereg(sc->sc_dev, 0, MII_BMCR, bmcr); 308 309 bmac_write_reg(sc, RXRST, RxResetValue); 310 bmac_write_reg(sc, TXRST, TxResetBit); 311 312 /* Wait for reset completion. */ 313 for (i = 1000; i > 0; i -= 10) { 314 if ((bmac_read_reg(sc, TXRST) & TxResetBit) == 0) 315 break; 316 delay(10); 317 } 318 if (i <= 0) 319 printf("%s: reset timeout\n", ifp->if_xname); 320 321 if (! (sc->sc_flags & BMAC_BMACPLUS)) 322 bmac_set_bits(sc, XCVRIF, ClkBit|SerialMode|COLActiveLow); 323 324 if ((mfpvr() >> 16) == MPC601) 325 tb = mfrtcl(); 326 else 327 tb = mftbl(); 328 bmac_write_reg(sc, RSEED, tb); 329 bmac_set_bits(sc, XIFC, TxOutputEnable); 330 bmac_read_reg(sc, PAREG); 331 332 /* Reset various counters. */ 333 bmac_write_reg(sc, NCCNT, 0); 334 bmac_write_reg(sc, NTCNT, 0); 335 bmac_write_reg(sc, EXCNT, 0); 336 bmac_write_reg(sc, LTCNT, 0); 337 bmac_write_reg(sc, FRCNT, 0); 338 bmac_write_reg(sc, LECNT, 0); 339 bmac_write_reg(sc, AECNT, 0); 340 bmac_write_reg(sc, FECNT, 0); 341 bmac_write_reg(sc, RXCV, 0); 342 343 /* Set tx fifo information. */ 344 bmac_write_reg(sc, TXTH, 4); /* 4 octets before tx starts */ 345 346 bmac_write_reg(sc, TXFIFOCSR, 0); 347 bmac_write_reg(sc, TXFIFOCSR, TxFIFOEnable); 348 349 /* Set rx fifo information. */ 350 bmac_write_reg(sc, RXFIFOCSR, 0); 351 bmac_write_reg(sc, RXFIFOCSR, RxFIFOEnable); 352 353 /* Clear status register. */ 354 bmac_read_reg(sc, STATUS); 355 356 bmac_write_reg(sc, HASH3, 0); 357 bmac_write_reg(sc, HASH2, 0); 358 bmac_write_reg(sc, HASH1, 0); 359 bmac_write_reg(sc, HASH0, 0); 360 361 /* Set MAC address. */ 362 p = (u_short *)sc->sc_enaddr; 363 bmac_write_reg(sc, MADD0, *p++); 364 bmac_write_reg(sc, MADD1, *p++); 365 bmac_write_reg(sc, MADD2, *p); 366 367 bmac_write_reg(sc, RXCFG, 368 RxCRCEnable | RxHashFilterEnable | RxRejectOwnPackets); 369 370 if (ifp->if_flags & IFF_PROMISC) 371 bmac_set_bits(sc, RXCFG, RxPromiscEnable); 372 373 bmac_init_dma(sc); 374 375 /* Enable TX/RX */ 376 bmac_set_bits(sc, RXCFG, RxMACEnable); 377 bmac_set_bits(sc, TXCFG, TxMACEnable); 378 379 bmac_write_reg(sc, INTDISABLE, NormalIntEvents); 380 381 ifp->if_flags |= IFF_RUNNING; 382 ifp->if_flags &= ~IFF_OACTIVE; 383 ifp->if_timer = 0; 384 385 data = sc->sc_txbuf; 386 eh = (struct ether_header *)data; 387 388 memset(data, 0, sizeof(eh) + ETHERMIN); 389 memcpy(eh->ether_dhost, sc->sc_enaddr, ETHER_ADDR_LEN); 390 memcpy(eh->ether_shost, sc->sc_enaddr, ETHER_ADDR_LEN); 391 bmac_transmit_packet(sc, data, sizeof(eh) + ETHERMIN); 392 393 bmac_start(ifp); 394 395 callout_reset(&sc->sc_tick_ch, hz, bmac_mii_tick, sc); 396 } 397 398 void 399 bmac_init_dma(struct bmac_softc *sc) 400 { 401 dbdma_command_t *cmd = sc->sc_rxcmd; 402 int i; 403 404 dbdma_reset(sc->sc_txdma); 405 dbdma_reset(sc->sc_rxdma); 406 407 memset(sc->sc_txcmd, 0, BMAC_TXBUFS * sizeof(dbdma_command_t)); 408 memset(sc->sc_rxcmd, 0, (BMAC_RXBUFS + 1) * sizeof(dbdma_command_t)); 409 410 for (i = 0; i < BMAC_RXBUFS; i++) { 411 DBDMA_BUILD(cmd, DBDMA_CMD_IN_LAST, 0, BMAC_BUFLEN, 412 vtophys((vaddr_t)sc->sc_rxbuf + BMAC_BUFLEN * i), 413 DBDMA_INT_ALWAYS, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER); 414 cmd++; 415 } 416 DBDMA_BUILD(cmd, DBDMA_CMD_NOP, 0, 0, 0, 417 DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_ALWAYS); 418 out32rb(&cmd->d_cmddep, vtophys((vaddr_t)sc->sc_rxcmd)); 419 420 sc->sc_rxlast = 0; 421 422 dbdma_start(sc->sc_rxdma, sc->sc_rxcmd); 423 } 424 425 int 426 bmac_intr(void *v) 427 { 428 struct bmac_softc *sc = v; 429 int stat; 430 431 stat = bmac_read_reg(sc, STATUS); 432 if (stat == 0) 433 return 0; 434 435 #ifdef BMAC_DEBUG 436 printf("bmac_intr status = 0x%x\n", stat); 437 #endif 438 439 if (stat & IntFrameSent) { 440 sc->sc_if.if_flags &= ~IFF_OACTIVE; 441 sc->sc_if.if_timer = 0; 442 sc->sc_if.if_opackets++; 443 bmac_start(&sc->sc_if); 444 } 445 446 /* XXX should do more! */ 447 448 return 1; 449 } 450 451 int 452 bmac_rint(void *v) 453 { 454 struct bmac_softc *sc = v; 455 struct ifnet *ifp = &sc->sc_if; 456 struct mbuf *m; 457 dbdma_command_t *cmd; 458 int status, resid, count, datalen; 459 int i, n; 460 void *data; 461 462 i = sc->sc_rxlast; 463 for (n = 0; n < BMAC_RXBUFS; n++, i++) { 464 if (i == BMAC_RXBUFS) 465 i = 0; 466 cmd = &sc->sc_rxcmd[i]; 467 status = in16rb(&cmd->d_status); 468 resid = in16rb(&cmd->d_resid); 469 470 #ifdef BMAC_DEBUG 471 if (status != 0 && status != 0x8440 && status != 0x9440) 472 printf("bmac_rint status = 0x%x\n", status); 473 #endif 474 475 if ((status & DBDMA_CNTRL_ACTIVE) == 0) /* 0x9440 | 0x8440 */ 476 continue; 477 count = in16rb(&cmd->d_count); 478 datalen = count - resid - 2; /* 2 == framelen */ 479 if (datalen < sizeof(struct ether_header)) { 480 printf("%s: short packet len = %d\n", 481 ifp->if_xname, datalen); 482 goto next; 483 } 484 DBDMA_BUILD_CMD(cmd, DBDMA_CMD_STOP, 0, 0, 0, 0); 485 data = (char *)sc->sc_rxbuf + BMAC_BUFLEN * i; 486 487 /* XXX Sometimes bmac reads one extra byte. */ 488 if (datalen == ETHER_MAX_LEN + 1) 489 datalen--; 490 491 /* Trim the CRC. */ 492 datalen -= ETHER_CRC_LEN; 493 494 m = bmac_get(sc, data, datalen); 495 if (m == NULL) { 496 ifp->if_ierrors++; 497 goto next; 498 } 499 500 /* 501 * Check if there's a BPF listener on this interface. 502 * If so, hand off the raw packet to BPF. 503 */ 504 bpf_mtap(ifp, m); 505 (*ifp->if_input)(ifp, m); 506 ifp->if_ipackets++; 507 508 next: 509 DBDMA_BUILD_CMD(cmd, DBDMA_CMD_IN_LAST, 0, DBDMA_INT_ALWAYS, 510 DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER); 511 512 cmd->d_status = 0; 513 cmd->d_resid = 0; 514 sc->sc_rxlast = i + 1; 515 } 516 ether_mediachange(ifp); 517 518 dbdma_continue(sc->sc_rxdma); 519 520 return 1; 521 } 522 523 void 524 bmac_reset(struct bmac_softc *sc) 525 { 526 int s; 527 528 s = splnet(); 529 bmac_init(sc); 530 splx(s); 531 } 532 533 void 534 bmac_stop(struct bmac_softc *sc) 535 { 536 struct ifnet *ifp = &sc->sc_if; 537 int s; 538 539 s = splnet(); 540 541 callout_stop(&sc->sc_tick_ch); 542 mii_down(&sc->sc_mii); 543 544 /* Disable TX/RX. */ 545 bmac_reset_bits(sc, TXCFG, TxMACEnable); 546 bmac_reset_bits(sc, RXCFG, RxMACEnable); 547 548 /* Disable all interrupts. */ 549 bmac_write_reg(sc, INTDISABLE, NoEventsMask); 550 551 dbdma_stop(sc->sc_txdma); 552 dbdma_stop(sc->sc_rxdma); 553 554 ifp->if_flags &= ~(IFF_UP | IFF_RUNNING); 555 ifp->if_timer = 0; 556 557 splx(s); 558 } 559 560 void 561 bmac_start(struct ifnet *ifp) 562 { 563 struct bmac_softc *sc = ifp->if_softc; 564 struct mbuf *m; 565 int tlen; 566 567 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 568 return; 569 570 while (1) { 571 if (ifp->if_flags & IFF_OACTIVE) 572 return; 573 574 IFQ_DEQUEUE(&ifp->if_snd, m); 575 if (m == 0) 576 break; 577 /* 578 * If BPF is listening on this interface, let it see the 579 * packet before we commit it to the wire. 580 */ 581 bpf_mtap(ifp, m); 582 583 ifp->if_flags |= IFF_OACTIVE; 584 tlen = bmac_put(sc, sc->sc_txbuf, m); 585 586 /* 5 seconds to watch for failing to transmit */ 587 ifp->if_timer = 5; 588 ifp->if_opackets++; /* # of pkts */ 589 590 bmac_transmit_packet(sc, sc->sc_txbuf, tlen); 591 } 592 } 593 594 void 595 bmac_transmit_packet(struct bmac_softc *sc, void *buff, int len) 596 { 597 dbdma_command_t *cmd = sc->sc_txcmd; 598 vaddr_t va = (vaddr_t)buff; 599 600 #ifdef BMAC_DEBUG 601 if (vtophys(va) + len - 1 != vtophys(va + len - 1)) 602 panic("bmac_transmit_packet"); 603 #endif 604 605 DBDMA_BUILD(cmd, DBDMA_CMD_OUT_LAST, 0, len, vtophys(va), 606 DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER); 607 cmd++; 608 DBDMA_BUILD(cmd, DBDMA_CMD_STOP, 0, 0, 0, 609 DBDMA_INT_ALWAYS, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER); 610 611 dbdma_start(sc->sc_txdma, sc->sc_txcmd); 612 } 613 614 int 615 bmac_put(struct bmac_softc *sc, void *buff, struct mbuf *m) 616 { 617 struct mbuf *n; 618 int len, tlen = 0; 619 620 for (; m; m = n) { 621 len = m->m_len; 622 if (len == 0) { 623 MFREE(m, n); 624 continue; 625 } 626 memcpy(buff, mtod(m, void *), len); 627 buff = (char *)buff + len; 628 tlen += len; 629 MFREE(m, n); 630 } 631 if (tlen > PAGE_SIZE) 632 panic("%s: putpacket packet overflow", 633 device_xname(sc->sc_dev)); 634 635 return tlen; 636 } 637 638 struct mbuf * 639 bmac_get(struct bmac_softc *sc, void *pkt, int totlen) 640 { 641 struct mbuf *m; 642 struct mbuf *top, **mp; 643 int len; 644 645 MGETHDR(m, M_DONTWAIT, MT_DATA); 646 if (m == 0) 647 return 0; 648 m->m_pkthdr.rcvif = &sc->sc_if; 649 m->m_pkthdr.len = totlen; 650 len = MHLEN; 651 top = 0; 652 mp = ⊤ 653 654 while (totlen > 0) { 655 if (top) { 656 MGET(m, M_DONTWAIT, MT_DATA); 657 if (m == 0) { 658 m_freem(top); 659 return 0; 660 } 661 len = MLEN; 662 } 663 if (totlen >= MINCLSIZE) { 664 MCLGET(m, M_DONTWAIT); 665 if ((m->m_flags & M_EXT) == 0) { 666 m_free(m); 667 m_freem(top); 668 return 0; 669 } 670 len = MCLBYTES; 671 } 672 m->m_len = len = min(totlen, len); 673 memcpy(mtod(m, void *), pkt, len); 674 pkt = (char *)pkt + len; 675 totlen -= len; 676 *mp = m; 677 mp = &m->m_next; 678 } 679 680 return top; 681 } 682 683 void 684 bmac_watchdog(struct ifnet *ifp) 685 { 686 struct bmac_softc *sc = ifp->if_softc; 687 688 bmac_reset_bits(sc, RXCFG, RxMACEnable); 689 bmac_reset_bits(sc, TXCFG, TxMACEnable); 690 691 printf("%s: device timeout\n", ifp->if_xname); 692 ifp->if_oerrors++; 693 694 bmac_reset(sc); 695 } 696 697 int 698 bmac_ioctl(struct ifnet *ifp, unsigned long cmd, void *data) 699 { 700 struct bmac_softc *sc = ifp->if_softc; 701 struct ifaddr *ifa = (struct ifaddr *)data; 702 int s, error = 0; 703 704 s = splnet(); 705 706 switch (cmd) { 707 708 case SIOCINITIFADDR: 709 ifp->if_flags |= IFF_UP; 710 711 bmac_init(sc); 712 switch (ifa->ifa_addr->sa_family) { 713 #ifdef INET 714 case AF_INET: 715 arp_ifinit(ifp, ifa); 716 break; 717 #endif 718 default: 719 break; 720 } 721 break; 722 723 case SIOCSIFFLAGS: 724 if ((error = ifioctl_common(ifp, cmd, data)) != 0) 725 break; 726 /* XXX see the comment in ed_ioctl() about code re-use */ 727 if ((ifp->if_flags & IFF_UP) == 0 && 728 (ifp->if_flags & IFF_RUNNING) != 0) { 729 /* 730 * If interface is marked down and it is running, then 731 * stop it. 732 */ 733 bmac_stop(sc); 734 ifp->if_flags &= ~IFF_RUNNING; 735 } else if ((ifp->if_flags & IFF_UP) != 0 && 736 (ifp->if_flags & IFF_RUNNING) == 0) { 737 /* 738 * If interface is marked up and it is stopped, then 739 * start it. 740 */ 741 bmac_init(sc); 742 } else { 743 /* 744 * Reset the interface to pick up changes in any other 745 * flags that affect hardware registers. 746 */ 747 /*bmac_stop(sc);*/ 748 bmac_init(sc); 749 } 750 #ifdef BMAC_DEBUG 751 if (ifp->if_flags & IFF_DEBUG) 752 sc->sc_flags |= BMAC_DEBUGFLAG; 753 #endif 754 break; 755 756 case SIOCADDMULTI: 757 case SIOCDELMULTI: 758 case SIOCGIFMEDIA: 759 case SIOCSIFMEDIA: 760 if ((error = ether_ioctl(ifp, cmd, data)) == ENETRESET) { 761 /* 762 * Multicast list has changed; set the hardware filter 763 * accordingly. 764 */ 765 if (ifp->if_flags & IFF_RUNNING) { 766 bmac_init(sc); 767 bmac_setladrf(sc); 768 } 769 error = 0; 770 } 771 break; 772 default: 773 error = ether_ioctl(ifp, cmd, data); 774 break; 775 } 776 777 splx(s); 778 return error; 779 } 780 781 /* 782 * Set up the logical address filter. 783 */ 784 void 785 bmac_setladrf(struct bmac_softc *sc) 786 { 787 struct ifnet *ifp = &sc->sc_if; 788 struct ether_multi *enm; 789 struct ether_multistep step; 790 u_int32_t crc; 791 u_int16_t hash[4]; 792 int x; 793 794 /* 795 * Set up multicast address filter by passing all multicast addresses 796 * through a crc generator, and then using the high order 6 bits as an 797 * index into the 64 bit logical address filter. The high order bit 798 * selects the word, while the rest of the bits select the bit within 799 * the word. 800 */ 801 802 if (ifp->if_flags & IFF_PROMISC) { 803 bmac_set_bits(sc, RXCFG, RxPromiscEnable); 804 return; 805 } 806 807 if (ifp->if_flags & IFF_ALLMULTI) { 808 hash[3] = hash[2] = hash[1] = hash[0] = 0xffff; 809 goto chipit; 810 } 811 812 hash[3] = hash[2] = hash[1] = hash[0] = 0; 813 814 ETHER_FIRST_MULTI(step, &sc->sc_ethercom, enm); 815 while (enm != NULL) { 816 if (memcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) { 817 /* 818 * We must listen to a range of multicast addresses. 819 * For now, just accept all multicasts, rather than 820 * trying to set only those filter bits needed to match 821 * the range. (At this time, the only use of address 822 * ranges is for IP multicast routing, for which the 823 * range is big enough to require all bits set.) 824 */ 825 hash[3] = hash[2] = hash[1] = hash[0] = 0xffff; 826 ifp->if_flags |= IFF_ALLMULTI; 827 goto chipit; 828 } 829 830 crc = ether_crc32_le(enm->enm_addrlo, ETHER_ADDR_LEN); 831 832 /* Just want the 6 most significant bits. */ 833 crc >>= 26; 834 835 /* Set the corresponding bit in the filter. */ 836 hash[crc >> 4] |= 1 << (crc & 0xf); 837 838 ETHER_NEXT_MULTI(step, enm); 839 } 840 841 ifp->if_flags &= ~IFF_ALLMULTI; 842 843 chipit: 844 bmac_write_reg(sc, HASH0, hash[0]); 845 bmac_write_reg(sc, HASH1, hash[1]); 846 bmac_write_reg(sc, HASH2, hash[2]); 847 bmac_write_reg(sc, HASH3, hash[3]); 848 x = bmac_read_reg(sc, RXCFG); 849 x &= ~RxPromiscEnable; 850 x |= RxHashFilterEnable; 851 bmac_write_reg(sc, RXCFG, x); 852 } 853 854 int 855 bmac_mii_readreg(device_t self, int phy, int reg) 856 { 857 return mii_bitbang_readreg(self, &bmac_mbo, phy, reg); 858 } 859 860 void 861 bmac_mii_writereg(device_t self, int phy, int reg, int val) 862 { 863 mii_bitbang_writereg(self, &bmac_mbo, phy, reg, val); 864 } 865 866 u_int32_t 867 bmac_mbo_read(device_t self) 868 { 869 struct bmac_softc *sc = device_private(self); 870 871 return bmac_read_reg(sc, MIFCSR); 872 } 873 874 void 875 bmac_mbo_write(device_t self, u_int32_t val) 876 { 877 struct bmac_softc *sc = device_private(self); 878 879 bmac_write_reg(sc, MIFCSR, val); 880 } 881 882 void 883 bmac_mii_statchg(struct ifnet *ifp) 884 { 885 struct bmac_softc *sc = ifp->if_softc; 886 int x; 887 888 /* Update duplex mode in TX configuration */ 889 x = bmac_read_reg(sc, TXCFG); 890 if ((IFM_OPTIONS(sc->sc_mii.mii_media_active) & IFM_FDX) != 0) 891 x |= TxFullDuplex; 892 else 893 x &= ~TxFullDuplex; 894 bmac_write_reg(sc, TXCFG, x); 895 896 #ifdef BMAC_DEBUG 897 printf("bmac_mii_statchg 0x%x\n", 898 IFM_OPTIONS(sc->sc_mii.mii_media_active)); 899 #endif 900 } 901 902 void 903 bmac_mii_tick(void *v) 904 { 905 struct bmac_softc *sc = v; 906 int s; 907 908 s = splnet(); 909 mii_tick(&sc->sc_mii); 910 splx(s); 911 912 callout_reset(&sc->sc_tick_ch, hz, bmac_mii_tick, sc); 913 } 914