1 /* $NetBSD: if_bm.c,v 1.52 2016/12/08 01:12:00 ozaki-r Exp $ */ 2 3 /*- 4 * Copyright (C) 1998, 1999, 2000 Tsubai Masanari. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __KERNEL_RCSID(0, "$NetBSD: if_bm.c,v 1.52 2016/12/08 01:12:00 ozaki-r Exp $"); 31 32 #include "opt_inet.h" 33 34 #include <sys/param.h> 35 #include <sys/device.h> 36 #include <sys/ioctl.h> 37 #include <sys/kernel.h> 38 #include <sys/mbuf.h> 39 #include <sys/socket.h> 40 #include <sys/systm.h> 41 #include <sys/callout.h> 42 43 #include <uvm/uvm_extern.h> 44 45 #include <net/if.h> 46 #include <net/if_dl.h> 47 #include <net/if_ether.h> 48 #include <net/if_media.h> 49 50 #include <net/bpf.h> 51 52 #ifdef INET 53 #include <netinet/in.h> 54 #include <netinet/if_inarp.h> 55 #endif 56 57 58 #include <dev/ofw/openfirm.h> 59 60 #include <dev/mii/mii.h> 61 #include <dev/mii/miivar.h> 62 #include <dev/mii/mii_bitbang.h> 63 64 #include <powerpc/spr.h> 65 #include <powerpc/oea/spr.h> 66 67 #include <machine/autoconf.h> 68 #include <machine/pio.h> 69 70 #include <macppc/dev/dbdma.h> 71 #include <macppc/dev/if_bmreg.h> 72 #include <macppc/dev/obiovar.h> 73 74 #define BMAC_TXBUFS 2 75 #define BMAC_RXBUFS 16 76 #define BMAC_BUFLEN 2048 77 78 struct bmac_softc { 79 device_t sc_dev; 80 struct ethercom sc_ethercom; 81 #define sc_if sc_ethercom.ec_if 82 struct callout sc_tick_ch; 83 bus_space_tag_t sc_iot; 84 bus_space_handle_t sc_ioh; 85 dbdma_regmap_t *sc_txdma; 86 dbdma_regmap_t *sc_rxdma; 87 dbdma_command_t *sc_txcmd; 88 dbdma_command_t *sc_rxcmd; 89 void *sc_txbuf; 90 void *sc_rxbuf; 91 int sc_rxlast; 92 int sc_flags; 93 struct mii_data sc_mii; 94 u_char sc_enaddr[6]; 95 }; 96 97 #define BMAC_BMACPLUS 0x01 98 #define BMAC_DEBUGFLAG 0x02 99 100 int bmac_match(device_t, cfdata_t, void *); 101 void bmac_attach(device_t, device_t, void *); 102 void bmac_reset_chip(struct bmac_softc *); 103 void bmac_init(struct bmac_softc *); 104 void bmac_init_dma(struct bmac_softc *); 105 int bmac_intr(void *); 106 int bmac_rint(void *); 107 void bmac_reset(struct bmac_softc *); 108 void bmac_stop(struct bmac_softc *); 109 void bmac_start(struct ifnet *); 110 void bmac_transmit_packet(struct bmac_softc *, void *, int); 111 int bmac_put(struct bmac_softc *, void *, struct mbuf *); 112 struct mbuf *bmac_get(struct bmac_softc *, void *, int); 113 void bmac_watchdog(struct ifnet *); 114 int bmac_ioctl(struct ifnet *, u_long, void *); 115 void bmac_setladrf(struct bmac_softc *); 116 117 int bmac_mii_readreg(device_t, int, int); 118 void bmac_mii_writereg(device_t, int, int, int); 119 void bmac_mii_statchg(struct ifnet *); 120 void bmac_mii_tick(void *); 121 u_int32_t bmac_mbo_read(device_t); 122 void bmac_mbo_write(device_t, u_int32_t); 123 124 CFATTACH_DECL_NEW(bm, sizeof(struct bmac_softc), 125 bmac_match, bmac_attach, NULL, NULL); 126 127 const struct mii_bitbang_ops bmac_mbo = { 128 bmac_mbo_read, bmac_mbo_write, 129 { MIFDO, MIFDI, MIFDC, MIFDIR, 0 } 130 }; 131 132 static inline uint16_t 133 bmac_read_reg(struct bmac_softc *sc, bus_size_t off) 134 { 135 return bus_space_read_2(sc->sc_iot, sc->sc_ioh, off); 136 } 137 138 static inline void 139 bmac_write_reg(struct bmac_softc *sc, bus_size_t off, uint16_t val) 140 { 141 bus_space_write_2(sc->sc_iot, sc->sc_ioh, off, val); 142 } 143 144 static inline void 145 bmac_set_bits(struct bmac_softc *sc, bus_size_t off, uint16_t val) 146 { 147 val |= bmac_read_reg(sc, off); 148 bmac_write_reg(sc, off, val); 149 } 150 151 static inline void 152 bmac_reset_bits(struct bmac_softc *sc, bus_size_t off, uint16_t val) 153 { 154 bmac_write_reg(sc, off, bmac_read_reg(sc, off) & ~val); 155 } 156 157 int 158 bmac_match(device_t parent, cfdata_t cf, void *aux) 159 { 160 struct confargs *ca = aux; 161 162 if (ca->ca_nreg < 24 || ca->ca_nintr < 12) 163 return 0; 164 165 if (strcmp(ca->ca_name, "bmac") == 0) /* bmac */ 166 return 1; 167 if (strcmp(ca->ca_name, "ethernet") == 0) /* bmac+ */ 168 return 1; 169 170 return 0; 171 } 172 173 void 174 bmac_attach(device_t parent, device_t self, void *aux) 175 { 176 struct confargs *ca = aux; 177 struct bmac_softc *sc = device_private(self); 178 struct ifnet *ifp = &sc->sc_if; 179 struct mii_data *mii = &sc->sc_mii; 180 u_char laddr[6]; 181 182 callout_init(&sc->sc_tick_ch, 0); 183 184 sc->sc_dev = self; 185 sc->sc_flags = 0; 186 if (strcmp(ca->ca_name, "ethernet") == 0) { 187 char name[64]; 188 189 memset(name, 0, 64); 190 OF_package_to_path(ca->ca_node, name, sizeof(name)); 191 OF_open(name); 192 sc->sc_flags |= BMAC_BMACPLUS; 193 } 194 195 ca->ca_reg[0] += ca->ca_baseaddr; 196 ca->ca_reg[2] += ca->ca_baseaddr; 197 ca->ca_reg[4] += ca->ca_baseaddr; 198 199 sc->sc_iot = ca->ca_tag; 200 if (bus_space_map(sc->sc_iot, ca->ca_reg[0], ca->ca_reg[1], 0, 201 &sc->sc_ioh) != 0) { 202 aprint_error(": couldn't map %#x", ca->ca_reg[0]); 203 return; 204 } 205 206 bmac_write_reg(sc, INTDISABLE, NoEventsMask); 207 208 if (OF_getprop(ca->ca_node, "local-mac-address", laddr, 6) == -1 && 209 OF_getprop(ca->ca_node, "mac-address", laddr, 6) == -1) { 210 aprint_error(": cannot get mac-address\n"); 211 return; 212 } 213 memcpy(sc->sc_enaddr, laddr, 6); 214 215 sc->sc_txdma = mapiodev(ca->ca_reg[2], PAGE_SIZE, false); 216 sc->sc_rxdma = mapiodev(ca->ca_reg[4], PAGE_SIZE, false); 217 sc->sc_txcmd = dbdma_alloc(BMAC_TXBUFS * sizeof(dbdma_command_t), NULL); 218 sc->sc_rxcmd = dbdma_alloc((BMAC_RXBUFS + 1) * sizeof(dbdma_command_t), 219 NULL); 220 sc->sc_txbuf = malloc(BMAC_BUFLEN * BMAC_TXBUFS, M_DEVBUF, M_NOWAIT); 221 sc->sc_rxbuf = malloc(BMAC_BUFLEN * BMAC_RXBUFS, M_DEVBUF, M_NOWAIT); 222 if (sc->sc_txbuf == NULL || sc->sc_rxbuf == NULL || 223 sc->sc_txcmd == NULL || sc->sc_rxcmd == NULL) { 224 aprint_error("cannot allocate memory\n"); 225 return; 226 } 227 228 aprint_normal(" irq %d,%d: address %s\n", 229 ca->ca_intr[0], ca->ca_intr[2], 230 ether_sprintf(laddr)); 231 232 intr_establish(ca->ca_intr[0], IST_EDGE, IPL_NET, bmac_intr, sc); 233 intr_establish(ca->ca_intr[2], IST_EDGE, IPL_NET, bmac_rint, sc); 234 235 memcpy(ifp->if_xname, device_xname(sc->sc_dev), IFNAMSIZ); 236 ifp->if_softc = sc; 237 ifp->if_ioctl = bmac_ioctl; 238 ifp->if_start = bmac_start; 239 ifp->if_flags = 240 IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_MULTICAST; 241 ifp->if_watchdog = bmac_watchdog; 242 IFQ_SET_READY(&ifp->if_snd); 243 244 mii->mii_ifp = ifp; 245 mii->mii_readreg = bmac_mii_readreg; 246 mii->mii_writereg = bmac_mii_writereg; 247 mii->mii_statchg = bmac_mii_statchg; 248 249 sc->sc_ethercom.ec_mii = mii; 250 ifmedia_init(&mii->mii_media, 0, ether_mediachange, ether_mediastatus); 251 mii_attach(sc->sc_dev, mii, 0xffffffff, MII_PHY_ANY, MII_OFFSET_ANY, 0); 252 253 /* Choose a default media. */ 254 if (LIST_FIRST(&mii->mii_phys) == NULL) { 255 ifmedia_add(&mii->mii_media, IFM_ETHER|IFM_10_T, 0, NULL); 256 ifmedia_set(&mii->mii_media, IFM_ETHER|IFM_10_T); 257 } else 258 ifmedia_set(&mii->mii_media, IFM_ETHER|IFM_AUTO); 259 260 bmac_reset_chip(sc); 261 262 if_attach(ifp); 263 if_deferred_start_init(ifp, NULL); 264 ether_ifattach(ifp, sc->sc_enaddr); 265 } 266 267 /* 268 * Reset and enable bmac by heathrow FCR. 269 */ 270 void 271 bmac_reset_chip(struct bmac_softc *sc) 272 { 273 u_int v; 274 275 dbdma_reset(sc->sc_txdma); 276 dbdma_reset(sc->sc_rxdma); 277 278 v = obio_read_4(HEATHROW_FCR); 279 280 v |= EnetEnable; 281 obio_write_4(HEATHROW_FCR, v); 282 delay(50000); 283 284 v |= ResetEnetCell; 285 obio_write_4(HEATHROW_FCR, v); 286 delay(50000); 287 288 v &= ~ResetEnetCell; 289 obio_write_4(HEATHROW_FCR, v); 290 delay(50000); 291 292 obio_write_4(HEATHROW_FCR, v); 293 } 294 295 void 296 bmac_init(struct bmac_softc *sc) 297 { 298 struct ifnet *ifp = &sc->sc_if; 299 struct ether_header *eh; 300 void *data; 301 int i, tb, bmcr; 302 u_short *p; 303 304 bmac_reset_chip(sc); 305 306 /* XXX */ 307 bmcr = bmac_mii_readreg(sc->sc_dev, 0, MII_BMCR); 308 bmcr &= ~BMCR_ISO; 309 bmac_mii_writereg(sc->sc_dev, 0, MII_BMCR, bmcr); 310 311 bmac_write_reg(sc, RXRST, RxResetValue); 312 bmac_write_reg(sc, TXRST, TxResetBit); 313 314 /* Wait for reset completion. */ 315 for (i = 1000; i > 0; i -= 10) { 316 if ((bmac_read_reg(sc, TXRST) & TxResetBit) == 0) 317 break; 318 delay(10); 319 } 320 if (i <= 0) 321 printf("%s: reset timeout\n", ifp->if_xname); 322 323 if (! (sc->sc_flags & BMAC_BMACPLUS)) 324 bmac_set_bits(sc, XCVRIF, ClkBit|SerialMode|COLActiveLow); 325 326 if ((mfpvr() >> 16) == MPC601) 327 tb = mfrtcl(); 328 else 329 tb = mftbl(); 330 bmac_write_reg(sc, RSEED, tb); 331 bmac_set_bits(sc, XIFC, TxOutputEnable); 332 bmac_read_reg(sc, PAREG); 333 334 /* Reset various counters. */ 335 bmac_write_reg(sc, NCCNT, 0); 336 bmac_write_reg(sc, NTCNT, 0); 337 bmac_write_reg(sc, EXCNT, 0); 338 bmac_write_reg(sc, LTCNT, 0); 339 bmac_write_reg(sc, FRCNT, 0); 340 bmac_write_reg(sc, LECNT, 0); 341 bmac_write_reg(sc, AECNT, 0); 342 bmac_write_reg(sc, FECNT, 0); 343 bmac_write_reg(sc, RXCV, 0); 344 345 /* Set tx fifo information. */ 346 bmac_write_reg(sc, TXTH, 4); /* 4 octets before tx starts */ 347 348 bmac_write_reg(sc, TXFIFOCSR, 0); 349 bmac_write_reg(sc, TXFIFOCSR, TxFIFOEnable); 350 351 /* Set rx fifo information. */ 352 bmac_write_reg(sc, RXFIFOCSR, 0); 353 bmac_write_reg(sc, RXFIFOCSR, RxFIFOEnable); 354 355 /* Clear status register. */ 356 bmac_read_reg(sc, STATUS); 357 358 bmac_write_reg(sc, HASH3, 0); 359 bmac_write_reg(sc, HASH2, 0); 360 bmac_write_reg(sc, HASH1, 0); 361 bmac_write_reg(sc, HASH0, 0); 362 363 /* Set MAC address. */ 364 p = (u_short *)sc->sc_enaddr; 365 bmac_write_reg(sc, MADD0, *p++); 366 bmac_write_reg(sc, MADD1, *p++); 367 bmac_write_reg(sc, MADD2, *p); 368 369 bmac_write_reg(sc, RXCFG, 370 RxCRCEnable | RxHashFilterEnable | RxRejectOwnPackets); 371 372 if (ifp->if_flags & IFF_PROMISC) 373 bmac_set_bits(sc, RXCFG, RxPromiscEnable); 374 375 bmac_init_dma(sc); 376 377 /* Enable TX/RX */ 378 bmac_set_bits(sc, RXCFG, RxMACEnable); 379 bmac_set_bits(sc, TXCFG, TxMACEnable); 380 381 bmac_write_reg(sc, INTDISABLE, NormalIntEvents); 382 383 ifp->if_flags |= IFF_RUNNING; 384 ifp->if_flags &= ~IFF_OACTIVE; 385 ifp->if_timer = 0; 386 387 data = sc->sc_txbuf; 388 eh = (struct ether_header *)data; 389 390 memset(data, 0, sizeof(eh) + ETHERMIN); 391 memcpy(eh->ether_dhost, sc->sc_enaddr, ETHER_ADDR_LEN); 392 memcpy(eh->ether_shost, sc->sc_enaddr, ETHER_ADDR_LEN); 393 bmac_transmit_packet(sc, data, sizeof(eh) + ETHERMIN); 394 395 bmac_start(ifp); 396 397 callout_reset(&sc->sc_tick_ch, hz, bmac_mii_tick, sc); 398 } 399 400 void 401 bmac_init_dma(struct bmac_softc *sc) 402 { 403 dbdma_command_t *cmd = sc->sc_rxcmd; 404 int i; 405 406 dbdma_reset(sc->sc_txdma); 407 dbdma_reset(sc->sc_rxdma); 408 409 memset(sc->sc_txcmd, 0, BMAC_TXBUFS * sizeof(dbdma_command_t)); 410 memset(sc->sc_rxcmd, 0, (BMAC_RXBUFS + 1) * sizeof(dbdma_command_t)); 411 412 for (i = 0; i < BMAC_RXBUFS; i++) { 413 DBDMA_BUILD(cmd, DBDMA_CMD_IN_LAST, 0, BMAC_BUFLEN, 414 vtophys((vaddr_t)sc->sc_rxbuf + BMAC_BUFLEN * i), 415 DBDMA_INT_ALWAYS, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER); 416 cmd++; 417 } 418 DBDMA_BUILD(cmd, DBDMA_CMD_NOP, 0, 0, 0, 419 DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_ALWAYS); 420 out32rb(&cmd->d_cmddep, vtophys((vaddr_t)sc->sc_rxcmd)); 421 422 sc->sc_rxlast = 0; 423 424 dbdma_start(sc->sc_rxdma, sc->sc_rxcmd); 425 } 426 427 int 428 bmac_intr(void *v) 429 { 430 struct bmac_softc *sc = v; 431 int stat; 432 433 stat = bmac_read_reg(sc, STATUS); 434 if (stat == 0) 435 return 0; 436 437 #ifdef BMAC_DEBUG 438 printf("bmac_intr status = 0x%x\n", stat); 439 #endif 440 441 if (stat & IntFrameSent) { 442 sc->sc_if.if_flags &= ~IFF_OACTIVE; 443 sc->sc_if.if_timer = 0; 444 sc->sc_if.if_opackets++; 445 if_schedule_deferred_start(&sc->sc_if); 446 } 447 448 /* XXX should do more! */ 449 450 return 1; 451 } 452 453 int 454 bmac_rint(void *v) 455 { 456 struct bmac_softc *sc = v; 457 struct ifnet *ifp = &sc->sc_if; 458 struct mbuf *m; 459 dbdma_command_t *cmd; 460 int status, resid, count, datalen; 461 int i, n; 462 void *data; 463 464 i = sc->sc_rxlast; 465 for (n = 0; n < BMAC_RXBUFS; n++, i++) { 466 if (i == BMAC_RXBUFS) 467 i = 0; 468 cmd = &sc->sc_rxcmd[i]; 469 status = in16rb(&cmd->d_status); 470 resid = in16rb(&cmd->d_resid); 471 472 #ifdef BMAC_DEBUG 473 if (status != 0 && status != 0x8440 && status != 0x9440) 474 printf("bmac_rint status = 0x%x\n", status); 475 #endif 476 477 if ((status & DBDMA_CNTRL_ACTIVE) == 0) /* 0x9440 | 0x8440 */ 478 continue; 479 count = in16rb(&cmd->d_count); 480 datalen = count - resid - 2; /* 2 == framelen */ 481 if (datalen < sizeof(struct ether_header)) { 482 printf("%s: short packet len = %d\n", 483 ifp->if_xname, datalen); 484 goto next; 485 } 486 DBDMA_BUILD_CMD(cmd, DBDMA_CMD_STOP, 0, 0, 0, 0); 487 data = (char *)sc->sc_rxbuf + BMAC_BUFLEN * i; 488 489 /* XXX Sometimes bmac reads one extra byte. */ 490 if (datalen == ETHER_MAX_LEN + 1) 491 datalen--; 492 493 /* Trim the CRC. */ 494 datalen -= ETHER_CRC_LEN; 495 496 m = bmac_get(sc, data, datalen); 497 if (m == NULL) { 498 ifp->if_ierrors++; 499 goto next; 500 } 501 502 /* 503 * Check if there's a BPF listener on this interface. 504 * If so, hand off the raw packet to BPF. 505 */ 506 bpf_mtap(ifp, m); 507 if_percpuq_enqueue(ifp->if_percpuq, m); 508 ifp->if_ipackets++; 509 510 next: 511 DBDMA_BUILD_CMD(cmd, DBDMA_CMD_IN_LAST, 0, DBDMA_INT_ALWAYS, 512 DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER); 513 514 cmd->d_status = 0; 515 cmd->d_resid = 0; 516 sc->sc_rxlast = i + 1; 517 } 518 ether_mediachange(ifp); 519 520 dbdma_continue(sc->sc_rxdma); 521 522 return 1; 523 } 524 525 void 526 bmac_reset(struct bmac_softc *sc) 527 { 528 int s; 529 530 s = splnet(); 531 bmac_init(sc); 532 splx(s); 533 } 534 535 void 536 bmac_stop(struct bmac_softc *sc) 537 { 538 struct ifnet *ifp = &sc->sc_if; 539 int s; 540 541 s = splnet(); 542 543 callout_stop(&sc->sc_tick_ch); 544 mii_down(&sc->sc_mii); 545 546 /* Disable TX/RX. */ 547 bmac_reset_bits(sc, TXCFG, TxMACEnable); 548 bmac_reset_bits(sc, RXCFG, RxMACEnable); 549 550 /* Disable all interrupts. */ 551 bmac_write_reg(sc, INTDISABLE, NoEventsMask); 552 553 dbdma_stop(sc->sc_txdma); 554 dbdma_stop(sc->sc_rxdma); 555 556 ifp->if_flags &= ~(IFF_UP | IFF_RUNNING); 557 ifp->if_timer = 0; 558 559 splx(s); 560 } 561 562 void 563 bmac_start(struct ifnet *ifp) 564 { 565 struct bmac_softc *sc = ifp->if_softc; 566 struct mbuf *m; 567 int tlen; 568 569 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 570 return; 571 572 while (1) { 573 if (ifp->if_flags & IFF_OACTIVE) 574 return; 575 576 IFQ_DEQUEUE(&ifp->if_snd, m); 577 if (m == 0) 578 break; 579 /* 580 * If BPF is listening on this interface, let it see the 581 * packet before we commit it to the wire. 582 */ 583 bpf_mtap(ifp, m); 584 585 ifp->if_flags |= IFF_OACTIVE; 586 tlen = bmac_put(sc, sc->sc_txbuf, m); 587 588 /* 5 seconds to watch for failing to transmit */ 589 ifp->if_timer = 5; 590 ifp->if_opackets++; /* # of pkts */ 591 592 bmac_transmit_packet(sc, sc->sc_txbuf, tlen); 593 } 594 } 595 596 void 597 bmac_transmit_packet(struct bmac_softc *sc, void *buff, int len) 598 { 599 dbdma_command_t *cmd = sc->sc_txcmd; 600 vaddr_t va = (vaddr_t)buff; 601 602 #ifdef BMAC_DEBUG 603 if (vtophys(va) + len - 1 != vtophys(va + len - 1)) 604 panic("bmac_transmit_packet"); 605 #endif 606 607 DBDMA_BUILD(cmd, DBDMA_CMD_OUT_LAST, 0, len, vtophys(va), 608 DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER); 609 cmd++; 610 DBDMA_BUILD(cmd, DBDMA_CMD_STOP, 0, 0, 0, 611 DBDMA_INT_ALWAYS, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER); 612 613 dbdma_start(sc->sc_txdma, sc->sc_txcmd); 614 } 615 616 int 617 bmac_put(struct bmac_softc *sc, void *buff, struct mbuf *m) 618 { 619 struct mbuf *n; 620 int len, tlen = 0; 621 622 for (; m; m = n) { 623 len = m->m_len; 624 if (len == 0) { 625 n = m_free(m); 626 continue; 627 } 628 memcpy(buff, mtod(m, void *), len); 629 buff = (char *)buff + len; 630 tlen += len; 631 n = m_free(m); 632 } 633 if (tlen > PAGE_SIZE) 634 panic("%s: putpacket packet overflow", 635 device_xname(sc->sc_dev)); 636 637 return tlen; 638 } 639 640 struct mbuf * 641 bmac_get(struct bmac_softc *sc, void *pkt, int totlen) 642 { 643 struct mbuf *m; 644 struct mbuf *top, **mp; 645 int len; 646 647 MGETHDR(m, M_DONTWAIT, MT_DATA); 648 if (m == 0) 649 return 0; 650 m_set_rcvif(m, &sc->sc_if); 651 m->m_pkthdr.len = totlen; 652 len = MHLEN; 653 top = 0; 654 mp = ⊤ 655 656 while (totlen > 0) { 657 if (top) { 658 MGET(m, M_DONTWAIT, MT_DATA); 659 if (m == 0) { 660 m_freem(top); 661 return 0; 662 } 663 len = MLEN; 664 } 665 if (totlen >= MINCLSIZE) { 666 MCLGET(m, M_DONTWAIT); 667 if ((m->m_flags & M_EXT) == 0) { 668 m_free(m); 669 m_freem(top); 670 return 0; 671 } 672 len = MCLBYTES; 673 } 674 m->m_len = len = min(totlen, len); 675 memcpy(mtod(m, void *), pkt, len); 676 pkt = (char *)pkt + len; 677 totlen -= len; 678 *mp = m; 679 mp = &m->m_next; 680 } 681 682 return top; 683 } 684 685 void 686 bmac_watchdog(struct ifnet *ifp) 687 { 688 struct bmac_softc *sc = ifp->if_softc; 689 690 bmac_reset_bits(sc, RXCFG, RxMACEnable); 691 bmac_reset_bits(sc, TXCFG, TxMACEnable); 692 693 printf("%s: device timeout\n", ifp->if_xname); 694 ifp->if_oerrors++; 695 696 bmac_reset(sc); 697 } 698 699 int 700 bmac_ioctl(struct ifnet *ifp, unsigned long cmd, void *data) 701 { 702 struct bmac_softc *sc = ifp->if_softc; 703 struct ifaddr *ifa = (struct ifaddr *)data; 704 int s, error = 0; 705 706 s = splnet(); 707 708 switch (cmd) { 709 710 case SIOCINITIFADDR: 711 ifp->if_flags |= IFF_UP; 712 713 bmac_init(sc); 714 switch (ifa->ifa_addr->sa_family) { 715 #ifdef INET 716 case AF_INET: 717 arp_ifinit(ifp, ifa); 718 break; 719 #endif 720 default: 721 break; 722 } 723 break; 724 725 case SIOCSIFFLAGS: 726 if ((error = ifioctl_common(ifp, cmd, data)) != 0) 727 break; 728 /* XXX see the comment in ed_ioctl() about code re-use */ 729 if ((ifp->if_flags & IFF_UP) == 0 && 730 (ifp->if_flags & IFF_RUNNING) != 0) { 731 /* 732 * If interface is marked down and it is running, then 733 * stop it. 734 */ 735 bmac_stop(sc); 736 ifp->if_flags &= ~IFF_RUNNING; 737 } else if ((ifp->if_flags & IFF_UP) != 0 && 738 (ifp->if_flags & IFF_RUNNING) == 0) { 739 /* 740 * If interface is marked up and it is stopped, then 741 * start it. 742 */ 743 bmac_init(sc); 744 } else { 745 /* 746 * Reset the interface to pick up changes in any other 747 * flags that affect hardware registers. 748 */ 749 /*bmac_stop(sc);*/ 750 bmac_init(sc); 751 } 752 #ifdef BMAC_DEBUG 753 if (ifp->if_flags & IFF_DEBUG) 754 sc->sc_flags |= BMAC_DEBUGFLAG; 755 #endif 756 break; 757 758 case SIOCADDMULTI: 759 case SIOCDELMULTI: 760 case SIOCGIFMEDIA: 761 case SIOCSIFMEDIA: 762 if ((error = ether_ioctl(ifp, cmd, data)) == ENETRESET) { 763 /* 764 * Multicast list has changed; set the hardware filter 765 * accordingly. 766 */ 767 if (ifp->if_flags & IFF_RUNNING) { 768 bmac_init(sc); 769 bmac_setladrf(sc); 770 } 771 error = 0; 772 } 773 break; 774 default: 775 error = ether_ioctl(ifp, cmd, data); 776 break; 777 } 778 779 splx(s); 780 return error; 781 } 782 783 /* 784 * Set up the logical address filter. 785 */ 786 void 787 bmac_setladrf(struct bmac_softc *sc) 788 { 789 struct ifnet *ifp = &sc->sc_if; 790 struct ether_multi *enm; 791 struct ether_multistep step; 792 u_int32_t crc; 793 u_int16_t hash[4]; 794 int x; 795 796 /* 797 * Set up multicast address filter by passing all multicast addresses 798 * through a crc generator, and then using the high order 6 bits as an 799 * index into the 64 bit logical address filter. The high order bit 800 * selects the word, while the rest of the bits select the bit within 801 * the word. 802 */ 803 804 if (ifp->if_flags & IFF_PROMISC) { 805 bmac_set_bits(sc, RXCFG, RxPromiscEnable); 806 return; 807 } 808 809 if (ifp->if_flags & IFF_ALLMULTI) { 810 hash[3] = hash[2] = hash[1] = hash[0] = 0xffff; 811 goto chipit; 812 } 813 814 hash[3] = hash[2] = hash[1] = hash[0] = 0; 815 816 ETHER_FIRST_MULTI(step, &sc->sc_ethercom, enm); 817 while (enm != NULL) { 818 if (memcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) { 819 /* 820 * We must listen to a range of multicast addresses. 821 * For now, just accept all multicasts, rather than 822 * trying to set only those filter bits needed to match 823 * the range. (At this time, the only use of address 824 * ranges is for IP multicast routing, for which the 825 * range is big enough to require all bits set.) 826 */ 827 hash[3] = hash[2] = hash[1] = hash[0] = 0xffff; 828 ifp->if_flags |= IFF_ALLMULTI; 829 goto chipit; 830 } 831 832 crc = ether_crc32_le(enm->enm_addrlo, ETHER_ADDR_LEN); 833 834 /* Just want the 6 most significant bits. */ 835 crc >>= 26; 836 837 /* Set the corresponding bit in the filter. */ 838 hash[crc >> 4] |= 1 << (crc & 0xf); 839 840 ETHER_NEXT_MULTI(step, enm); 841 } 842 843 ifp->if_flags &= ~IFF_ALLMULTI; 844 845 chipit: 846 bmac_write_reg(sc, HASH0, hash[0]); 847 bmac_write_reg(sc, HASH1, hash[1]); 848 bmac_write_reg(sc, HASH2, hash[2]); 849 bmac_write_reg(sc, HASH3, hash[3]); 850 x = bmac_read_reg(sc, RXCFG); 851 x &= ~RxPromiscEnable; 852 x |= RxHashFilterEnable; 853 bmac_write_reg(sc, RXCFG, x); 854 } 855 856 int 857 bmac_mii_readreg(device_t self, int phy, int reg) 858 { 859 return mii_bitbang_readreg(self, &bmac_mbo, phy, reg); 860 } 861 862 void 863 bmac_mii_writereg(device_t self, int phy, int reg, int val) 864 { 865 mii_bitbang_writereg(self, &bmac_mbo, phy, reg, val); 866 } 867 868 u_int32_t 869 bmac_mbo_read(device_t self) 870 { 871 struct bmac_softc *sc = device_private(self); 872 873 return bmac_read_reg(sc, MIFCSR); 874 } 875 876 void 877 bmac_mbo_write(device_t self, u_int32_t val) 878 { 879 struct bmac_softc *sc = device_private(self); 880 881 bmac_write_reg(sc, MIFCSR, val); 882 } 883 884 void 885 bmac_mii_statchg(struct ifnet *ifp) 886 { 887 struct bmac_softc *sc = ifp->if_softc; 888 int x; 889 890 /* Update duplex mode in TX configuration */ 891 x = bmac_read_reg(sc, TXCFG); 892 if ((IFM_OPTIONS(sc->sc_mii.mii_media_active) & IFM_FDX) != 0) 893 x |= TxFullDuplex; 894 else 895 x &= ~TxFullDuplex; 896 bmac_write_reg(sc, TXCFG, x); 897 898 #ifdef BMAC_DEBUG 899 printf("bmac_mii_statchg 0x%x\n", 900 IFM_OPTIONS(sc->sc_mii.mii_media_active)); 901 #endif 902 } 903 904 void 905 bmac_mii_tick(void *v) 906 { 907 struct bmac_softc *sc = v; 908 int s; 909 910 s = splnet(); 911 mii_tick(&sc->sc_mii); 912 splx(s); 913 914 callout_reset(&sc->sc_tick_ch, hz, bmac_mii_tick, sc); 915 } 916