1 /* $NetBSD: if_bm.c,v 1.40 2009/03/14 21:04:11 dsl Exp $ */ 2 3 /*- 4 * Copyright (C) 1998, 1999, 2000 Tsubai Masanari. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __KERNEL_RCSID(0, "$NetBSD: if_bm.c,v 1.40 2009/03/14 21:04:11 dsl Exp $"); 31 32 #include "opt_inet.h" 33 #include "bpfilter.h" 34 35 #include <sys/param.h> 36 #include <sys/device.h> 37 #include <sys/ioctl.h> 38 #include <sys/kernel.h> 39 #include <sys/mbuf.h> 40 #include <sys/socket.h> 41 #include <sys/systm.h> 42 #include <sys/callout.h> 43 44 #include <uvm/uvm_extern.h> 45 46 #include <net/if.h> 47 #include <net/if_dl.h> 48 #include <net/if_ether.h> 49 #include <net/if_media.h> 50 51 #if NBPFILTER > 0 52 #include <net/bpf.h> 53 #endif 54 55 #ifdef INET 56 #include <netinet/in.h> 57 #include <netinet/if_inarp.h> 58 #endif 59 60 61 #include <dev/ofw/openfirm.h> 62 63 #include <dev/mii/mii.h> 64 #include <dev/mii/miivar.h> 65 #include <dev/mii/mii_bitbang.h> 66 67 #include <powerpc/spr.h> 68 69 #include <machine/autoconf.h> 70 #include <machine/pio.h> 71 72 #include <macppc/dev/dbdma.h> 73 #include <macppc/dev/if_bmreg.h> 74 #include <macppc/dev/obiovar.h> 75 76 #define BMAC_TXBUFS 2 77 #define BMAC_RXBUFS 16 78 #define BMAC_BUFLEN 2048 79 80 struct bmac_softc { 81 struct device sc_dev; 82 struct ethercom sc_ethercom; 83 #define sc_if sc_ethercom.ec_if 84 struct callout sc_tick_ch; 85 bus_space_tag_t sc_iot; 86 bus_space_handle_t sc_ioh; 87 dbdma_regmap_t *sc_txdma; 88 dbdma_regmap_t *sc_rxdma; 89 dbdma_command_t *sc_txcmd; 90 dbdma_command_t *sc_rxcmd; 91 void *sc_txbuf; 92 void *sc_rxbuf; 93 int sc_rxlast; 94 int sc_flags; 95 struct mii_data sc_mii; 96 u_char sc_enaddr[6]; 97 }; 98 99 #define BMAC_BMACPLUS 0x01 100 #define BMAC_DEBUGFLAG 0x02 101 102 int bmac_match(struct device *, struct cfdata *, void *); 103 void bmac_attach(struct device *, struct device *, void *); 104 void bmac_reset_chip(struct bmac_softc *); 105 void bmac_init(struct bmac_softc *); 106 void bmac_init_dma(struct bmac_softc *); 107 int bmac_intr(void *); 108 int bmac_rint(void *); 109 void bmac_reset(struct bmac_softc *); 110 void bmac_stop(struct bmac_softc *); 111 void bmac_start(struct ifnet *); 112 void bmac_transmit_packet(struct bmac_softc *, void *, int); 113 int bmac_put(struct bmac_softc *, void *, struct mbuf *); 114 struct mbuf *bmac_get(struct bmac_softc *, void *, int); 115 void bmac_watchdog(struct ifnet *); 116 int bmac_ioctl(struct ifnet *, u_long, void *); 117 void bmac_setladrf(struct bmac_softc *); 118 119 int bmac_mii_readreg(struct device *, int, int); 120 void bmac_mii_writereg(struct device *, int, int, int); 121 void bmac_mii_statchg(struct device *); 122 void bmac_mii_tick(void *); 123 u_int32_t bmac_mbo_read(struct device *); 124 void bmac_mbo_write(struct device *, u_int32_t); 125 126 CFATTACH_DECL(bm, sizeof(struct bmac_softc), 127 bmac_match, bmac_attach, NULL, NULL); 128 129 const struct mii_bitbang_ops bmac_mbo = { 130 bmac_mbo_read, bmac_mbo_write, 131 { MIFDO, MIFDI, MIFDC, MIFDIR, 0 } 132 }; 133 134 static inline uint16_t 135 bmac_read_reg(struct bmac_softc *sc, bus_size_t off) 136 { 137 return bus_space_read_2(sc->sc_iot, sc->sc_ioh, off); 138 } 139 140 static inline void 141 bmac_write_reg(struct bmac_softc *sc, bus_size_t off, uint16_t val) 142 { 143 bus_space_write_2(sc->sc_iot, sc->sc_ioh, off, val); 144 } 145 146 static inline void 147 bmac_set_bits(struct bmac_softc *sc, bus_size_t off, uint16_t val) 148 { 149 val |= bmac_read_reg(sc, off); 150 bmac_write_reg(sc, off, val); 151 } 152 153 static inline void 154 bmac_reset_bits(struct bmac_softc *sc, bus_size_t off, uint16_t val) 155 { 156 bmac_write_reg(sc, off, bmac_read_reg(sc, off) & ~val); 157 } 158 159 int 160 bmac_match(struct device *parent, struct cfdata *cf, void *aux) 161 { 162 struct confargs *ca = aux; 163 164 if (ca->ca_nreg < 24 || ca->ca_nintr < 12) 165 return 0; 166 167 if (strcmp(ca->ca_name, "bmac") == 0) /* bmac */ 168 return 1; 169 if (strcmp(ca->ca_name, "ethernet") == 0) /* bmac+ */ 170 return 1; 171 172 return 0; 173 } 174 175 void 176 bmac_attach(struct device *parent, struct device *self, void *aux) 177 { 178 struct confargs *ca = aux; 179 struct bmac_softc *sc = (void *)self; 180 struct ifnet *ifp = &sc->sc_if; 181 struct mii_data *mii = &sc->sc_mii; 182 u_char laddr[6]; 183 184 callout_init(&sc->sc_tick_ch, 0); 185 186 sc->sc_flags =0; 187 if (strcmp(ca->ca_name, "ethernet") == 0) { 188 char name[64]; 189 190 memset(name, 0, 64); 191 OF_package_to_path(ca->ca_node, name, sizeof(name)); 192 OF_open(name); 193 sc->sc_flags |= BMAC_BMACPLUS; 194 } 195 196 ca->ca_reg[0] += ca->ca_baseaddr; 197 ca->ca_reg[2] += ca->ca_baseaddr; 198 ca->ca_reg[4] += ca->ca_baseaddr; 199 200 sc->sc_iot = ca->ca_tag; 201 if (bus_space_map(sc->sc_iot, ca->ca_reg[0], ca->ca_reg[1], 0, 202 &sc->sc_ioh) != 0) { 203 aprint_error(": couldn't map %#x", ca->ca_reg[0]); 204 return; 205 } 206 207 bmac_write_reg(sc, INTDISABLE, NoEventsMask); 208 209 if (OF_getprop(ca->ca_node, "local-mac-address", laddr, 6) == -1 && 210 OF_getprop(ca->ca_node, "mac-address", laddr, 6) == -1) { 211 printf(": cannot get mac-address\n"); 212 return; 213 } 214 memcpy(sc->sc_enaddr, laddr, 6); 215 216 sc->sc_txdma = mapiodev(ca->ca_reg[2], PAGE_SIZE); 217 sc->sc_rxdma = mapiodev(ca->ca_reg[4], PAGE_SIZE); 218 sc->sc_txcmd = dbdma_alloc(BMAC_TXBUFS * sizeof(dbdma_command_t)); 219 sc->sc_rxcmd = dbdma_alloc((BMAC_RXBUFS + 1) * sizeof(dbdma_command_t)); 220 sc->sc_txbuf = malloc(BMAC_BUFLEN * BMAC_TXBUFS, M_DEVBUF, M_NOWAIT); 221 sc->sc_rxbuf = malloc(BMAC_BUFLEN * BMAC_RXBUFS, M_DEVBUF, M_NOWAIT); 222 if (sc->sc_txbuf == NULL || sc->sc_rxbuf == NULL || 223 sc->sc_txcmd == NULL || sc->sc_rxcmd == NULL) { 224 printf("cannot allocate memory\n"); 225 return; 226 } 227 228 printf(" irq %d,%d: address %s\n", ca->ca_intr[0], ca->ca_intr[2], 229 ether_sprintf(laddr)); 230 231 intr_establish(ca->ca_intr[0], IST_EDGE, IPL_NET, bmac_intr, sc); 232 intr_establish(ca->ca_intr[2], IST_EDGE, IPL_NET, bmac_rint, sc); 233 234 memcpy(ifp->if_xname, sc->sc_dev.dv_xname, IFNAMSIZ); 235 ifp->if_softc = sc; 236 ifp->if_ioctl = bmac_ioctl; 237 ifp->if_start = bmac_start; 238 ifp->if_flags = 239 IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_MULTICAST; 240 ifp->if_watchdog = bmac_watchdog; 241 IFQ_SET_READY(&ifp->if_snd); 242 243 mii->mii_ifp = ifp; 244 mii->mii_readreg = bmac_mii_readreg; 245 mii->mii_writereg = bmac_mii_writereg; 246 mii->mii_statchg = bmac_mii_statchg; 247 248 sc->sc_ethercom.ec_mii = mii; 249 ifmedia_init(&mii->mii_media, 0, ether_mediachange, ether_mediastatus); 250 mii_attach(&sc->sc_dev, mii, 0xffffffff, MII_PHY_ANY, 251 MII_OFFSET_ANY, 0); 252 253 /* Choose a default media. */ 254 if (LIST_FIRST(&mii->mii_phys) == NULL) { 255 ifmedia_add(&mii->mii_media, IFM_ETHER|IFM_10_T, 0, NULL); 256 ifmedia_set(&mii->mii_media, IFM_ETHER|IFM_10_T); 257 } else 258 ifmedia_set(&mii->mii_media, IFM_ETHER|IFM_AUTO); 259 260 bmac_reset_chip(sc); 261 262 if_attach(ifp); 263 ether_ifattach(ifp, sc->sc_enaddr); 264 } 265 266 /* 267 * Reset and enable bmac by heathrow FCR. 268 */ 269 void 270 bmac_reset_chip(struct bmac_softc *sc) 271 { 272 u_int v; 273 274 dbdma_reset(sc->sc_txdma); 275 dbdma_reset(sc->sc_rxdma); 276 277 v = obio_read_4(HEATHROW_FCR); 278 279 v |= EnetEnable; 280 obio_write_4(HEATHROW_FCR, v); 281 delay(50000); 282 283 v |= ResetEnetCell; 284 obio_write_4(HEATHROW_FCR, v); 285 delay(50000); 286 287 v &= ~ResetEnetCell; 288 obio_write_4(HEATHROW_FCR, v); 289 delay(50000); 290 291 obio_write_4(HEATHROW_FCR, v); 292 } 293 294 void 295 bmac_init(struct bmac_softc *sc) 296 { 297 struct ifnet *ifp = &sc->sc_if; 298 struct ether_header *eh; 299 void *data; 300 int i, tb, bmcr; 301 u_short *p; 302 303 bmac_reset_chip(sc); 304 305 /* XXX */ 306 bmcr = bmac_mii_readreg((struct device *)sc, 0, MII_BMCR); 307 bmcr &= ~BMCR_ISO; 308 bmac_mii_writereg((struct device *)sc, 0, MII_BMCR, bmcr); 309 310 bmac_write_reg(sc, RXRST, RxResetValue); 311 bmac_write_reg(sc, TXRST, TxResetBit); 312 313 /* Wait for reset completion. */ 314 for (i = 1000; i > 0; i -= 10) { 315 if ((bmac_read_reg(sc, TXRST) & TxResetBit) == 0) 316 break; 317 delay(10); 318 } 319 if (i <= 0) 320 printf("%s: reset timeout\n", ifp->if_xname); 321 322 if (! (sc->sc_flags & BMAC_BMACPLUS)) 323 bmac_set_bits(sc, XCVRIF, ClkBit|SerialMode|COLActiveLow); 324 325 if ((mfpvr() >> 16) == MPC601) 326 tb = mfrtcl(); 327 else 328 tb = mftbl(); 329 bmac_write_reg(sc, RSEED, tb); 330 bmac_set_bits(sc, XIFC, TxOutputEnable); 331 bmac_read_reg(sc, PAREG); 332 333 /* Reset various counters. */ 334 bmac_write_reg(sc, NCCNT, 0); 335 bmac_write_reg(sc, NTCNT, 0); 336 bmac_write_reg(sc, EXCNT, 0); 337 bmac_write_reg(sc, LTCNT, 0); 338 bmac_write_reg(sc, FRCNT, 0); 339 bmac_write_reg(sc, LECNT, 0); 340 bmac_write_reg(sc, AECNT, 0); 341 bmac_write_reg(sc, FECNT, 0); 342 bmac_write_reg(sc, RXCV, 0); 343 344 /* Set tx fifo information. */ 345 bmac_write_reg(sc, TXTH, 4); /* 4 octets before tx starts */ 346 347 bmac_write_reg(sc, TXFIFOCSR, 0); 348 bmac_write_reg(sc, TXFIFOCSR, TxFIFOEnable); 349 350 /* Set rx fifo information. */ 351 bmac_write_reg(sc, RXFIFOCSR, 0); 352 bmac_write_reg(sc, RXFIFOCSR, RxFIFOEnable); 353 354 /* Clear status register. */ 355 bmac_read_reg(sc, STATUS); 356 357 bmac_write_reg(sc, HASH3, 0); 358 bmac_write_reg(sc, HASH2, 0); 359 bmac_write_reg(sc, HASH1, 0); 360 bmac_write_reg(sc, HASH0, 0); 361 362 /* Set MAC address. */ 363 p = (u_short *)sc->sc_enaddr; 364 bmac_write_reg(sc, MADD0, *p++); 365 bmac_write_reg(sc, MADD1, *p++); 366 bmac_write_reg(sc, MADD2, *p); 367 368 bmac_write_reg(sc, RXCFG, 369 RxCRCEnable | RxHashFilterEnable | RxRejectOwnPackets); 370 371 if (ifp->if_flags & IFF_PROMISC) 372 bmac_set_bits(sc, RXCFG, RxPromiscEnable); 373 374 bmac_init_dma(sc); 375 376 /* Enable TX/RX */ 377 bmac_set_bits(sc, RXCFG, RxMACEnable); 378 bmac_set_bits(sc, TXCFG, TxMACEnable); 379 380 bmac_write_reg(sc, INTDISABLE, NormalIntEvents); 381 382 ifp->if_flags |= IFF_RUNNING; 383 ifp->if_flags &= ~IFF_OACTIVE; 384 ifp->if_timer = 0; 385 386 data = sc->sc_txbuf; 387 eh = (struct ether_header *)data; 388 389 memset(data, 0, sizeof(eh) + ETHERMIN); 390 memcpy(eh->ether_dhost, sc->sc_enaddr, ETHER_ADDR_LEN); 391 memcpy(eh->ether_shost, sc->sc_enaddr, ETHER_ADDR_LEN); 392 bmac_transmit_packet(sc, data, sizeof(eh) + ETHERMIN); 393 394 bmac_start(ifp); 395 396 callout_reset(&sc->sc_tick_ch, hz, bmac_mii_tick, sc); 397 } 398 399 void 400 bmac_init_dma(struct bmac_softc *sc) 401 { 402 dbdma_command_t *cmd = sc->sc_rxcmd; 403 int i; 404 405 dbdma_reset(sc->sc_txdma); 406 dbdma_reset(sc->sc_rxdma); 407 408 memset(sc->sc_txcmd, 0, BMAC_TXBUFS * sizeof(dbdma_command_t)); 409 memset(sc->sc_rxcmd, 0, (BMAC_RXBUFS + 1) * sizeof(dbdma_command_t)); 410 411 for (i = 0; i < BMAC_RXBUFS; i++) { 412 DBDMA_BUILD(cmd, DBDMA_CMD_IN_LAST, 0, BMAC_BUFLEN, 413 vtophys((vaddr_t)sc->sc_rxbuf + BMAC_BUFLEN * i), 414 DBDMA_INT_ALWAYS, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER); 415 cmd++; 416 } 417 DBDMA_BUILD(cmd, DBDMA_CMD_NOP, 0, 0, 0, 418 DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_ALWAYS); 419 out32rb(&cmd->d_cmddep, vtophys((vaddr_t)sc->sc_rxcmd)); 420 421 sc->sc_rxlast = 0; 422 423 dbdma_start(sc->sc_rxdma, sc->sc_rxcmd); 424 } 425 426 int 427 bmac_intr(void *v) 428 { 429 struct bmac_softc *sc = v; 430 int stat; 431 432 stat = bmac_read_reg(sc, STATUS); 433 if (stat == 0) 434 return 0; 435 436 #ifdef BMAC_DEBUG 437 printf("bmac_intr status = 0x%x\n", stat); 438 #endif 439 440 if (stat & IntFrameSent) { 441 sc->sc_if.if_flags &= ~IFF_OACTIVE; 442 sc->sc_if.if_timer = 0; 443 sc->sc_if.if_opackets++; 444 bmac_start(&sc->sc_if); 445 } 446 447 /* XXX should do more! */ 448 449 return 1; 450 } 451 452 int 453 bmac_rint(void *v) 454 { 455 struct bmac_softc *sc = v; 456 struct ifnet *ifp = &sc->sc_if; 457 struct mbuf *m; 458 dbdma_command_t *cmd; 459 int status, resid, count, datalen; 460 int i, n; 461 void *data; 462 463 i = sc->sc_rxlast; 464 for (n = 0; n < BMAC_RXBUFS; n++, i++) { 465 if (i == BMAC_RXBUFS) 466 i = 0; 467 cmd = &sc->sc_rxcmd[i]; 468 status = in16rb(&cmd->d_status); 469 resid = in16rb(&cmd->d_resid); 470 471 #ifdef BMAC_DEBUG 472 if (status != 0 && status != 0x8440 && status != 0x9440) 473 printf("bmac_rint status = 0x%x\n", status); 474 #endif 475 476 if ((status & DBDMA_CNTRL_ACTIVE) == 0) /* 0x9440 | 0x8440 */ 477 continue; 478 count = in16rb(&cmd->d_count); 479 datalen = count - resid - 2; /* 2 == framelen */ 480 if (datalen < sizeof(struct ether_header)) { 481 printf("%s: short packet len = %d\n", 482 ifp->if_xname, datalen); 483 goto next; 484 } 485 DBDMA_BUILD_CMD(cmd, DBDMA_CMD_STOP, 0, 0, 0, 0); 486 data = (char *)sc->sc_rxbuf + BMAC_BUFLEN * i; 487 488 /* XXX Sometimes bmac reads one extra byte. */ 489 if (datalen == ETHER_MAX_LEN + 1) 490 datalen--; 491 492 /* Trim the CRC. */ 493 datalen -= ETHER_CRC_LEN; 494 495 m = bmac_get(sc, data, datalen); 496 if (m == NULL) { 497 ifp->if_ierrors++; 498 goto next; 499 } 500 501 #if NBPFILTER > 0 502 /* 503 * Check if there's a BPF listener on this interface. 504 * If so, hand off the raw packet to BPF. 505 */ 506 if (ifp->if_bpf) 507 bpf_mtap(ifp->if_bpf, m); 508 #endif 509 (*ifp->if_input)(ifp, m); 510 ifp->if_ipackets++; 511 512 next: 513 DBDMA_BUILD_CMD(cmd, DBDMA_CMD_IN_LAST, 0, DBDMA_INT_ALWAYS, 514 DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER); 515 516 cmd->d_status = 0; 517 cmd->d_resid = 0; 518 sc->sc_rxlast = i + 1; 519 } 520 ether_mediachange(ifp); 521 522 dbdma_continue(sc->sc_rxdma); 523 524 return 1; 525 } 526 527 void 528 bmac_reset(struct bmac_softc *sc) 529 { 530 int s; 531 532 s = splnet(); 533 bmac_init(sc); 534 splx(s); 535 } 536 537 void 538 bmac_stop(struct bmac_softc *sc) 539 { 540 struct ifnet *ifp = &sc->sc_if; 541 int s; 542 543 s = splnet(); 544 545 callout_stop(&sc->sc_tick_ch); 546 mii_down(&sc->sc_mii); 547 548 /* Disable TX/RX. */ 549 bmac_reset_bits(sc, TXCFG, TxMACEnable); 550 bmac_reset_bits(sc, RXCFG, RxMACEnable); 551 552 /* Disable all interrupts. */ 553 bmac_write_reg(sc, INTDISABLE, NoEventsMask); 554 555 dbdma_stop(sc->sc_txdma); 556 dbdma_stop(sc->sc_rxdma); 557 558 ifp->if_flags &= ~(IFF_UP | IFF_RUNNING); 559 ifp->if_timer = 0; 560 561 splx(s); 562 } 563 564 void 565 bmac_start(struct ifnet *ifp) 566 { 567 struct bmac_softc *sc = ifp->if_softc; 568 struct mbuf *m; 569 int tlen; 570 571 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 572 return; 573 574 while (1) { 575 if (ifp->if_flags & IFF_OACTIVE) 576 return; 577 578 IFQ_DEQUEUE(&ifp->if_snd, m); 579 if (m == 0) 580 break; 581 #if NBPFILTER > 0 582 /* 583 * If BPF is listening on this interface, let it see the 584 * packet before we commit it to the wire. 585 */ 586 if (ifp->if_bpf) 587 bpf_mtap(ifp->if_bpf, m); 588 #endif 589 590 ifp->if_flags |= IFF_OACTIVE; 591 tlen = bmac_put(sc, sc->sc_txbuf, m); 592 593 /* 5 seconds to watch for failing to transmit */ 594 ifp->if_timer = 5; 595 ifp->if_opackets++; /* # of pkts */ 596 597 bmac_transmit_packet(sc, sc->sc_txbuf, tlen); 598 } 599 } 600 601 void 602 bmac_transmit_packet(struct bmac_softc *sc, void *buff, int len) 603 { 604 dbdma_command_t *cmd = sc->sc_txcmd; 605 vaddr_t va = (vaddr_t)buff; 606 607 #ifdef BMAC_DEBUG 608 if (vtophys(va) + len - 1 != vtophys(va + len - 1)) 609 panic("bmac_transmit_packet"); 610 #endif 611 612 DBDMA_BUILD(cmd, DBDMA_CMD_OUT_LAST, 0, len, vtophys(va), 613 DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER); 614 cmd++; 615 DBDMA_BUILD(cmd, DBDMA_CMD_STOP, 0, 0, 0, 616 DBDMA_INT_ALWAYS, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER); 617 618 dbdma_start(sc->sc_txdma, sc->sc_txcmd); 619 } 620 621 int 622 bmac_put(struct bmac_softc *sc, void *buff, struct mbuf *m) 623 { 624 struct mbuf *n; 625 int len, tlen = 0; 626 627 for (; m; m = n) { 628 len = m->m_len; 629 if (len == 0) { 630 MFREE(m, n); 631 continue; 632 } 633 memcpy(buff, mtod(m, void *), len); 634 buff = (char *)buff + len; 635 tlen += len; 636 MFREE(m, n); 637 } 638 if (tlen > PAGE_SIZE) 639 panic("%s: putpacket packet overflow", sc->sc_dev.dv_xname); 640 641 return tlen; 642 } 643 644 struct mbuf * 645 bmac_get(struct bmac_softc *sc, void *pkt, int totlen) 646 { 647 struct mbuf *m; 648 struct mbuf *top, **mp; 649 int len; 650 651 MGETHDR(m, M_DONTWAIT, MT_DATA); 652 if (m == 0) 653 return 0; 654 m->m_pkthdr.rcvif = &sc->sc_if; 655 m->m_pkthdr.len = totlen; 656 len = MHLEN; 657 top = 0; 658 mp = ⊤ 659 660 while (totlen > 0) { 661 if (top) { 662 MGET(m, M_DONTWAIT, MT_DATA); 663 if (m == 0) { 664 m_freem(top); 665 return 0; 666 } 667 len = MLEN; 668 } 669 if (totlen >= MINCLSIZE) { 670 MCLGET(m, M_DONTWAIT); 671 if ((m->m_flags & M_EXT) == 0) { 672 m_free(m); 673 m_freem(top); 674 return 0; 675 } 676 len = MCLBYTES; 677 } 678 m->m_len = len = min(totlen, len); 679 memcpy(mtod(m, void *), pkt, len); 680 pkt = (char *)pkt + len; 681 totlen -= len; 682 *mp = m; 683 mp = &m->m_next; 684 } 685 686 return top; 687 } 688 689 void 690 bmac_watchdog(struct ifnet *ifp) 691 { 692 struct bmac_softc *sc = ifp->if_softc; 693 694 bmac_reset_bits(sc, RXCFG, RxMACEnable); 695 bmac_reset_bits(sc, TXCFG, TxMACEnable); 696 697 printf("%s: device timeout\n", ifp->if_xname); 698 ifp->if_oerrors++; 699 700 bmac_reset(sc); 701 } 702 703 int 704 bmac_ioctl(struct ifnet *ifp, unsigned long cmd, void *data) 705 { 706 struct bmac_softc *sc = ifp->if_softc; 707 struct ifaddr *ifa = (struct ifaddr *)data; 708 int s, error = 0; 709 710 s = splnet(); 711 712 switch (cmd) { 713 714 case SIOCINITIFADDR: 715 ifp->if_flags |= IFF_UP; 716 717 bmac_init(sc); 718 switch (ifa->ifa_addr->sa_family) { 719 #ifdef INET 720 case AF_INET: 721 arp_ifinit(ifp, ifa); 722 break; 723 #endif 724 default: 725 break; 726 } 727 break; 728 729 case SIOCSIFFLAGS: 730 if ((error = ifioctl_common(ifp, cmd, data)) != 0) 731 break; 732 /* XXX see the comment in ed_ioctl() about code re-use */ 733 if ((ifp->if_flags & IFF_UP) == 0 && 734 (ifp->if_flags & IFF_RUNNING) != 0) { 735 /* 736 * If interface is marked down and it is running, then 737 * stop it. 738 */ 739 bmac_stop(sc); 740 ifp->if_flags &= ~IFF_RUNNING; 741 } else if ((ifp->if_flags & IFF_UP) != 0 && 742 (ifp->if_flags & IFF_RUNNING) == 0) { 743 /* 744 * If interface is marked up and it is stopped, then 745 * start it. 746 */ 747 bmac_init(sc); 748 } else { 749 /* 750 * Reset the interface to pick up changes in any other 751 * flags that affect hardware registers. 752 */ 753 /*bmac_stop(sc);*/ 754 bmac_init(sc); 755 } 756 #ifdef BMAC_DEBUG 757 if (ifp->if_flags & IFF_DEBUG) 758 sc->sc_flags |= BMAC_DEBUGFLAG; 759 #endif 760 break; 761 762 case SIOCADDMULTI: 763 case SIOCDELMULTI: 764 case SIOCGIFMEDIA: 765 case SIOCSIFMEDIA: 766 if ((error = ether_ioctl(ifp, cmd, data)) == ENETRESET) { 767 /* 768 * Multicast list has changed; set the hardware filter 769 * accordingly. 770 */ 771 if (ifp->if_flags & IFF_RUNNING) { 772 bmac_init(sc); 773 bmac_setladrf(sc); 774 } 775 error = 0; 776 } 777 break; 778 default: 779 error = ether_ioctl(ifp, cmd, data); 780 break; 781 } 782 783 splx(s); 784 return error; 785 } 786 787 /* 788 * Set up the logical address filter. 789 */ 790 void 791 bmac_setladrf(struct bmac_softc *sc) 792 { 793 struct ifnet *ifp = &sc->sc_if; 794 struct ether_multi *enm; 795 struct ether_multistep step; 796 u_int32_t crc; 797 u_int16_t hash[4]; 798 int x; 799 800 /* 801 * Set up multicast address filter by passing all multicast addresses 802 * through a crc generator, and then using the high order 6 bits as an 803 * index into the 64 bit logical address filter. The high order bit 804 * selects the word, while the rest of the bits select the bit within 805 * the word. 806 */ 807 808 if (ifp->if_flags & IFF_PROMISC) { 809 bmac_set_bits(sc, RXCFG, RxPromiscEnable); 810 return; 811 } 812 813 if (ifp->if_flags & IFF_ALLMULTI) { 814 hash[3] = hash[2] = hash[1] = hash[0] = 0xffff; 815 goto chipit; 816 } 817 818 hash[3] = hash[2] = hash[1] = hash[0] = 0; 819 820 ETHER_FIRST_MULTI(step, &sc->sc_ethercom, enm); 821 while (enm != NULL) { 822 if (memcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) { 823 /* 824 * We must listen to a range of multicast addresses. 825 * For now, just accept all multicasts, rather than 826 * trying to set only those filter bits needed to match 827 * the range. (At this time, the only use of address 828 * ranges is for IP multicast routing, for which the 829 * range is big enough to require all bits set.) 830 */ 831 hash[3] = hash[2] = hash[1] = hash[0] = 0xffff; 832 ifp->if_flags |= IFF_ALLMULTI; 833 goto chipit; 834 } 835 836 crc = ether_crc32_le(enm->enm_addrlo, ETHER_ADDR_LEN); 837 838 /* Just want the 6 most significant bits. */ 839 crc >>= 26; 840 841 /* Set the corresponding bit in the filter. */ 842 hash[crc >> 4] |= 1 << (crc & 0xf); 843 844 ETHER_NEXT_MULTI(step, enm); 845 } 846 847 ifp->if_flags &= ~IFF_ALLMULTI; 848 849 chipit: 850 bmac_write_reg(sc, HASH0, hash[0]); 851 bmac_write_reg(sc, HASH1, hash[1]); 852 bmac_write_reg(sc, HASH2, hash[2]); 853 bmac_write_reg(sc, HASH3, hash[3]); 854 x = bmac_read_reg(sc, RXCFG); 855 x &= ~RxPromiscEnable; 856 x |= RxHashFilterEnable; 857 bmac_write_reg(sc, RXCFG, x); 858 } 859 860 int 861 bmac_mii_readreg(struct device *dev, int phy, int reg) 862 { 863 return mii_bitbang_readreg(dev, &bmac_mbo, phy, reg); 864 } 865 866 void 867 bmac_mii_writereg(struct device *dev, int phy, int reg, int val) 868 { 869 mii_bitbang_writereg(dev, &bmac_mbo, phy, reg, val); 870 } 871 872 u_int32_t 873 bmac_mbo_read(struct device *dev) 874 { 875 struct bmac_softc *sc = (void *)dev; 876 877 return bmac_read_reg(sc, MIFCSR); 878 } 879 880 void 881 bmac_mbo_write(struct device *dev, u_int32_t val) 882 { 883 struct bmac_softc *sc = (void *)dev; 884 885 bmac_write_reg(sc, MIFCSR, val); 886 } 887 888 void 889 bmac_mii_statchg(struct device *dev) 890 { 891 struct bmac_softc *sc = (void *)dev; 892 int x; 893 894 /* Update duplex mode in TX configuration */ 895 x = bmac_read_reg(sc, TXCFG); 896 if ((IFM_OPTIONS(sc->sc_mii.mii_media_active) & IFM_FDX) != 0) 897 x |= TxFullDuplex; 898 else 899 x &= ~TxFullDuplex; 900 bmac_write_reg(sc, TXCFG, x); 901 902 #ifdef BMAC_DEBUG 903 printf("bmac_mii_statchg 0x%x\n", 904 IFM_OPTIONS(sc->sc_mii.mii_media_active)); 905 #endif 906 } 907 908 void 909 bmac_mii_tick(void *v) 910 { 911 struct bmac_softc *sc = v; 912 int s; 913 914 s = splnet(); 915 mii_tick(&sc->sc_mii); 916 splx(s); 917 918 callout_reset(&sc->sc_tick_ch, hz, bmac_mii_tick, sc); 919 } 920