1 /* $NetBSD: esp.c,v 1.29 2009/11/27 03:23:10 rmind Exp $ */ 2 3 /*- 4 * Copyright (c) 1997, 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Charles M. Hannum and by Jason R. Thorpe of the Numerical Aerospace 9 * Simulation Facility, NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 /* 34 * Copyright (c) 1994 Peter Galbavy 35 * All rights reserved. 36 * 37 * Redistribution and use in source and binary forms, with or without 38 * modification, are permitted provided that the following conditions 39 * are met: 40 * 1. Redistributions of source code must retain the above copyright 41 * notice, this list of conditions and the following disclaimer. 42 * 2. Redistributions in binary form must reproduce the above copyright 43 * notice, this list of conditions and the following disclaimer in the 44 * documentation and/or other materials provided with the distribution. 45 * 3. All advertising materials mentioning features or use of this software 46 * must display the following acknowledgement: 47 * This product includes software developed by Peter Galbavy 48 * 4. The name of the author may not be used to endorse or promote products 49 * derived from this software without specific prior written permission. 50 * 51 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 52 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 53 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 54 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 55 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 56 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 57 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 58 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 59 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 60 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 61 * POSSIBILITY OF SUCH DAMAGE. 62 */ 63 64 /* 65 * Based on aic6360 by Jarle Greipsland 66 * 67 * Acknowledgements: Many of the algorithms used in this driver are 68 * inspired by the work of Julian Elischer (julian@tfs.com) and 69 * Charles Hannum (mycroft@duality.gnu.ai.mit.edu). Thanks a million! 70 */ 71 72 #include <sys/cdefs.h> 73 __KERNEL_RCSID(0, "$NetBSD: esp.c,v 1.29 2009/11/27 03:23:10 rmind Exp $"); 74 75 #include <sys/types.h> 76 #include <sys/param.h> 77 #include <sys/systm.h> 78 #include <sys/kernel.h> 79 #include <sys/errno.h> 80 #include <sys/ioctl.h> 81 #include <sys/device.h> 82 #include <sys/buf.h> 83 #include <sys/proc.h> 84 #include <sys/queue.h> 85 #include <sys/malloc.h> 86 87 #include <uvm/uvm_extern.h> 88 89 #include <dev/scsipi/scsi_all.h> 90 #include <dev/scsipi/scsipi_all.h> 91 #include <dev/scsipi/scsiconf.h> 92 #include <dev/scsipi/scsi_message.h> 93 94 #include <dev/ofw/openfirm.h> 95 96 #include <machine/cpu.h> 97 #include <machine/autoconf.h> 98 #include <machine/pio.h> 99 100 #include <dev/ic/ncr53c9xreg.h> 101 #include <dev/ic/ncr53c9xvar.h> 102 103 #include <macppc/dev/dbdma.h> 104 #include <macppc/dev/espvar.h> 105 106 int espmatch(device_t, cfdata_t, void *); 107 void espattach(device_t, device_t, void *); 108 109 /* Linkup to the rest of the kernel */ 110 CFATTACH_DECL_NEW(esp, sizeof(struct esp_softc), 111 espmatch, espattach, NULL, NULL); 112 113 /* 114 * Functions and the switch for the MI code. 115 */ 116 static uint8_t esp_read_reg(struct ncr53c9x_softc *, int); 117 static void esp_write_reg(struct ncr53c9x_softc *, int, uint8_t); 118 static int esp_dma_isintr(struct ncr53c9x_softc *); 119 static void esp_dma_reset(struct ncr53c9x_softc *); 120 static int esp_dma_intr(struct ncr53c9x_softc *); 121 static int esp_dma_setup(struct ncr53c9x_softc *, uint8_t **, 122 size_t *, int, size_t *); 123 static void esp_dma_go(struct ncr53c9x_softc *); 124 static void esp_dma_stop(struct ncr53c9x_softc *); 125 static int esp_dma_isactive(struct ncr53c9x_softc *); 126 127 static struct ncr53c9x_glue esp_glue = { 128 esp_read_reg, 129 esp_write_reg, 130 esp_dma_isintr, 131 esp_dma_reset, 132 esp_dma_intr, 133 esp_dma_setup, 134 esp_dma_go, 135 esp_dma_stop, 136 esp_dma_isactive, 137 NULL, /* gl_clear_latched_intr */ 138 }; 139 140 static int espdmaintr(struct esp_softc *); 141 static bool esp_shutdown(device_t, int); 142 143 int 144 espmatch(device_t parent, cfdata_t cf, void *aux) 145 { 146 struct confargs *ca = aux; 147 148 if (strcmp(ca->ca_name, "53c94") != 0) 149 return 0; 150 151 if (ca->ca_nreg != 16) 152 return 0; 153 if (ca->ca_nintr != 8) 154 return 0; 155 156 return 1; 157 } 158 159 /* 160 * Attach this instance, and then all the sub-devices 161 */ 162 void 163 espattach(device_t parent, device_t self, void *aux) 164 { 165 struct esp_softc *esc = device_private(self); 166 struct ncr53c9x_softc *sc = &esc->sc_ncr53c9x; 167 struct confargs *ca = aux; 168 u_int *reg; 169 int sz; 170 171 /* 172 * Set up glue for MI code early; we use some of it here. 173 */ 174 sc->sc_dev = self; 175 sc->sc_glue = &esp_glue; 176 177 esc->sc_node = ca->ca_node; 178 esc->sc_pri = ca->ca_intr[0]; 179 aprint_normal(" irq %d", esc->sc_pri); 180 181 /* 182 * Map my registers in. 183 */ 184 reg = ca->ca_reg; 185 esc->sc_reg = mapiodev(ca->ca_baseaddr + reg[0], reg[1]); 186 esc->sc_dmareg = mapiodev(ca->ca_baseaddr + reg[2], reg[3]); 187 188 /* Allocate 16-byte aligned DMA command space */ 189 esc->sc_dmacmd = dbdma_alloc(sizeof(dbdma_command_t) * 20); 190 191 /* Other settings */ 192 sc->sc_id = 7; 193 sz = OF_getprop(ca->ca_node, "clock-frequency", 194 &sc->sc_freq, sizeof(int)); 195 if (sz != sizeof(int)) 196 sc->sc_freq = 25000000; 197 198 /* gimme MHz */ 199 sc->sc_freq /= 1000000; 200 201 /* esc->sc_dma->sc_esp = esc;*/ 202 203 /* 204 * XXX More of this should be in ncr53c9x_attach(), but 205 * XXX should we really poke around the chip that much in 206 * XXX the MI code? Think about this more... 207 */ 208 209 /* 210 * Set up static configuration info. 211 */ 212 sc->sc_cfg1 = sc->sc_id | NCRCFG1_PARENB; 213 sc->sc_cfg2 = NCRCFG2_SCSI2; /* | NCRCFG2_FE */ 214 sc->sc_cfg3 = NCRCFG3_CDB; 215 sc->sc_rev = NCR_VARIANT_NCR53C94; 216 217 /* 218 * XXX minsync and maxxfer _should_ be set up in MI code, 219 * XXX but it appears to have some dependency on what sort 220 * XXX of DMA we're hooked up to, etc. 221 */ 222 223 /* 224 * This is the value used to start sync negotiations 225 * Note that the NCR register "SYNCTP" is programmed 226 * in "clocks per byte", and has a minimum value of 4. 227 * The SCSI period used in negotiation is one-fourth 228 * of the time (in nanoseconds) needed to transfer one byte. 229 * Since the chip's clock is given in MHz, we have the following 230 * formula: 4 * period = (1000 / freq) * 4 231 */ 232 sc->sc_minsync = 1000 / sc->sc_freq; 233 234 sc->sc_maxxfer = 64 * 1024; 235 236 /* and the interuppts */ 237 intr_establish(esc->sc_pri, IST_EDGE, IPL_BIO, ncr53c9x_intr, sc); 238 239 /* Do the common parts of attachment. */ 240 sc->sc_adapter.adapt_minphys = minphys; 241 sc->sc_adapter.adapt_request = ncr53c9x_scsipi_request; 242 ncr53c9x_attach(sc); 243 244 /* Turn on target selection using the `DMA' method */ 245 sc->sc_features |= NCR_F_DMASELECT; 246 247 /* Reset SCSI bus when halt. */ 248 if (!pmf_device_register1(self, NULL, NULL, esp_shutdown)) 249 aprint_error_dev(self, "couldn't establish power handler\n"); 250 } 251 252 /* 253 * Glue functions. 254 */ 255 256 uint8_t 257 esp_read_reg(struct ncr53c9x_softc *sc, int reg) 258 { 259 struct esp_softc *esc = (struct esp_softc *)sc; 260 261 return in8(&esc->sc_reg[reg * 16]); 262 /*return (esc->sc_reg[reg * 16]);*/ 263 } 264 265 void 266 esp_write_reg(struct ncr53c9x_softc *sc, int reg, uint8_t val) 267 { 268 struct esp_softc *esc = (struct esp_softc *)sc; 269 uint8_t v = val; 270 271 out8(&esc->sc_reg[reg * 16], v); 272 /*esc->sc_reg[reg * 16] = v;*/ 273 } 274 275 int 276 esp_dma_isintr(struct ncr53c9x_softc *sc) 277 { 278 279 return esp_read_reg(sc, NCR_STAT) & NCRSTAT_INT; 280 } 281 282 void 283 esp_dma_reset(struct ncr53c9x_softc *sc) 284 { 285 struct esp_softc *esc = (struct esp_softc *)sc; 286 287 dbdma_stop(esc->sc_dmareg); 288 esc->sc_dmaactive = 0; 289 } 290 291 int 292 esp_dma_intr(struct ncr53c9x_softc *sc) 293 { 294 struct esp_softc *esc = (struct esp_softc *)sc; 295 296 return espdmaintr(esc); 297 } 298 299 int 300 esp_dma_setup(struct ncr53c9x_softc *sc, uint8_t **addr, size_t *len, 301 int datain, size_t *dmasize) 302 { 303 struct esp_softc *esc = (struct esp_softc *)sc; 304 dbdma_command_t *cmdp; 305 u_int cmd; 306 u_int va; 307 int count, offset; 308 309 cmdp = esc->sc_dmacmd; 310 cmd = datain ? DBDMA_CMD_IN_MORE : DBDMA_CMD_OUT_MORE; 311 312 count = *dmasize; 313 314 if (count / PAGE_SIZE > 32) 315 panic("%s: transfer size >= 128k", device_xname(sc->sc_dev)); 316 317 esc->sc_dmaaddr = addr; 318 esc->sc_dmalen = len; 319 esc->sc_dmasize = count; 320 321 va = (u_int)*esc->sc_dmaaddr; 322 offset = va & PGOFSET; 323 324 /* if va is not page-aligned, setup the first page */ 325 if (offset != 0) { 326 int rest = PAGE_SIZE - offset; /* the rest of the page */ 327 328 if (count > rest) { /* if continues to next page */ 329 DBDMA_BUILD(cmdp, cmd, 0, rest, kvtop((void *)va), 330 DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, 331 DBDMA_BRANCH_NEVER); 332 count -= rest; 333 va += rest; 334 cmdp++; 335 } 336 } 337 338 /* now va is page-aligned */ 339 while (count > PAGE_SIZE) { 340 DBDMA_BUILD(cmdp, cmd, 0, PAGE_SIZE, kvtop((void *)va), 341 DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER); 342 count -= PAGE_SIZE; 343 va += PAGE_SIZE; 344 cmdp++; 345 } 346 347 /* the last page (count <= PAGE_SIZE here) */ 348 cmd = datain ? DBDMA_CMD_IN_LAST : DBDMA_CMD_OUT_LAST; 349 DBDMA_BUILD(cmdp, cmd , 0, count, kvtop((void *)va), 350 DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER); 351 cmdp++; 352 353 DBDMA_BUILD(cmdp, DBDMA_CMD_STOP, 0, 0, 0, 354 DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER); 355 356 esc->sc_dma_direction = datain ? D_WRITE : 0; 357 358 return 0; 359 } 360 361 void 362 esp_dma_go(struct ncr53c9x_softc *sc) 363 { 364 struct esp_softc *esc = (struct esp_softc *)sc; 365 366 dbdma_start(esc->sc_dmareg, esc->sc_dmacmd); 367 esc->sc_dmaactive = 1; 368 } 369 370 void 371 esp_dma_stop(struct ncr53c9x_softc *sc) 372 { 373 struct esp_softc *esc = (struct esp_softc *)sc; 374 375 dbdma_stop(esc->sc_dmareg); 376 esc->sc_dmaactive = 0; 377 } 378 379 int 380 esp_dma_isactive(struct ncr53c9x_softc *sc) 381 { 382 struct esp_softc *esc = (struct esp_softc *)sc; 383 384 return esc->sc_dmaactive; 385 } 386 387 388 /* 389 * Pseudo (chained) interrupt from the esp driver to kick the 390 * current running DMA transfer. I am replying on espintr() to 391 * pickup and clean errors for now 392 * 393 * return 1 if it was a DMA continue. 394 */ 395 int 396 espdmaintr(struct esp_softc *sc) 397 { 398 struct ncr53c9x_softc *nsc = (struct ncr53c9x_softc *)sc; 399 int trans, resid; 400 u_long csr = sc->sc_dma_direction; 401 402 #if 0 403 if (csr & D_ERR_PEND) { 404 DMACSR(sc) &= ~D_EN_DMA; /* Stop DMA */ 405 DMACSR(sc) |= D_INVALIDATE; 406 snprintb(bits, sizeof(bits), DMACSRBITS, csr); 407 printf("%s: error: csr=%s\n", device_xname(nsc->sc_dev), bits); 408 return -1; 409 } 410 #endif 411 412 /* This is an "assertion" :) */ 413 if (sc->sc_dmaactive == 0) 414 panic("%s: DMA wasn't active", __func__); 415 416 /* dbdma_flush(sc->sc_dmareg); */ 417 418 /* DMA has stopped */ 419 dbdma_stop(sc->sc_dmareg); 420 sc->sc_dmaactive = 0; 421 422 if (sc->sc_dmasize == 0) { 423 /* A "Transfer Pad" operation completed */ 424 NCR_DMA(("dmaintr: discarded %d bytes (tcl=%d, tcm=%d)\n", 425 NCR_READ_REG(nsc, NCR_TCL) | 426 (NCR_READ_REG(nsc, NCR_TCM) << 8), 427 NCR_READ_REG(nsc, NCR_TCL), 428 NCR_READ_REG(nsc, NCR_TCM))); 429 return 0; 430 } 431 432 resid = 0; 433 /* 434 * If a transfer onto the SCSI bus gets interrupted by the device 435 * (e.g. for a SAVEPOINTER message), the data in the FIFO counts 436 * as residual since the ESP counter registers get decremented as 437 * bytes are clocked into the FIFO. 438 */ 439 if (!(csr & D_WRITE) && 440 (resid = (NCR_READ_REG(nsc, NCR_FFLAG) & NCRFIFO_FF)) != 0) { 441 NCR_DMA(("dmaintr: empty esp FIFO of %d ", resid)); 442 } 443 444 if ((nsc->sc_espstat & NCRSTAT_TC) == 0) { 445 /* 446 * `Terminal count' is off, so read the residue 447 * out of the ESP counter registers. 448 */ 449 resid += (NCR_READ_REG(nsc, NCR_TCL) | 450 (NCR_READ_REG(nsc, NCR_TCM) << 8) | 451 ((nsc->sc_cfg2 & NCRCFG2_FE) 452 ? (NCR_READ_REG(nsc, NCR_TCH) << 16) 453 : 0)); 454 455 if (resid == 0 && sc->sc_dmasize == 65536 && 456 (nsc->sc_cfg2 & NCRCFG2_FE) == 0) 457 /* A transfer of 64K is encoded as `TCL=TCM=0' */ 458 resid = 65536; 459 } 460 461 trans = sc->sc_dmasize - resid; 462 if (trans < 0) { /* transferred < 0 ? */ 463 #if 0 464 /* 465 * This situation can happen in perfectly normal operation 466 * if the ESP is reselected while using DMA to select 467 * another target. As such, don't print the warning. 468 */ 469 printf("%s: xfer (%d) > req (%d)\n", 470 device_xname(nsc->sc_dev), trans, sc->sc_dmasize); 471 #endif 472 trans = sc->sc_dmasize; 473 } 474 475 NCR_DMA(("dmaintr: tcl=%d, tcm=%d, tch=%d; trans=%d, resid=%d\n", 476 NCR_READ_REG(nsc, NCR_TCL), 477 NCR_READ_REG(nsc, NCR_TCM), 478 (nsc->sc_cfg2 & NCRCFG2_FE) 479 ? NCR_READ_REG(nsc, NCR_TCH) : 0, 480 trans, resid)); 481 482 #if 0 483 if (csr & D_WRITE) 484 flushcache(*sc->sc_dmaaddr, trans); 485 #endif 486 487 *sc->sc_dmalen -= trans; 488 *sc->sc_dmaaddr += trans; 489 490 #if 0 /* this is not normal operation just yet */ 491 if (*sc->sc_dmalen == 0 || 492 nsc->sc_phase != nsc->sc_prevphase) 493 return 0; 494 495 /* and again */ 496 dma_start(sc, sc->sc_dmaaddr, sc->sc_dmalen, DMACSR(sc) & D_WRITE); 497 return 1; 498 #endif 499 return 0; 500 } 501 502 bool 503 esp_shutdown(device_t self, int howto) 504 { 505 struct esp_softc *esc; 506 struct ncr53c9x_softc *sc; 507 508 esc = device_private(self); 509 sc = &esc->sc_ncr53c9x; 510 NCRCMD(sc, NCRCMD_RSTSCSI); 511 512 return true; 513 } 514