1 /* $NetBSD: dbdma.c,v 1.8 2007/10/17 19:55:18 garbled Exp $ */ 2 3 /* 4 * Copyright 1991-1998 by Open Software Foundation, Inc. 5 * All Rights Reserved 6 * 7 * Permission to use, copy, modify, and distribute this software and 8 * its documentation for any purpose and without fee is hereby granted, 9 * provided that the above copyright notice appears in all copies and 10 * that both the copyright notice and this permission notice appear in 11 * supporting documentation. 12 * 13 * OSF DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE 14 * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 15 * FOR A PARTICULAR PURPOSE. 16 * 17 * IN NO EVENT SHALL OSF BE LIABLE FOR ANY SPECIAL, INDIRECT, OR 18 * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM 19 * LOSS OF USE, DATA OR PROFITS, WHETHER IN ACTION OF CONTRACT, 20 * NEGLIGENCE, OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION 21 * WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 22 * 23 */ 24 25 #include <sys/cdefs.h> 26 __KERNEL_RCSID(0, "$NetBSD: dbdma.c,v 1.8 2007/10/17 19:55:18 garbled Exp $"); 27 28 #include <sys/param.h> 29 #include <sys/malloc.h> 30 #include <sys/systm.h> 31 32 #include <uvm/uvm_extern.h> 33 34 #include <machine/autoconf.h> 35 #include <machine/pio.h> 36 #include <macppc/dev/dbdma.h> 37 38 dbdma_command_t *dbdma_alloc_commands = NULL; 39 40 void 41 dbdma_start(dmap, commands) 42 dbdma_regmap_t *dmap; 43 dbdma_command_t *commands; 44 { 45 unsigned long addr = vtophys((vaddr_t)commands); 46 47 if (addr & 0xf) 48 panic("dbdma_start command structure not 16-byte aligned"); 49 50 dmap->d_intselect = 0xff; /* Endian magic - clear out interrupts */ 51 DBDMA_ST4_ENDIAN(&dmap->d_control, 52 DBDMA_CLEAR_CNTRL( (DBDMA_CNTRL_ACTIVE | 53 DBDMA_CNTRL_DEAD | 54 DBDMA_CNTRL_WAKE | 55 DBDMA_CNTRL_FLUSH | 56 DBDMA_CNTRL_PAUSE | 57 DBDMA_CNTRL_RUN ))); 58 59 while (DBDMA_LD4_ENDIAN(&dmap->d_status) & DBDMA_CNTRL_ACTIVE) 60 ; 61 62 dmap->d_cmdptrhi = 0; /* 64-bit not yet */ 63 DBDMA_ST4_ENDIAN(&dmap->d_cmdptrlo, addr); 64 65 DBDMA_ST4_ENDIAN(&dmap->d_control, DBDMA_SET_CNTRL(DBDMA_CNTRL_RUN)); 66 } 67 68 void 69 dbdma_stop(dmap) 70 dbdma_regmap_t *dmap; 71 { 72 out32rb(&dmap->d_control, DBDMA_CLEAR_CNTRL(DBDMA_CNTRL_RUN) | 73 DBDMA_SET_CNTRL(DBDMA_CNTRL_FLUSH)); 74 75 while (in32rb(&dmap->d_status) & 76 (DBDMA_CNTRL_ACTIVE|DBDMA_CNTRL_FLUSH)); 77 } 78 79 void 80 dbdma_flush(dmap) 81 dbdma_regmap_t *dmap; 82 { 83 out32rb(&dmap->d_control, DBDMA_SET_CNTRL(DBDMA_CNTRL_FLUSH)); 84 85 while (in32rb(&dmap->d_status) & (DBDMA_CNTRL_FLUSH)); 86 } 87 88 void 89 dbdma_reset(dmap) 90 dbdma_regmap_t *dmap; 91 { 92 out32rb(&dmap->d_control, 93 DBDMA_CLEAR_CNTRL( (DBDMA_CNTRL_ACTIVE | 94 DBDMA_CNTRL_DEAD | 95 DBDMA_CNTRL_WAKE | 96 DBDMA_CNTRL_FLUSH | 97 DBDMA_CNTRL_PAUSE | 98 DBDMA_CNTRL_RUN ))); 99 100 while (in32rb(&dmap->d_status) & DBDMA_CNTRL_RUN); 101 } 102 103 void 104 dbdma_continue(dmap) 105 dbdma_regmap_t *dmap; 106 { 107 out32rb(&dmap->d_control, 108 DBDMA_SET_CNTRL(DBDMA_CNTRL_RUN | DBDMA_CNTRL_WAKE) | 109 DBDMA_CLEAR_CNTRL(DBDMA_CNTRL_PAUSE | DBDMA_CNTRL_DEAD)); 110 } 111 112 void 113 dbdma_pause(dmap) 114 dbdma_regmap_t *dmap; 115 { 116 DBDMA_ST4_ENDIAN(&dmap->d_control,DBDMA_SET_CNTRL(DBDMA_CNTRL_PAUSE)); 117 118 while (DBDMA_LD4_ENDIAN(&dmap->d_status) & DBDMA_CNTRL_ACTIVE) 119 ; 120 } 121 122 dbdma_command_t * 123 dbdma_alloc(size) 124 int size; 125 { 126 u_int buf; 127 128 buf = (u_int)malloc(size + 0x0f, M_DEVBUF, M_WAITOK); 129 buf = (buf + 0x0f) & ~0x0f; 130 131 return (dbdma_command_t *)buf; 132 } 133