1 /* $NetBSD: dbdma.c,v 1.5 2003/07/15 02:43:28 lukem Exp $ */ 2 3 /* 4 * Copyright 1991-1998 by Open Software Foundation, Inc. 5 * All Rights Reserved 6 * 7 * Permission to use, copy, modify, and distribute this software and 8 * its documentation for any purpose and without fee is hereby granted, 9 * provided that the above copyright notice appears in all copies and 10 * that both the copyright notice and this permission notice appear in 11 * supporting documentation. 12 * 13 * OSF DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE 14 * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 15 * FOR A PARTICULAR PURPOSE. 16 * 17 * IN NO EVENT SHALL OSF BE LIABLE FOR ANY SPECIAL, INDIRECT, OR 18 * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM 19 * LOSS OF USE, DATA OR PROFITS, WHETHER IN ACTION OF CONTRACT, 20 * NEGLIGENCE, OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION 21 * WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 22 * 23 */ 24 25 #include <sys/cdefs.h> 26 __KERNEL_RCSID(0, "$NetBSD: dbdma.c,v 1.5 2003/07/15 02:43:28 lukem Exp $"); 27 28 #include <sys/param.h> 29 #include <sys/malloc.h> 30 #include <sys/systm.h> 31 32 #include <uvm/uvm_extern.h> 33 34 #include <machine/pio.h> 35 #include <macppc/dev/dbdma.h> 36 37 #define eieio() __asm__ volatile("eieio") 38 39 40 dbdma_command_t *dbdma_alloc_commands = NULL; 41 42 void 43 dbdma_start(dmap, commands) 44 dbdma_regmap_t *dmap; 45 dbdma_command_t *commands; 46 { 47 unsigned long addr = vtophys((vaddr_t)commands); 48 49 if (addr & 0xf) 50 panic("dbdma_start command structure not 16-byte aligned"); 51 52 dmap->d_intselect = 0xff; /* Endian magic - clear out interrupts */ 53 DBDMA_ST4_ENDIAN(&dmap->d_control, 54 DBDMA_CLEAR_CNTRL( (DBDMA_CNTRL_ACTIVE | 55 DBDMA_CNTRL_DEAD | 56 DBDMA_CNTRL_WAKE | 57 DBDMA_CNTRL_FLUSH | 58 DBDMA_CNTRL_PAUSE | 59 DBDMA_CNTRL_RUN ))); 60 eieio(); 61 62 while (DBDMA_LD4_ENDIAN(&dmap->d_status) & DBDMA_CNTRL_ACTIVE) 63 eieio(); 64 65 dmap->d_cmdptrhi = 0; eieio();/* 64-bit not yet */ 66 DBDMA_ST4_ENDIAN(&dmap->d_cmdptrlo, addr); eieio(); 67 68 DBDMA_ST4_ENDIAN(&dmap->d_control, DBDMA_SET_CNTRL(DBDMA_CNTRL_RUN)); 69 eieio(); 70 } 71 72 void 73 dbdma_stop(dmap) 74 dbdma_regmap_t *dmap; 75 { 76 out32rb(&dmap->d_control, DBDMA_CLEAR_CNTRL(DBDMA_CNTRL_RUN) | 77 DBDMA_SET_CNTRL(DBDMA_CNTRL_FLUSH)); 78 79 while (in32rb(&dmap->d_status) & 80 (DBDMA_CNTRL_ACTIVE|DBDMA_CNTRL_FLUSH)); 81 } 82 83 void 84 dbdma_flush(dmap) 85 dbdma_regmap_t *dmap; 86 { 87 out32rb(&dmap->d_control, DBDMA_SET_CNTRL(DBDMA_CNTRL_FLUSH)); 88 89 while (in32rb(&dmap->d_status) & (DBDMA_CNTRL_FLUSH)); 90 } 91 92 void 93 dbdma_reset(dmap) 94 dbdma_regmap_t *dmap; 95 { 96 out32rb(&dmap->d_control, 97 DBDMA_CLEAR_CNTRL( (DBDMA_CNTRL_ACTIVE | 98 DBDMA_CNTRL_DEAD | 99 DBDMA_CNTRL_WAKE | 100 DBDMA_CNTRL_FLUSH | 101 DBDMA_CNTRL_PAUSE | 102 DBDMA_CNTRL_RUN ))); 103 104 while (in32rb(&dmap->d_status) & DBDMA_CNTRL_RUN); 105 } 106 107 void 108 dbdma_continue(dmap) 109 dbdma_regmap_t *dmap; 110 { 111 out32rb(&dmap->d_control, 112 DBDMA_SET_CNTRL(DBDMA_CNTRL_RUN | DBDMA_CNTRL_WAKE) | 113 DBDMA_CLEAR_CNTRL(DBDMA_CNTRL_PAUSE | DBDMA_CNTRL_DEAD)); 114 } 115 116 void 117 dbdma_pause(dmap) 118 dbdma_regmap_t *dmap; 119 { 120 DBDMA_ST4_ENDIAN(&dmap->d_control,DBDMA_SET_CNTRL(DBDMA_CNTRL_PAUSE)); 121 eieio(); 122 123 while (DBDMA_LD4_ENDIAN(&dmap->d_status) & DBDMA_CNTRL_ACTIVE) 124 eieio(); 125 } 126 127 dbdma_command_t * 128 dbdma_alloc(size) 129 int size; 130 { 131 u_int buf; 132 133 buf = (u_int)malloc(size + 0x0f, M_DEVBUF, M_WAITOK); 134 buf = (buf + 0x0f) & ~0x0f; 135 136 return (dbdma_command_t *)buf; 137 } 138