xref: /netbsd-src/sys/arch/mac68k/include/intr.h (revision f5d3fbbc6ff4a77159fb268d247bd94cb7d7e332)
1 /*	$NetBSD: intr.h,v 1.6 1997/10/10 05:54:51 scottr Exp $	*/
2 
3 /*
4  * Copyright (C) 1997 Scott Reynolds
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  * 3. The name of the author may not be used to endorse or promote products
16  *    derived from this software without specific prior written permission.
17  *
18  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28  */
29 
30 #ifndef _MAC68K_INTR_H_
31 #define _MAC68K_INTR_H_
32 
33 #ifdef _KERNEL
34 /*
35  * spl functions; all but spl0 are done in-line
36  */
37 
38 #define _spl(s)								\
39 ({									\
40         register int _spl_r;						\
41 									\
42         __asm __volatile ("clrl %0; movew sr,%0; movew %1,sr" :		\
43                 "&=d" (_spl_r) : "di" (s));				\
44         _spl_r;								\
45 })
46 
47 #define _splraise(s)							\
48 ({									\
49 	int _spl_r;							\
50 									\
51 	__asm __volatile ("						\
52 		clrl	d0					;	\
53 		movw	sr,d0					;	\
54 		movl	d0,%0					;	\
55 		andw	#0x700,d0				;	\
56 		movw	%1,d1					;	\
57 		andw	#0x700,d1				;	\
58 		cmpw	d0,d1					;	\
59 		jle	1f					;	\
60 		movw	%1,sr					;	\
61 	    1:"							:	\
62 		    "&=d" (_spl_r)				:	\
63 		    "di" (s)					:	\
64 		    "d0", "d1");					\
65 	_spl_r;								\
66 })
67 
68 /* spl0 requires checking for software interrupts */
69 #define spl1()  _spl(PSL_S|PSL_IPL1)
70 #define spl2()  _spl(PSL_S|PSL_IPL2)
71 #define spl3()  _spl(PSL_S|PSL_IPL3)
72 #define spl4()  _spl(PSL_S|PSL_IPL4)
73 #define spl5()  _spl(PSL_S|PSL_IPL5)
74 #define spl6()  _spl(PSL_S|PSL_IPL6)
75 #define spl7()  _spl(PSL_S|PSL_IPL7)
76 
77 /* These spl calls are _not_ to be used by machine-independent code. */
78 #define	spladb()	splhigh()
79 #define	splzs()		splserial()
80 #define	splsoft()	spl1()
81 
82 /*
83  * These should be used for:
84  * 1) ensuring mutual exclusion (why use processor level?)
85  * 2) allowing faster devices to take priority
86  *
87  * Note that on the Mac, most things are masked at spl1, almost
88  * everything at spl2, and everything but the panic switch and
89  * power at spl4.
90  */
91 #define	splsoftclock()	splsoft()
92 #define	splsoftnet()	splsoft()
93 #define	spltty()	_splraise(PSL_S|PSL_IPL1)
94 #define	splbio()	spl2()
95 #define	splnet()	spl2()
96 #define	splimp()	spl2()
97 #define	splclock()	spl2()
98 #define	splstatclock()	spl2()
99 #define	splsched()	spl3()
100 #define	splserial()	spl4()
101 #define	splhigh()	spl7()
102 
103 /* watch out for side effects */
104 #define splx(s)         ((s) & PSL_IPL ? _spl(s) : spl0())
105 
106 /*
107  * simulated software interrupt register
108  */
109 extern volatile u_int8_t ssir;
110 
111 #define	SIR_NET		0x01
112 #define	SIR_CLOCK	0x02
113 #define	SIR_SERIAL	0x04
114 #define SIR_DTMGR	0x08
115 
116 #define	siron(mask)	\
117 	__asm __volatile ( "orb %0,_ssir" : : "i" (mask))
118 #define	siroff(mask)	\
119 	__asm __volatile ( "andb %0,_ssir" : : "ir" (~(mask)));
120 
121 #define	setsoftnet()	siron(SIR_NET)
122 #define	setsoftclock()	siron(SIR_CLOCK)
123 #define	setsoftserial()	siron(SIR_SERIAL)
124 #define	setsoftdtmgr()	siron(SIR_DTMGR)
125 
126 /* locore.s */
127 int	spl0 __P((void));
128 #endif /* _KERNEL */
129 
130 #endif /* _MAC68K_INTR_H_ */
131