1 /* $NetBSD: intr.h,v 1.8 1997/11/07 07:33:18 scottr Exp $ */ 2 3 /* 4 * Copyright (C) 1997 Scott Reynolds 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. The name of the author may not be used to endorse or promote products 16 * derived from this software without specific prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 */ 29 30 #ifndef _MAC68K_INTR_H_ 31 #define _MAC68K_INTR_H_ 32 33 #ifdef _KERNEL 34 /* 35 * spl functions; all but spl0 are done in-line 36 */ 37 38 #define _spl(s) \ 39 ({ \ 40 register int _spl_r; \ 41 \ 42 __asm __volatile ("clrl %0; movew sr,%0; movew %1,sr" : \ 43 "&=d" (_spl_r) : "di" (s)); \ 44 _spl_r; \ 45 }) 46 47 #define _splraise(s) \ 48 ({ \ 49 int _spl_r; \ 50 \ 51 __asm __volatile (" \ 52 clrl d0 ; \ 53 movw sr,d0 ; \ 54 movl d0,%0 ; \ 55 andw #0x700,d0 ; \ 56 movw %1,d1 ; \ 57 andw #0x700,d1 ; \ 58 cmpw d0,d1 ; \ 59 jle 1f ; \ 60 movw %1,sr ; \ 61 1:" : \ 62 "&=d" (_spl_r) : \ 63 "di" (s) : \ 64 "d0", "d1"); \ 65 _spl_r; \ 66 }) 67 68 /* spl0 requires checking for software interrupts */ 69 #define spl1() _spl(PSL_S|PSL_IPL1) 70 #define spl2() _spl(PSL_S|PSL_IPL2) 71 #define spl3() _spl(PSL_S|PSL_IPL3) 72 #define spl4() _spl(PSL_S|PSL_IPL4) 73 #define spl5() _spl(PSL_S|PSL_IPL5) 74 #define spl6() _spl(PSL_S|PSL_IPL6) 75 #define spl7() _spl(PSL_S|PSL_IPL7) 76 77 /* These spl calls are _not_ to be used by machine-independent code. */ 78 #define spladb() splhigh() 79 #define splzs() splserial() 80 #define splsoft() spl1() 81 82 /* 83 * splnet must block hardware network interrupts 84 * splimp must be > spltty 85 */ 86 extern unsigned short mac68k_ttyipl; 87 extern unsigned short mac68k_bioipl; 88 extern unsigned short mac68k_netipl; 89 extern unsigned short mac68k_impipl; 90 extern unsigned short mac68k_clockipl; 91 extern unsigned short mac68k_statclockipl; 92 extern unsigned short mac68k_schedipl; 93 94 /* 95 * These should be used for: 96 * 1) ensuring mutual exclusion (why use processor level?) 97 * 2) allowing faster devices to take priority 98 * 99 * Note that on the Mac, most things are masked at spl1, almost 100 * everything at spl2, and everything but the panic switch and 101 * power at spl4. 102 */ 103 #define splsoftclock() splsoft() 104 #define splsoftnet() splsoft() 105 #define spltty() _splraise(mac68k_ttyipl) 106 #define splbio() _splraise(mac68k_bioipl) 107 #define splnet() _splraise(mac68k_netipl) 108 #define splimp() _splraise(mac68k_impipl) 109 #define splclock() _splraise(mac68k_clockipl) 110 #define splstatclock() _splraise(mac68k_statclockipl) 111 #define splsched() _splsched(mac68k_schedipl) 112 #define splserial() spl4() 113 #define splhigh() spl7() 114 115 /* watch out for side effects */ 116 #define splx(s) ((s) & PSL_IPL ? _spl(s) : spl0()) 117 118 /* 119 * simulated software interrupt register 120 */ 121 extern volatile u_int8_t ssir; 122 123 #define SIR_NET 0x01 124 #define SIR_CLOCK 0x02 125 #define SIR_SERIAL 0x04 126 #define SIR_DTMGR 0x08 127 #define SIR_ADB 0x10 128 129 #define siron(mask) \ 130 __asm __volatile ( "orb %0,_ssir" : : "i" (mask)) 131 #define siroff(mask) \ 132 __asm __volatile ( "andb %0,_ssir" : : "ir" (~(mask))); 133 134 #define setsoftnet() siron(SIR_NET) 135 #define setsoftclock() siron(SIR_CLOCK) 136 #define setsoftserial() siron(SIR_SERIAL) 137 #define setsoftdtmgr() siron(SIR_DTMGR) 138 #define setsoftadb() siron(SIR_ADB) 139 140 /* locore.s */ 141 int spl0 __P((void)); 142 #endif /* _KERNEL */ 143 144 #endif /* _MAC68K_INTR_H_ */ 145