1 /* $NetBSD: bus.h,v 1.12 1999/03/23 21:29:05 drochner Exp $ */ 2 3 /*- 4 * Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * Copyright (C) 1997 Scott Reynolds. All rights reserved. 42 * 43 * Redistribution and use in source and binary forms, with or without 44 * modification, are permitted provided that the following conditions 45 * are met: 46 * 1. Redistributions of source code must retain the above copyright 47 * notice, this list of conditions and the following disclaimer. 48 * 2. Redistributions in binary form must reproduce the above copyright 49 * notice, this list of conditions and the following disclaimer in the 50 * documentation and/or other materials provided with the distribution. 51 * 3. The name of the author may not be used to endorse or promote products 52 * derived from this software without specific prior written permission 53 * 54 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 55 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 56 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 57 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 58 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 59 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 60 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 61 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 62 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 63 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 64 */ 65 66 #ifndef _MAC68K_BUS_H_ 67 #define _MAC68K_BUS_H_ 68 69 /* 70 * Value for the mac68k bus space tag, not to be used directly by MI code. 71 */ 72 #define MAC68K_BUS_SPACE_MEM 0 /* space is mem space */ 73 74 /* 75 * Bus address and size types 76 */ 77 typedef u_long bus_addr_t; 78 typedef u_long bus_size_t; 79 80 /* 81 * Access methods for bus resources and address space. 82 */ 83 typedef int bus_space_tag_t; 84 typedef u_long bus_space_handle_t; 85 86 /* 87 * int bus_space_map __P((bus_space_tag_t t, bus_addr_t addr, 88 * bus_size_t size, int flags, bus_space_handle_t *bshp)); 89 * 90 * Map a region of bus space. 91 */ 92 93 #define BUS_SPACE_MAP_CACHEABLE 0x01 94 #define BUS_SPACE_MAP_LINEAR 0x02 95 96 int bus_space_map __P((bus_space_tag_t, bus_addr_t, bus_size_t, 97 int, bus_space_handle_t *)); 98 99 /* 100 * void bus_space_unmap __P((bus_space_tag_t t, 101 * bus_space_handle_t bsh, bus_size_t size)); 102 * 103 * Unmap a region of bus space. 104 */ 105 106 void bus_space_unmap __P((bus_space_tag_t, bus_space_handle_t, bus_size_t)); 107 108 /* 109 * int bus_space_subregion __P((bus_space_tag_t t, 110 * bus_space_handle_t bsh, bus_size_t offset, bus_size_t size, 111 * bus_space_handle_t *nbshp)); 112 * 113 * Get a new handle for a subregion of an already-mapped area of bus space. 114 */ 115 116 int bus_space_subregion __P((bus_space_tag_t t, bus_space_handle_t bsh, 117 bus_size_t offset, bus_size_t size, bus_space_handle_t *nbshp)); 118 119 /* 120 * int bus_space_alloc __P((bus_space_tag_t t, bus_addr_t, rstart, 121 * bus_addr_t rend, bus_size_t size, bus_size_t align, 122 * bus_size_t boundary, int flags, bus_addr_t *addrp, 123 * bus_space_handle_t *bshp)); 124 * 125 * Allocate a region of bus space. 126 */ 127 128 int bus_space_alloc __P((bus_space_tag_t t, bus_addr_t rstart, 129 bus_addr_t rend, bus_size_t size, bus_size_t align, 130 bus_size_t boundary, int cacheable, bus_addr_t *addrp, 131 bus_space_handle_t *bshp)); 132 133 /* 134 * int bus_space_free __P((bus_space_tag_t t, 135 * bus_space_handle_t bsh, bus_size_t size)); 136 * 137 * Free a region of bus space. 138 */ 139 140 void bus_space_free __P((bus_space_tag_t t, bus_space_handle_t bsh, 141 bus_size_t size)); 142 143 /* 144 * int mac68k_bus_space_probe __P((bus_space_tag_t t, 145 * bus_space_handle_t bsh, bus_size_t offset, int sz)); 146 * 147 * Probe the bus at t/bsh/offset, using sz as the size of the load. 148 * 149 * This is a machine-dependent extension, and is not to be used by 150 * machine-independent code. 151 */ 152 153 int mac68k_bus_space_probe __P((bus_space_tag_t t, 154 bus_space_handle_t bsh, bus_size_t offset, int sz)); 155 156 /* 157 * u_intN_t bus_space_read_N __P((bus_space_tag_t tag, 158 * bus_space_handle_t bsh, bus_size_t offset)); 159 * 160 * Read a 1, 2, 4, or 8 byte quantity from bus space 161 * described by tag/handle/offset. 162 */ 163 164 #define bus_space_read_1(t, h, o) \ 165 ((void) t, (*(volatile u_int8_t *)((h) + (o)))) 166 167 #define bus_space_read_2(t, h, o) \ 168 ((void) t, (*(volatile u_int16_t *)((h) + (o)))) 169 170 #define bus_space_read_4(t, h, o) \ 171 ((void) t, (*(volatile u_int32_t *)((h) + (o)))) 172 173 #if 0 /* Cause a link error for bus_space_read_8 */ 174 #define bus_space_read_8(t, h, o) !!! bus_space_read_8 unimplemented !!! 175 #endif 176 177 /* 178 * void bus_space_read_multi_N __P((bus_space_tag_t tag, 179 * bus_space_handle_t bsh, bus_size_t offset, 180 * u_intN_t *addr, size_t count)); 181 * 182 * Read `count' 1, 2, 4, or 8 byte quantities from bus space 183 * described by tag/handle/offset and copy into buffer provided. 184 */ 185 186 #define bus_space_read_multi_1(t, h, o, a, c) do { \ 187 (void) t; \ 188 __asm __volatile (" \ 189 movl %0,a0 ; \ 190 movl %1,a1 ; \ 191 movl %2,d0 ; \ 192 1: movb a0@,a1@+ ; \ 193 subql #1,d0 ; \ 194 jne 1b" : \ 195 : \ 196 "r" ((h) + (o)), "g" (a), "g" ((size_t)(c)) : \ 197 "a0","a1","d0"); \ 198 } while (0) 199 200 #define bus_space_read_multi_2(t, h, o, a, c) do { \ 201 (void) t; \ 202 __asm __volatile (" \ 203 movl %0,a0 ; \ 204 movl %1,a1 ; \ 205 movl %2,d0 ; \ 206 1: movw a0@,a1@+ ; \ 207 subql #1,d0 ; \ 208 jne 1b" : \ 209 : \ 210 "r" ((h) + (o)), "g" (a), "g" ((size_t)(c)) : \ 211 "a0","a1","d0"); \ 212 } while (0) 213 214 #define bus_space_read_multi_4(t, h, o, a, c) do { \ 215 (void) t; \ 216 __asm __volatile (" \ 217 movl %0,a0 ; \ 218 movl %1,a1 ; \ 219 movl %2,d0 ; \ 220 1: movl a0@,a1@+ ; \ 221 subql #1,d0 ; \ 222 jne 1b" : \ 223 : \ 224 "r" ((h) + (o)), "g" (a), "g" ((size_t)(c)) : \ 225 "a0","a1","d0"); \ 226 } while (0) 227 228 #if 0 /* Cause a link error for bus_space_read_multi_8 */ 229 #define bus_space_read_multi_8 !!! bus_space_read_multi_8 unimplemented !!! 230 #endif 231 232 /* 233 * void bus_space_read_region_N __P((bus_space_tag_t tag, 234 * bus_space_handle_t bsh, bus_size_t offset, 235 * u_intN_t *addr, size_t count)); 236 * 237 * Read `count' 1, 2, 4, or 8 byte quantities from bus space 238 * described by tag/handle and starting at `offset' and copy into 239 * buffer provided. 240 */ 241 242 #define bus_space_read_region_1(t, h, o, a, c) do { \ 243 (void) t; \ 244 __asm __volatile (" \ 245 movl %0,a0 ; \ 246 movl %1,a1 ; \ 247 movl %2,d0 ; \ 248 1: movb a0@+,a1@+ ; \ 249 subql #1,d0 ; \ 250 jne 1b" : \ 251 : \ 252 "r" ((h) + (o)), "g" (a), "g" ((size_t)(c)) : \ 253 "a0","a1","d0"); \ 254 } while (0) 255 256 #define bus_space_read_region_2(t, h, o, a, c) do { \ 257 (void) t; \ 258 __asm __volatile (" \ 259 movl %0,a0 ; \ 260 movl %1,a1 ; \ 261 movl %2,d0 ; \ 262 1: movw a0@+,a1@+ ; \ 263 subql #1,d0 ; \ 264 jne 1b" : \ 265 : \ 266 "r" ((h) + (o)), "g" (a), "g" ((size_t)(c)) : \ 267 "a0","a1","d0"); \ 268 } while (0) 269 270 #define bus_space_read_region_4(t, h, o, a, c) do { \ 271 (void) t; \ 272 __asm __volatile (" \ 273 movl %0,a0 ; \ 274 movl %1,a1 ; \ 275 movl %2,d0 ; \ 276 1: movl a0@+,a1@+ ; \ 277 subql #1,d0 ; \ 278 jne 1b" : \ 279 : \ 280 "r" ((h) + (o)), "g" (a), "g" ((size_t)(c)) : \ 281 "a0","a1","d0"); \ 282 } while (0) 283 284 #if 0 /* Cause a link error for bus_space_read_region_8 */ 285 #define bus_space_read_region_8 !!! bus_space_read_region_8 unimplemented !!! 286 #endif 287 288 /* 289 * void bus_space_write_N __P((bus_space_tag_t tag, 290 * bus_space_handle_t bsh, bus_size_t offset, 291 * u_intN_t value)); 292 * 293 * Write the 1, 2, 4, or 8 byte value `value' to bus space 294 * described by tag/handle/offset. 295 */ 296 297 #define bus_space_write_1(t, h, o, v) \ 298 ((void) t, ((void)(*(volatile u_int8_t *)((h) + (o)) = (v)))) 299 300 #define bus_space_write_2(t, h, o, v) \ 301 ((void) t, ((void)(*(volatile u_int16_t *)((h) + (o)) = (v)))) 302 303 #define bus_space_write_4(t, h, o, v) \ 304 ((void) t, ((void)(*(volatile u_int32_t *)((h) + (o)) = (v)))) 305 306 #if 0 /* Cause a link error for bus_space_write_8 */ 307 #define bus_space_write_8 !!! bus_space_write_8 not implemented !!! 308 #endif 309 310 /* 311 * void bus_space_write_multi_N __P((bus_space_tag_t tag, 312 * bus_space_handle_t bsh, bus_size_t offset, 313 * const u_intN_t *addr, size_t count)); 314 * 315 * Write `count' 1, 2, 4, or 8 byte quantities from the buffer 316 * provided to bus space described by tag/handle/offset. 317 */ 318 319 #define bus_space_write_multi_1(t, h, o, a, c) do { \ 320 (void) t; \ 321 __asm __volatile (" \ 322 movl %0,a0 ; \ 323 movl %1,a1 ; \ 324 movl %2,d0 ; \ 325 1: movb a1@+,a0@ ; \ 326 subql #1,d0 ; \ 327 jne 1b" : \ 328 : \ 329 "r" ((h) + (o)), "g" (a), "g" ((size_t)(c)) : \ 330 "a0","a1","d0"); \ 331 } while (0) 332 333 #define bus_space_write_multi_2(t, h, o, a, c) do { \ 334 (void) t; \ 335 __asm __volatile (" \ 336 movl %0,a0 ; \ 337 movl %1,a1 ; \ 338 movl %2,d0 ; \ 339 1: movw a1@+,a0@ ; \ 340 subql #1,d0 ; \ 341 jne 1b" : \ 342 : \ 343 "r" ((h) + (o)), "g" (a), "g" ((size_t)(c)) : \ 344 "a0","a1","d0"); \ 345 } while (0) 346 347 #define bus_space_write_multi_4(t, h, o, a, c) do { \ 348 (void) t; \ 349 __asm __volatile (" \ 350 movl %0,a0 ; \ 351 movl %1,a1 ; \ 352 movl %2,d0 ; \ 353 1: movl a1@+,a0@ ; \ 354 subql #1,d0 ; \ 355 jne 1b" : \ 356 : \ 357 "r" ((h) + (o)), "g" (a), "g" ((size_t)(c)) : \ 358 "a0","a1","d0"); \ 359 } while (0) 360 361 #if 0 /* Cause a link error for bus_space_write_8 */ 362 #define bus_space_write_multi_8(t, h, o, a, c) \ 363 !!! bus_space_write_multi_8 unimplimented !!! 364 #endif 365 366 /* 367 * void bus_space_write_region_N __P((bus_space_tag_t tag, 368 * bus_space_handle_t bsh, bus_size_t offset, 369 * const u_intN_t *addr, size_t count)); 370 * 371 * Write `count' 1, 2, 4, or 8 byte quantities from the buffer provided 372 * to bus space described by tag/handle starting at `offset'. 373 */ 374 375 #define bus_space_write_region_1(t, h, o, a, c) do { \ 376 (void) t; \ 377 __asm __volatile (" \ 378 movl %0,a0 ; \ 379 movl %1,a1 ; \ 380 movl %2,d0 ; \ 381 1: movb a1@+,a0@+ ; \ 382 subql #1,d0 ; \ 383 jne 1b" : \ 384 : \ 385 "r" ((h) + (o)), "g" (a), "g" ((size_t)(c)) : \ 386 "a0","a1","d0"); \ 387 } while (0) 388 389 #define bus_space_write_region_2(t, h, o, a, c) do { \ 390 (void) t; \ 391 __asm __volatile (" \ 392 movl %0,a0 ; \ 393 movl %1,a1 ; \ 394 movl %2,d0 ; \ 395 1: movw a1@+,a0@+ ; \ 396 subql #1,d0 ; \ 397 jne 1b" : \ 398 : \ 399 "r" ((h) + (o)), "g" (a), "g" ((size_t)(c)) : \ 400 "a0","a1","d0"); \ 401 } while (0) 402 403 #define bus_space_write_region_4(t, h, o, a, c) do { \ 404 (void) t; \ 405 __asm __volatile (" \ 406 movl %0,a0 ; \ 407 movl %1,a1 ; \ 408 movl %2,d0 ; \ 409 1: movl a1@+,a0@+ ; \ 410 subql #1,d0 ; \ 411 jne 1b" : \ 412 : \ 413 "r" ((h) + (o)), "g" (a), "g" ((size_t)(c)) : \ 414 "a0","a1","d0"); \ 415 } while (0) 416 417 #if 0 /* Cause a link error for bus_space_write_region_8 */ 418 #define bus_space_write_region_8 \ 419 !!! bus_space_write_region_8 unimplemented !!! 420 #endif 421 422 /* 423 * void bus_space_set_multi_N __P((bus_space_tag_t tag, 424 * bus_space_handle_t bsh, bus_size_t offset, u_intN_t val, 425 * size_t count)); 426 * 427 * Write the 1, 2, 4, or 8 byte value `val' to bus space described 428 * by tag/handle/offset `count' times. 429 */ 430 431 #define bus_space_set_multi_1(t, h, o, val, c) do { \ 432 (void) t; \ 433 __asm __volatile (" \ 434 movl %0,a0 ; \ 435 movl %1,d1 ; \ 436 movl %2,d0 ; \ 437 1: movb d1,a0@ ; \ 438 subql #1,d0 ; \ 439 jne 1b" : \ 440 : \ 441 "r" ((h)+(o)), "g" ((u_long)val), \ 442 "g" ((size_t)(c)) : \ 443 "a0","d0","d1"); \ 444 } while (0) 445 446 #define bus_space_set_multi_2(t, h, o, val, c) do { \ 447 (void) t; \ 448 __asm __volatile (" \ 449 movl %0,a0 ; \ 450 movl %1,d1 ; \ 451 movl %2,d0 ; \ 452 1: movw d1,a0@ ; \ 453 subql #1,d0 ; \ 454 jne 1b" : \ 455 : \ 456 "r" ((h)+(o)), "g" ((u_long)val), \ 457 "g" ((size_t)(c)) : \ 458 "a0","d0","d1"); \ 459 } while (0) 460 461 #define bus_space_set_multi_4(t, h, o, val, c) do { \ 462 (void) t; \ 463 __asm __volatile (" \ 464 movl %0,a0 ; \ 465 movl %1,d1 ; \ 466 movl %2,d0 ; \ 467 1: movl d1,a0@ ; \ 468 subql #1,d0 ; \ 469 jne 1b" : \ 470 : \ 471 "r" ((h)+(o)), "g" ((u_long)val), \ 472 "g" ((size_t)(c)) : \ 473 "a0","d0","d1"); \ 474 } while (0) 475 476 #if 0 /* Cause a link error for bus_space_set_multi_8 */ 477 #define bus_space_set_multi_8 \ 478 !!! bus_space_set_multi_8 unimplemented !!! 479 #endif 480 481 /* 482 * void bus_space_set_region_N __P((bus_space_tag_t tag, 483 * bus_space_handle_t bsh, bus_size_t offset, u_intN_t val, 484 * size_t count)); 485 * 486 * Write `count' 1, 2, 4, or 8 byte value `val' to bus space described 487 * by tag/handle starting at `offset'. 488 */ 489 490 #define bus_space_set_region_1(t, h, o, val, c) do { \ 491 (void) t; \ 492 __asm __volatile (" \ 493 movl %0,a0 ; \ 494 movl %1,d1 ; \ 495 movl %2,d0 ; \ 496 1: movb d1,a0@+ ; \ 497 subql #1,d0 ; \ 498 jne 1b" : \ 499 : \ 500 "r" ((h)+(o)), "g" ((u_long)val), \ 501 "g" ((size_t)(c)) : \ 502 "a0","d0","d1"); \ 503 } while (0) 504 505 #define bus_space_set_region_2(t, h, o, val, c) do { \ 506 (void) t; \ 507 __asm __volatile (" \ 508 movl %0,a0 ; \ 509 movl %1,d1 ; \ 510 movl %2,d0 ; \ 511 1: movw d1,a0@+ ; \ 512 subql #1,d0 ; \ 513 jne 1b" : \ 514 : \ 515 "r" ((h)+(o)), "g" ((u_long)val), \ 516 "g" ((size_t)(c)) : \ 517 "a0","d0","d1"); \ 518 } while (0) 519 520 #define bus_space_set_region_4(t, h, o, val, c) do { \ 521 (void) t; \ 522 __asm __volatile (" \ 523 movl %0,a0 ; \ 524 movl %1,d1 ; \ 525 movl %2,d0 ; \ 526 1: movl d1,a0@+ ; \ 527 subql #1,d0 ; \ 528 jne 1b" : \ 529 : \ 530 "r" ((h)+(o)), "g" ((u_long)val), \ 531 "g" ((size_t)(c)) : \ 532 "a0","d0","d1"); \ 533 } while (0) 534 535 #if 0 /* Cause a link error for bus_space_set_region_8 */ 536 #define bus_space_set_region_8 \ 537 !!! bus_space_set_region_8 unimplemented !!! 538 #endif 539 540 /* 541 * void bus_space_copy_N __P((bus_space_tag_t tag, 542 * bus_space_handle_t bsh1, bus_size_t off1, 543 * bus_space_handle_t bsh2, bus_size_t off2, 544 * size_t count)); 545 * 546 * Copy `count' 1, 2, 4, or 8 byte values from bus space starting 547 * at tag/bsh1/off1 to bus space starting at tag/bsh2/off2. 548 */ 549 550 #define __MAC68K_copy_region_N(BYTES) \ 551 static __inline void __CONCAT(bus_space_copy_region_,BYTES) \ 552 __P((bus_space_tag_t, \ 553 bus_space_handle_t bsh1, bus_size_t off1, \ 554 bus_space_handle_t bsh2, bus_size_t off2, \ 555 bus_size_t count)); \ 556 \ 557 static __inline void \ 558 __CONCAT(bus_space_copy_region_,BYTES)(t, h1, o1, h2, o2, c) \ 559 bus_space_tag_t t; \ 560 bus_space_handle_t h1, h2; \ 561 bus_size_t o1, o2, c; \ 562 { \ 563 bus_size_t o; \ 564 \ 565 if ((h1 + o1) >= (h2 + o2)) { \ 566 /* src after dest: copy forward */ \ 567 for (o = 0; c != 0; c--, o += BYTES) \ 568 __CONCAT(bus_space_write_,BYTES)(t, h2, o2 + o, \ 569 __CONCAT(bus_space_read_,BYTES)(t, h1, o1 + o)); \ 570 } else { \ 571 /* dest after src: copy backwards */ \ 572 for (o = (c - 1) * BYTES; c != 0; c--, o -= BYTES) \ 573 __CONCAT(bus_space_write_,BYTES)(t, h2, o2 + o, \ 574 __CONCAT(bus_space_read_,BYTES)(t, h1, o1 + o)); \ 575 } \ 576 } 577 __MAC68K_copy_region_N(1) 578 __MAC68K_copy_region_N(2) 579 __MAC68K_copy_region_N(4) 580 #if 0 /* Cause a link error for bus_space_copy_8 */ 581 #define bus_space_copy_8 \ 582 !!! bus_space_copy_8 unimplemented !!! 583 #endif 584 585 #undef __MAC68K_copy_region_N 586 587 /* 588 * Bus read/write barrier methods. 589 * 590 * void bus_space_barrier __P((bus_space_tag_t tag, 591 * bus_space_handle_t bsh, bus_size_t offset, 592 * bus_size_t len, int flags)); 593 * 594 * Note: the 680x0 does not currently require barriers, but we must 595 * provide the flags to MI code. 596 */ 597 #define bus_space_barrier(t, h, o, l, f) \ 598 ((void)((void)(t), (void)(h), (void)(o), (void)(l), (void)(f))) 599 #define BUS_SPACE_BARRIER_READ 0x01 /* force read barrier */ 600 #define BUS_SPACE_BARRIER_WRITE 0x02 /* force write barrier */ 601 602 #define BUS_SPACE_ALIGNED_POINTER(p, t) ALIGNED_POINTER(p, t) 603 604 #endif /* _MAC68K_BUS_H_ */ 605