1 /* $NetBSD: zs.c,v 1.55 2007/12/03 15:33:52 ad Exp $ */ 2 3 /* 4 * Copyright (c) 1996-1998 Bill Studenmund 5 * Copyright (c) 1995 Gordon W. Ross 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. The name of the author may not be used to endorse or promote products 17 * derived from this software without specific prior written permission. 18 * 4. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by Gordon Ross 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 23 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 24 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 25 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 26 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 27 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 31 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 /* 35 * Zilog Z8530 Dual UART driver (machine-dependent part) 36 * 37 * Runs two serial lines per chip using slave drivers. 38 * Plain tty/async lines use the zs_async slave. 39 * Sun keyboard/mouse uses the zs_kbd/zs_ms slaves. 40 * Other ports use their own mice & keyboard slaves. 41 * 42 * Credits & history: 43 * 44 * With NetBSD 1.1, port-mac68k started using a port of the port-sparc 45 * (port-sun3?) zs.c driver (which was in turn based on code in the 46 * Berkeley 4.4 Lite release). Bill Studenmund did the port, with 47 * help from Allen Briggs and Gordon Ross <gwr@NetBSD.org>. Noud de 48 * Brouwer field-tested the driver at a local ISP. 49 * 50 * Bill Studenmund and Gordon Ross then ported the machine-independent 51 * z8530 driver to work with port-mac68k. NetBSD 1.2 contained an 52 * intermediate version (mac68k using a local, patched version of 53 * the m.i. drivers), with NetBSD 1.3 containing a full version. 54 */ 55 56 #include <sys/cdefs.h> 57 __KERNEL_RCSID(0, "$NetBSD: zs.c,v 1.55 2007/12/03 15:33:52 ad Exp $"); 58 59 #include "opt_ddb.h" 60 #include "opt_mac68k.h" 61 62 #include <sys/param.h> 63 #include <sys/systm.h> 64 #include <sys/proc.h> 65 #include <sys/device.h> 66 #include <sys/conf.h> 67 #include <sys/file.h> 68 #include <sys/ioctl.h> 69 #include <sys/tty.h> 70 #include <sys/time.h> 71 #include <sys/kernel.h> 72 #include <sys/syslog.h> 73 #include <sys/cpu.h> 74 #include <sys/intr.h> 75 76 #include <machine/autoconf.h> 77 #include <machine/psc.h> 78 #include <machine/viareg.h> 79 80 #include <dev/cons.h> 81 #include <dev/ic/z8530reg.h> 82 #include <machine/z8530var.h> 83 #include <mac68k/dev/zs_cons.h> 84 85 /* Are these in a header file anywhere? */ 86 /* Booter flags interface */ 87 #define ZSMAC_RAW 0x01 88 #define ZSMAC_LOCALTALK 0x02 89 90 #define PCLK (9600 * 384) 91 92 /* 93 * Some warts needed by z8530tty.c - 94 */ 95 int zs_def_cflag = (CREAD | CS8 | HUPCL); 96 97 /* 98 * abort detection on console will now timeout after iterating on a loop 99 * the following # of times. Cheep hack. Also, abort detection is turned 100 * off after a timeout (i.e. maybe there's not a terminal hooked up). 101 */ 102 #define ZSABORT_DELAY 3000000 103 104 /* 105 * Define interrupt levels. 106 */ 107 #define ZSHARD_PRI 4 /* Wired on the CPU board... */ 108 /* 109 * Serial port cards with zs chips on them are actually at the 110 * NuBus interrupt level, which is lower than 4. But blocking 111 * level 4 interrupts will block those interrupts too, so level 112 * 4 is fine. 113 */ 114 115 /* The layout of this is hardware-dependent (padding, order). */ 116 struct zschan { 117 volatile u_char zc_csr; /* ctrl,status, and indirect access */ 118 u_char zc_xxx0; 119 u_char zc_xxx1; /* part of the other channel lives here! */ 120 u_char zc_xxx2; /* Yea Apple! */ 121 volatile u_char zc_data; /* data */ 122 u_char zc_xxx3; 123 u_char zc_xxx4; 124 u_char zc_xxx5; 125 }; 126 127 /* Flags from cninit() */ 128 static int zs_hwflags[2]; 129 /* Default speed for each channel */ 130 static int zs_defspeed[2] = { 131 9600, /* tty00 */ 132 9600, /* tty01 */ 133 }; 134 /* console stuff */ 135 void *zs_conschan; 136 int zs_consunit; 137 #ifdef ZS_CONSOLE_ABORT 138 int zs_cons_canabort = 1; 139 #else 140 int zs_cons_canabort = 0; 141 #endif /* ZS_CONSOLE_ABORT*/ 142 /* device to which the console is attached--if serial. */ 143 dev_t mac68k_zsdev; 144 /* Mac stuff */ 145 extern volatile unsigned char *sccA; 146 147 int zs_cn_check_speed(int); 148 149 /* 150 * Even though zsparam will set up the clock multiples, etc., we 151 * still set them here as: 1) mice & keyboards don't use zsparam, 152 * and 2) the console stuff uses these defaults before device 153 * attach. 154 */ 155 156 static u_char zs_init_reg[16] = { 157 0, /* 0: CMD (reset, etc.) */ 158 0, /* 1: No interrupts yet. */ 159 0x18 + ZSHARD_PRI, /* IVECT */ 160 ZSWR3_RX_8 | ZSWR3_RX_ENABLE, 161 ZSWR4_CLK_X16 | ZSWR4_ONESB | ZSWR4_EVENP, 162 ZSWR5_TX_8 | ZSWR5_TX_ENABLE, 163 0, /* 6: TXSYNC/SYNCLO */ 164 0, /* 7: RXSYNC/SYNCHI */ 165 0, /* 8: alias for data port */ 166 ZSWR9_MASTER_IE, 167 0, /*10: Misc. TX/RX control bits */ 168 ZSWR11_TXCLK_BAUD | ZSWR11_RXCLK_BAUD, 169 ((PCLK/32)/9600)-2, /*12: BAUDLO (default=9600) */ 170 0, /*13: BAUDHI (default=9600) */ 171 ZSWR14_BAUD_ENA, 172 ZSWR15_BREAK_IE, 173 }; 174 175 struct zschan * 176 zs_get_chan_addr(int channel) 177 { 178 char *addr; 179 struct zschan *zc; 180 181 addr = (char *)__UNVOLATILE(sccA); 182 if (channel == 0) { 183 zc = (struct zschan *)(addr + 2); 184 /* handle the fact the ports are intertwined. */ 185 } else { 186 zc = (struct zschan *)(addr); 187 } 188 return (zc); 189 } 190 191 192 /* Find PROM mappings (for console support). */ 193 int zsinited = 0; /* 0 = not, 1 = inited, not attached, 2= attached */ 194 195 void 196 zs_init() 197 { 198 zsinited = 1; 199 if (zs_conschan != 0){ /* we might have moved io under the console */ 200 zs_conschan = zs_get_chan_addr(zs_consunit); 201 /* so recalc the console port */ 202 } 203 } 204 205 206 /**************************************************************** 207 * Autoconfig 208 ****************************************************************/ 209 210 /* Definition of the driver for autoconfig. */ 211 static int zsc_match(struct device *, struct cfdata *, void *); 212 static void zsc_attach(struct device *, struct device *, void *); 213 static int zsc_print(void *, const char *); 214 215 CFATTACH_DECL(zsc, sizeof(struct zsc_softc), 216 zsc_match, zsc_attach, NULL, NULL); 217 218 extern struct cfdriver zsc_cd; 219 220 int zshard(void *); 221 222 /* 223 * Is the zs chip present? 224 */ 225 static int 226 zsc_match(struct device *parent, struct cfdata *cf, void *aux) 227 { 228 if (zsinited == 2) 229 return 0; 230 231 return 1; 232 } 233 234 /* 235 * Attach a found zs. 236 * 237 * Match slave number to zs unit number, so that misconfiguration will 238 * not set up the keyboard as ttya, etc. 239 */ 240 static void 241 zsc_attach(struct device *parent, struct device *self, void *aux) 242 { 243 struct zsc_softc *zsc = (void *) self; 244 struct zsc_attach_args zsc_args; 245 volatile struct zschan *zc; 246 struct xzs_chanstate *xcs; 247 struct zs_chanstate *cs; 248 int s, chip, theflags, channel; 249 250 if (!zsinited) 251 zs_init(); 252 zsinited = 2; 253 254 chip = 0; /* We'll deal with chip types post 1.2 */ 255 printf(" chip type %d \n",chip); 256 257 /* 258 * Initialize software state for each channel. 259 */ 260 for (channel = 0; channel < 2; channel++) { 261 zsc_args.channel = channel; 262 zsc_args.hwflags = zs_hwflags[channel]; 263 xcs = &zsc->xzsc_xcs_store[channel]; 264 cs = &xcs->xzs_cs; 265 zsc->zsc_cs[channel] = cs; 266 267 zs_lock_init(cs); 268 cs->cs_channel = channel; 269 cs->cs_private = NULL; 270 cs->cs_ops = &zsops_null; 271 272 zc = zs_get_chan_addr(channel); 273 cs->cs_reg_csr = &zc->zc_csr; 274 cs->cs_reg_data = &zc->zc_data; 275 276 memcpy(cs->cs_creg, zs_init_reg, 16); 277 memcpy(cs->cs_preg, zs_init_reg, 16); 278 279 /* Current BAUD rate generator clock. */ 280 cs->cs_brg_clk = PCLK / 16; /* RTxC is 230400*16, so use 230400 */ 281 cs->cs_defspeed = zs_defspeed[channel]; 282 cs->cs_defcflag = zs_def_cflag; 283 284 /* Make these correspond to cs_defcflag (-crtscts) */ 285 cs->cs_rr0_dcd = ZSRR0_DCD; 286 cs->cs_rr0_cts = 0; 287 cs->cs_wr5_dtr = ZSWR5_DTR; 288 cs->cs_wr5_rts = 0; 289 290 #ifdef __notyet__ 291 cs->cs_slave_type = ZS_SLAVE_NONE; 292 #endif 293 294 /* Define BAUD rate stuff. */ 295 xcs->cs_clocks[0].clk = PCLK; 296 xcs->cs_clocks[0].flags = ZSC_RTXBRG | ZSC_RTXDIV; 297 xcs->cs_clocks[1].flags = 298 ZSC_RTXBRG | ZSC_RTXDIV | ZSC_VARIABLE | ZSC_EXTERN; 299 xcs->cs_clocks[2].flags = ZSC_TRXDIV | ZSC_VARIABLE; 300 xcs->cs_clock_count = 3; 301 if (channel == 0) { 302 theflags = mac68k_machine.modem_flags; 303 xcs->cs_clocks[1].clk = mac68k_machine.modem_dcd_clk; 304 xcs->cs_clocks[2].clk = mac68k_machine.modem_cts_clk; 305 } else { 306 theflags = mac68k_machine.print_flags; 307 xcs->cs_clocks[1].flags = ZSC_VARIABLE; 308 /* 309 * Yes, we aren't defining ANY clock source enables for the 310 * printer's DCD clock in. The hardware won't let us 311 * use it. But a clock will freak out the chip, so we 312 * let you set it, telling us to bar interrupts on the line. 313 */ 314 xcs->cs_clocks[1].clk = mac68k_machine.print_dcd_clk; 315 xcs->cs_clocks[2].clk = mac68k_machine.print_cts_clk; 316 } 317 if (xcs->cs_clocks[1].clk) 318 zsc_args.hwflags |= ZS_HWFLAG_NO_DCD; 319 if (xcs->cs_clocks[2].clk) 320 zsc_args.hwflags |= ZS_HWFLAG_NO_CTS; 321 322 printf("zsc%d channel %d: d_speed %6d DCD clk %ld CTS clk %ld", 323 device_unit(self), channel, cs->cs_defspeed, 324 xcs->cs_clocks[1].clk, xcs->cs_clocks[2].clk); 325 326 /* Set defaults in our "extended" chanstate. */ 327 xcs->cs_csource = 0; 328 xcs->cs_psource = 0; 329 xcs->cs_cclk_flag = 0; /* Nothing fancy by default */ 330 xcs->cs_pclk_flag = 0; 331 332 if (theflags & ZSMAC_RAW) { 333 zsc_args.hwflags |= ZS_HWFLAG_RAW; 334 printf(" (raw defaults)"); 335 } 336 337 /* 338 * XXX - This might be better done with a "stub" driver 339 * (to replace zstty) that ignores LocalTalk for now. 340 */ 341 if (theflags & ZSMAC_LOCALTALK) { 342 printf(" shielding from LocalTalk"); 343 cs->cs_defspeed = 1; 344 cs->cs_creg[ZSRR_BAUDLO] = cs->cs_preg[ZSRR_BAUDLO] = 0xff; 345 cs->cs_creg[ZSRR_BAUDHI] = cs->cs_preg[ZSRR_BAUDHI] = 0xff; 346 zs_write_reg(cs, ZSRR_BAUDLO, 0xff); 347 zs_write_reg(cs, ZSRR_BAUDHI, 0xff); 348 /* 349 * If we might have LocalTalk, then make sure we have the 350 * Baud rate low-enough to not do any damage. 351 */ 352 } 353 354 /* 355 * We used to disable chip interrupts here, but we now 356 * do that in zscnprobe, just in case MacOS left the chip on. 357 */ 358 359 xcs->cs_chip = chip; 360 361 /* Stash away a copy of the final H/W flags. */ 362 xcs->cs_hwflags = zsc_args.hwflags; 363 364 printf("\n"); 365 366 /* 367 * Look for a child driver for this channel. 368 * The child attach will setup the hardware. 369 */ 370 if (!config_found(self, (void *)&zsc_args, zsc_print)) { 371 /* No sub-driver. Just reset it. */ 372 u_char reset = (channel == 0) ? 373 ZSWR9_A_RESET : ZSWR9_B_RESET; 374 s = splzs(); 375 zs_write_reg(cs, 9, reset); 376 splx(s); 377 } 378 } 379 380 if (current_mac_model->class == MACH_CLASSAV) { 381 add_psc_lev4_intr(PSCINTR_SCCA, zshard, zsc); 382 add_psc_lev4_intr(PSCINTR_SCCB, zshard, zsc); 383 } else { 384 intr_establish(zshard, zsc, ZSHARD_PRI); 385 } 386 zsc->zsc_softintr_cookie = softint_establish(SOFTINT_SERIAL, 387 (void (*)(void *))zsc_intr_soft, zsc); 388 389 /* Now safe to enable interrupts. */ 390 391 /* 392 * Set the master interrupt enable and interrupt vector. 393 * (common to both channels, do it on A) 394 */ 395 cs = zsc->zsc_cs[0]; 396 s = splzs(); 397 /* interrupt vector */ 398 zs_write_reg(cs, 2, zs_init_reg[2]); 399 /* master interrupt control (enable) */ 400 zs_write_reg(cs, 9, zs_init_reg[9]); 401 splx(s); 402 } 403 404 static int 405 zsc_print(void *aux, const char *name) 406 { 407 struct zsc_attach_args *args = aux; 408 409 if (name != NULL) 410 aprint_normal("%s: ", name); 411 412 if (args->channel != -1) 413 aprint_normal(" channel %d", args->channel); 414 415 return UNCONF; 416 } 417 418 int 419 zsmdioctl(struct zs_chanstate *cs, u_long cmd, void *data) 420 { 421 switch (cmd) { 422 default: 423 return (EPASSTHROUGH); 424 } 425 return (0); 426 } 427 428 void 429 zsmd_setclock(struct zs_chanstate *cs) 430 { 431 struct xzs_chanstate *xcs = (void *)cs; 432 433 if (cs->cs_channel != 0) 434 return; 435 436 /* 437 * If the new clock has the external bit set, then select the 438 * external source. 439 */ 440 via_set_modem((xcs->cs_pclk_flag & ZSC_EXTERN) ? 1 : 0); 441 } 442 443 /* 444 * Do the minimum work to pull data off of the chip and queue it up 445 * for later processing. 446 */ 447 int 448 zshard(void *arg) 449 { 450 struct zsc_softc *zsc = (struct zsc_softc *)arg; 451 int rval; 452 453 if (zsc == NULL) 454 return 0; 455 456 rval = zsc_intr_hard(zsc); 457 if ((zsc->zsc_cs[0]->cs_softreq) || (zsc->zsc_cs[1]->cs_softreq)) { 458 softint_schedule(zsc->zsc_softintr_cookie); 459 } 460 return (rval); 461 } 462 463 #ifndef ZS_TOLERANCE 464 #define ZS_TOLERANCE 51 465 /* 5% in tenths of a %, plus 1 so that exactly 5% will be ok. */ 466 #endif 467 468 /* 469 * check out a rate for acceptability from the internal clock 470 * source. Used in console config to validate a requested 471 * default speed. Placed here so that all the speed checking code is 472 * in one place. 473 * 474 * != 0 means ok. 475 */ 476 int 477 zs_cn_check_speed(int bps) 478 { 479 int tc, rate; 480 481 tc = BPS_TO_TCONST(PCLK / 16, bps); 482 if (tc < 0) 483 return 0; 484 rate = TCONST_TO_BPS(PCLK / 16, tc); 485 if (ZS_TOLERANCE > abs(((rate - bps)*1000)/bps)) 486 return 1; 487 else 488 return 0; 489 } 490 491 /* 492 * Search through the signal sources in the channel, and 493 * pick the best one for the baud rate requested. Return 494 * a -1 if not achievable in tolerance. Otherwise return 0 495 * and fill in the values. 496 * 497 * This routine draws inspiration from the Atari port's zs.c 498 * driver in NetBSD 1.1 which did the same type of source switching. 499 * Tolerance code inspired by comspeed routine in isa/com.c. 500 * 501 * By Bill Studenmund, 1996-05-12 502 */ 503 int 504 zs_set_speed(struct zs_chanstate *cs, int bps) 505 { 506 struct xzs_chanstate *xcs = (void *) cs; 507 int i, tc, tc0 = 0, tc1, s, sf = 0; 508 int src, rate0, rate1, err, tol; 509 510 if (bps == 0) 511 return (0); 512 513 src = -1; /* no valid source yet */ 514 tol = ZS_TOLERANCE; 515 516 /* 517 * Step through all the sources and see which one matches 518 * the best. A source has to match BETTER than tol to be chosen. 519 * Thus if two sources give the same error, the first one will be 520 * chosen. Also, allow for the possability that one source might run 521 * both the BRG and the direct divider (i.e. RTxC). 522 */ 523 for (i=0; i < xcs->cs_clock_count; i++) { 524 if (xcs->cs_clocks[i].clk <= 0) 525 continue; /* skip non-existent or bad clocks */ 526 if (xcs->cs_clocks[i].flags & ZSC_BRG) { 527 /* check out BRG at /16 */ 528 tc1 = BPS_TO_TCONST(xcs->cs_clocks[i].clk >> 4, bps); 529 if (tc1 >= 0) { 530 rate1 = TCONST_TO_BPS(xcs->cs_clocks[i].clk >> 4, tc1); 531 err = abs(((rate1 - bps)*1000)/bps); 532 if (err < tol) { 533 tol = err; 534 src = i; 535 sf = xcs->cs_clocks[i].flags & ~ZSC_DIV; 536 tc0 = tc1; 537 rate0 = rate1; 538 } 539 } 540 } 541 if (xcs->cs_clocks[i].flags & ZSC_DIV) { 542 /* 543 * Check out either /1, /16, /32, or /64 544 * Note: for /1, you'd better be using a synchronized 545 * clock! 546 */ 547 int b0 = xcs->cs_clocks[i].clk, e0 = abs(b0-bps); 548 int b1 = b0 >> 4, e1 = abs(b1-bps); 549 int b2 = b1 >> 1, e2 = abs(b2-bps); 550 int b3 = b2 >> 1, e3 = abs(b3-bps); 551 552 if (e0 < e1 && e0 < e2 && e0 < e3) { 553 err = e0; 554 rate1 = b0; 555 tc1 = ZSWR4_CLK_X1; 556 } else if (e0 > e1 && e1 < e2 && e1 < e3) { 557 err = e1; 558 rate1 = b1; 559 tc1 = ZSWR4_CLK_X16; 560 } else if (e0 > e2 && e1 > e2 && e2 < e3) { 561 err = e2; 562 rate1 = b2; 563 tc1 = ZSWR4_CLK_X32; 564 } else { 565 err = e3; 566 rate1 = b3; 567 tc1 = ZSWR4_CLK_X64; 568 } 569 570 err = (err * 1000)/bps; 571 if (err < tol) { 572 tol = err; 573 src = i; 574 sf = xcs->cs_clocks[i].flags & ~ZSC_BRG; 575 tc0 = tc1; 576 rate0 = rate1; 577 } 578 } 579 } 580 #ifdef ZSMACDEBUG 581 zsprintf("Checking for rate %d. Found source #%d.\n",bps, src); 582 #endif 583 if (src == -1) 584 return (EINVAL); /* no can do */ 585 586 /* 587 * The M.I. layer likes to keep cs_brg_clk current, even though 588 * we are the only ones who should be touching the BRG's rate. 589 * 590 * Note: we are assuming that any ZSC_EXTERN signal source comes in 591 * on the RTxC pin. Correct for the mac68k obio zsc. 592 */ 593 if (sf & ZSC_EXTERN) 594 cs->cs_brg_clk = xcs->cs_clocks[i].clk >> 4; 595 else 596 cs->cs_brg_clk = PCLK / 16; 597 598 /* 599 * Now we have a source, so set it up. 600 */ 601 s = splzs(); 602 xcs->cs_psource = src; 603 xcs->cs_pclk_flag = sf; 604 bps = rate0; 605 if (sf & ZSC_BRG) { 606 cs->cs_preg[4] = ZSWR4_CLK_X16; 607 cs->cs_preg[11]= ZSWR11_RXCLK_BAUD | ZSWR11_TXCLK_BAUD; 608 if (sf & ZSC_PCLK) { 609 cs->cs_preg[14] = ZSWR14_BAUD_ENA | ZSWR14_BAUD_FROM_PCLK; 610 } else { 611 cs->cs_preg[14] = ZSWR14_BAUD_ENA; 612 } 613 tc = tc0; 614 } else { 615 cs->cs_preg[4] = tc0; 616 if (sf & ZSC_RTXDIV) { 617 cs->cs_preg[11] = ZSWR11_RXCLK_RTXC | ZSWR11_TXCLK_RTXC; 618 } else { 619 cs->cs_preg[11] = ZSWR11_RXCLK_TRXC | ZSWR11_TXCLK_TRXC; 620 } 621 cs->cs_preg[14]= 0; 622 tc = 0xffff; 623 } 624 /* Set the BAUD rate divisor. */ 625 cs->cs_preg[12] = tc; 626 cs->cs_preg[13] = tc >> 8; 627 splx(s); 628 629 #ifdef ZSMACDEBUG 630 zsprintf("Rate is %7d, tc is %7d, source no. %2d, flags %4x\n", \ 631 bps, tc, src, sf); 632 zsprintf("Registers are: 4 %x, 11 %x, 14 %x\n\n", 633 cs->cs_preg[4], cs->cs_preg[11], cs->cs_preg[14]); 634 #endif 635 636 cs->cs_preg[5] |= ZSWR5_RTS; /* Make sure the drivers are on! */ 637 638 /* Caller will stuff the pending registers. */ 639 return (0); 640 } 641 642 int 643 zs_set_modes(struct zs_chanstate *cs, int cflag) 644 { 645 struct xzs_chanstate *xcs = (void*)cs; 646 int s; 647 648 /* 649 * Make sure we don't enable hfc on a signal line we're ignoring. 650 * As we enable CTS interrupts only if we have CRTSCTS or CDTRCTS, 651 * this code also effectivly turns off ZSWR15_CTS_IE. 652 * 653 * Also, disable DCD interrupts if we've been told to ignore 654 * the DCD pin. Happens on mac68k because the input line for 655 * DCD can also be used as a clock input. (Just set CLOCAL.) 656 * 657 * If someone tries to turn an invalid flow mode on, Just Say No 658 * (Suggested by gwr) 659 */ 660 if ((cflag & CDTRCTS) && (cflag & (CRTSCTS | MDMBUF))) 661 return (EINVAL); 662 cs->cs_rr0_pps = 0; 663 if (xcs->cs_hwflags & ZS_HWFLAG_NO_DCD) { 664 if (cflag & MDMBUF) 665 return (EINVAL); 666 cflag |= CLOCAL; 667 } else { 668 /* 669 * cs->cs_rr0_pps indicates which bit MAY be used for pps. 670 * Enable only if nothing else will want the interrupt and 671 * it's ok to enable interrupts on this line. 672 */ 673 if ((cflag & (CLOCAL | MDMBUF)) == CLOCAL) 674 cs->cs_rr0_pps = ZSRR0_DCD; 675 } 676 if ((xcs->cs_hwflags & ZS_HWFLAG_NO_CTS) && (cflag & (CRTSCTS | CDTRCTS))) 677 return (EINVAL); 678 679 /* 680 * Output hardware flow control on the chip is horrendous: 681 * if carrier detect drops, the receiver is disabled, and if 682 * CTS drops, the transmitter is stoped IN MID CHARACTER! 683 * Therefore, NEVER set the HFC bit, and instead use the 684 * status interrupt to detect CTS changes. 685 */ 686 s = splzs(); 687 if ((cflag & (CLOCAL | MDMBUF)) != 0) 688 cs->cs_rr0_dcd = 0; 689 else 690 cs->cs_rr0_dcd = ZSRR0_DCD; 691 /* 692 * The mac hardware only has one output, DTR (HSKo in Mac 693 * parlance). In HFC mode, we use it for the functions 694 * typically served by RTS and DTR on other ports, so we 695 * have to fake the upper layer out some. 696 * 697 * CRTSCTS we use CTS as an input which tells us when to shut up. 698 * We make no effort to shut up the other side of the connection. 699 * DTR is used to hang up the modem. 700 * 701 * In CDTRCTS, we use CTS to tell us to stop, but we use DTR to 702 * shut up the other side. 703 */ 704 if ((cflag & CRTSCTS) != 0) { 705 cs->cs_wr5_dtr = ZSWR5_DTR; 706 cs->cs_wr5_rts = 0; 707 cs->cs_rr0_cts = ZSRR0_CTS; 708 } else if ((cflag & CDTRCTS) != 0) { 709 cs->cs_wr5_dtr = 0; 710 cs->cs_wr5_rts = ZSWR5_DTR; 711 cs->cs_rr0_cts = ZSRR0_CTS; 712 } else if ((cflag & MDMBUF) != 0) { 713 cs->cs_wr5_dtr = 0; 714 cs->cs_wr5_rts = ZSWR5_DTR; 715 cs->cs_rr0_cts = ZSRR0_DCD; 716 } else { 717 cs->cs_wr5_dtr = ZSWR5_DTR; 718 cs->cs_wr5_rts = 0; 719 cs->cs_rr0_cts = 0; 720 } 721 splx(s); 722 723 /* Caller will stuff the pending registers. */ 724 return (0); 725 } 726 727 728 /* 729 * Read or write the chip with suitable delays. 730 * MacII hardware has the delay built in. 731 * No need for extra delay. :-) However, some clock-chirped 732 * macs, or zsc's on serial add-on boards might need it. 733 */ 734 #define ZS_DELAY() 735 736 u_char 737 zs_read_reg(struct zs_chanstate *cs, u_char reg) 738 { 739 u_char val; 740 741 *cs->cs_reg_csr = reg; 742 ZS_DELAY(); 743 val = *cs->cs_reg_csr; 744 ZS_DELAY(); 745 return val; 746 } 747 748 void 749 zs_write_reg(struct zs_chanstate *cs, u_char reg, u_char val) 750 { 751 *cs->cs_reg_csr = reg; 752 ZS_DELAY(); 753 *cs->cs_reg_csr = val; 754 ZS_DELAY(); 755 } 756 757 u_char 758 zs_read_csr(struct zs_chanstate *cs) 759 { 760 u_char val; 761 762 val = *cs->cs_reg_csr; 763 ZS_DELAY(); 764 /* make up for the fact CTS is wired backwards */ 765 val ^= ZSRR0_CTS; 766 return val; 767 } 768 769 void 770 zs_write_csr(struct zs_chanstate *cs, u_char val) 771 { 772 /* Note, the csr does not write CTS... */ 773 *cs->cs_reg_csr = val; 774 ZS_DELAY(); 775 } 776 777 u_char 778 zs_read_data(struct zs_chanstate *cs) 779 { 780 u_char val; 781 782 val = *cs->cs_reg_data; 783 ZS_DELAY(); 784 return val; 785 } 786 787 void 788 zs_write_data(struct zs_chanstate *cs, u_char val) 789 { 790 *cs->cs_reg_data = val; 791 ZS_DELAY(); 792 } 793 794 /**************************************************************** 795 * Console support functions (mac68k specific!) 796 * Note: this code is allowed to know about the layout of 797 * the chip registers, and uses that to keep things simple. 798 * XXX - I think I like the mvme167 code better. -gwr 799 * XXX - Well :-P :-) -wrs 800 ****************************************************************/ 801 802 #define zscnpollc nullcnpollc 803 cons_decl(zs); 804 805 static void zscnsetup(void); 806 807 /* 808 * Console functions. 809 */ 810 811 /* 812 * This code modled after the zs_setparam routine in zskgdb 813 * It sets the console unit to a known state so we can output 814 * correctly. 815 */ 816 static void 817 zscnsetup(void) 818 { 819 struct xzs_chanstate xcs; 820 struct zs_chanstate *cs; 821 struct zschan *zc; 822 int tconst, s; 823 824 /* Setup temporary chanstate. */ 825 memset(&xcs, 0, sizeof(xcs)); 826 cs = &xcs.xzs_cs; 827 zc = zs_conschan; 828 cs->cs_reg_csr = &zc->zc_csr; 829 cs->cs_reg_data = &zc->zc_data; 830 cs->cs_channel = zs_consunit; 831 cs->cs_brg_clk = PCLK / 16; 832 833 memcpy(cs->cs_preg, zs_init_reg, 16); 834 cs->cs_preg[5] |= ZSWR5_DTR | ZSWR5_RTS; 835 cs->cs_preg[15] = ZSWR15_BREAK_IE; 836 tconst = BPS_TO_TCONST(cs->cs_brg_clk, zs_defspeed[zs_consunit]); 837 cs->cs_preg[12] = tconst; 838 cs->cs_preg[13] = tconst >> 8; 839 /* can't use zs_set_speed as we haven't set up the 840 * signal sources, and it's not worth it for now 841 */ 842 843 /* 844 * As zs_loadchannelregs doesn't touch reg 9 (interrupt control), 845 * we won't accidentally turn on interrupts below 846 */ 847 s = splhigh(); 848 zs_loadchannelregs(cs); 849 splx(s); 850 } 851 852 /* 853 * zscnprobe is the routine which gets called as the kernel is trying to 854 * figure out where the console should be. Each io driver which might 855 * be the console (as defined in mac68k/conf.c) gets probed. The probe 856 * fills in the consdev structure. Important parts are the device #, 857 * and the console priority. Values are CN_DEAD (don't touch me), 858 * CN_NORMAL (I'm here, but elsewhere might be better), CN_INTERNAL 859 * (the video, better than CN_NORMAL), and CN_REMOTE (pick me!) 860 * 861 * As the mac's a bit different, we do extra work here. We mainly check 862 * to see if we have serial echo going on. Also chould check for default 863 * speeds. 864 */ 865 void 866 zscnprobe(struct consdev * cp) 867 { 868 extern u_long IOBase; 869 int maj, unit, i; 870 extern const struct cdevsw zstty_cdevsw; 871 872 maj = cdevsw_lookup_major(&zstty_cdevsw); 873 if (maj != -1) { 874 cp->cn_pri = CN_NORMAL; /* Lower than CN_INTERNAL */ 875 if (mac68k_machine.serial_console != 0) { 876 cp->cn_pri = CN_REMOTE; /* Higher than CN_INTERNAL */ 877 mac68k_machine.serial_boot_echo =0; 878 } 879 880 unit = (mac68k_machine.serial_console == 1) ? 0 : 1; 881 zs_consunit = unit; 882 zs_conschan = (struct zschan *) -1; /* dummy flag for zs_init() */ 883 884 mac68k_zsdev = cp->cn_dev = makedev(maj, unit); 885 } 886 if (mac68k_machine.serial_boot_echo) { 887 /* 888 * at this point, we know that we don't have a serial 889 * console, but are doing echo 890 */ 891 zs_conschan = (struct zschan *) -1; /* dummy flag for zs_init() */ 892 zs_consunit = 1; 893 zs_hwflags[zs_consunit] = ZS_HWFLAG_CONSOLE; 894 } 895 896 if ((i = mac68k_machine.modem_d_speed) > 0) { 897 if (zs_cn_check_speed(i)) 898 zs_defspeed[0] = i; 899 } 900 if ((i = mac68k_machine.print_d_speed) > 0) { 901 if (zs_cn_check_speed(i)) 902 zs_defspeed[1] = i; 903 } 904 mac68k_set_io_offsets(IOBase); 905 zs_init(); 906 /* 907 * zsinit will set up the addresses of the scc. It will also, if 908 * zs_conschan != 0, calculate the new address of the conschan for 909 * unit zs_consunit. So if we are (or think we are) going to use the 910 * chip for console I/O, we just set up the internal addresses for it. 911 * 912 * Now turn off interrupts for the chip. Note: using sccA to get at 913 * the chip is the only vestage of the NetBSD 1.0 ser driver. :-) 914 */ 915 unit = sccA[2]; /* reset reg. access */ 916 unit = sccA[0]; 917 sccA[2] = 9; sccA[2] = 0; /* write 0 to reg. 9, clearing MIE */ 918 sccA[2] = ZSWR0_CLR_INTR; unit = sccA[2]; /* reset any pending ints. */ 919 sccA[0] = ZSWR0_CLR_INTR; unit = sccA[0]; 920 921 if (mac68k_machine.serial_boot_echo) 922 zscnsetup(); 923 return; 924 } 925 926 void 927 zscninit(struct consdev *cp) 928 { 929 930 zs_hwflags[zs_consunit] = ZS_HWFLAG_CONSOLE; 931 932 /* 933 * zsinit will set up the addresses of the scc. It will also, if 934 * zs_conschan != 0, calculate the new address of the conschan for 935 * unit zs_consunit. So zs_init implicitly sets zs_conschan to the right 936 * number. :-) 937 */ 938 zscnsetup(); 939 printf("\nNetBSD/mac68k console\n"); 940 } 941 942 943 /* 944 * Polled input char. 945 */ 946 int 947 zs_getc(void *arg) 948 { 949 volatile struct zschan *zc = arg; 950 int s, c, rr0; 951 952 s = splhigh(); 953 /* Wait for a character to arrive. */ 954 do { 955 rr0 = zc->zc_csr; 956 ZS_DELAY(); 957 } while ((rr0 & ZSRR0_RX_READY) == 0); 958 959 c = zc->zc_data; 960 ZS_DELAY(); 961 splx(s); 962 963 /* 964 * This is used by the kd driver to read scan codes, 965 * so don't translate '\r' ==> '\n' here... 966 */ 967 return (c); 968 } 969 970 /* 971 * Polled output char. 972 */ 973 void 974 zs_putc(void *arg, int c) 975 { 976 volatile struct zschan *zc = arg; 977 int s, rr0; 978 long wait = 0; 979 980 s = splhigh(); 981 /* Wait for transmitter to become ready. */ 982 do { 983 rr0 = zc->zc_csr; 984 ZS_DELAY(); 985 } while (((rr0 & ZSRR0_TX_READY) == 0) && (wait++ < 1000000)); 986 987 if ((rr0 & ZSRR0_TX_READY) != 0) { 988 zc->zc_data = c; 989 ZS_DELAY(); 990 } 991 splx(s); 992 } 993 994 995 /* 996 * Polled console input putchar. 997 */ 998 int 999 zscngetc(dev_t dev) 1000 { 1001 struct zschan *zc = zs_conschan; 1002 int c; 1003 1004 c = zs_getc(zc); 1005 return (c); 1006 } 1007 1008 /* 1009 * Polled console output putchar. 1010 */ 1011 void 1012 zscnputc(dev_t dev, int c) 1013 { 1014 struct zschan *zc = zs_conschan; 1015 1016 zs_putc(zc, c); 1017 } 1018 1019 1020 1021 /* 1022 * Handle user request to enter kernel debugger. 1023 */ 1024 void 1025 zs_abort(struct zs_chanstate *cs) 1026 { 1027 volatile struct zschan *zc = zs_conschan; 1028 int rr0; 1029 long wait = 0; 1030 1031 if (zs_cons_canabort == 0) 1032 return; 1033 1034 /* Wait for end of break to avoid PROM abort. */ 1035 do { 1036 rr0 = zc->zc_csr; 1037 ZS_DELAY(); 1038 } while ((rr0 & ZSRR0_BREAK) && (wait++ < ZSABORT_DELAY)); 1039 1040 if (wait > ZSABORT_DELAY) { 1041 zs_cons_canabort = 0; 1042 /* If we time out, turn off the abort ability! */ 1043 } 1044 1045 #ifdef DDB 1046 Debugger(); 1047 #endif 1048 } 1049