xref: /netbsd-src/sys/arch/mac68k/dev/zs.c (revision 404fbe5fb94ca1e054339640cabb2801ce52dd30)
1 /*	$NetBSD: zs.c,v 1.56 2008/03/29 19:15:34 tsutsui Exp $	*/
2 
3 /*
4  * Copyright (c) 1996-1998 Bill Studenmund
5  * Copyright (c) 1995 Gordon W. Ross
6  * All rights reserved.
7  *
8  * Redistribution and use in source and binary forms, with or without
9  * modification, are permitted provided that the following conditions
10  * are met:
11  * 1. Redistributions of source code must retain the above copyright
12  *    notice, this list of conditions and the following disclaimer.
13  * 2. Redistributions in binary form must reproduce the above copyright
14  *    notice, this list of conditions and the following disclaimer in the
15  *    documentation and/or other materials provided with the distribution.
16  * 3. The name of the author may not be used to endorse or promote products
17  *    derived from this software without specific prior written permission.
18  * 4. All advertising materials mentioning features or use of this software
19  *    must display the following acknowledgement:
20  *      This product includes software developed by Gordon Ross
21  *
22  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
23  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
24  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
25  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
26  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
27  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
31  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32  */
33 
34 /*
35  * Zilog Z8530 Dual UART driver (machine-dependent part)
36  *
37  * Runs two serial lines per chip using slave drivers.
38  * Plain tty/async lines use the zs_async slave.
39  * Sun keyboard/mouse uses the zs_kbd/zs_ms slaves.
40  * Other ports use their own mice & keyboard slaves.
41  *
42  * Credits & history:
43  *
44  * With NetBSD 1.1, port-mac68k started using a port of the port-sparc
45  * (port-sun3?) zs.c driver (which was in turn based on code in the
46  * Berkeley 4.4 Lite release). Bill Studenmund did the port, with
47  * help from Allen Briggs and Gordon Ross <gwr@NetBSD.org>. Noud de
48  * Brouwer field-tested the driver at a local ISP.
49  *
50  * Bill Studenmund and Gordon Ross then ported the machine-independent
51  * z8530 driver to work with port-mac68k. NetBSD 1.2 contained an
52  * intermediate version (mac68k using a local, patched version of
53  * the m.i. drivers), with NetBSD 1.3 containing a full version.
54  */
55 
56 #include <sys/cdefs.h>
57 __KERNEL_RCSID(0, "$NetBSD: zs.c,v 1.56 2008/03/29 19:15:34 tsutsui Exp $");
58 
59 #include "opt_ddb.h"
60 #include "opt_mac68k.h"
61 
62 #include <sys/param.h>
63 #include <sys/systm.h>
64 #include <sys/proc.h>
65 #include <sys/device.h>
66 #include <sys/conf.h>
67 #include <sys/file.h>
68 #include <sys/ioctl.h>
69 #include <sys/tty.h>
70 #include <sys/time.h>
71 #include <sys/kernel.h>
72 #include <sys/syslog.h>
73 #include <sys/cpu.h>
74 #include <sys/intr.h>
75 
76 #include <machine/autoconf.h>
77 #include <machine/psc.h>
78 #include <machine/viareg.h>
79 
80 #include <dev/cons.h>
81 #include <dev/ic/z8530reg.h>
82 #include <machine/z8530var.h>
83 #include <mac68k/dev/zs_cons.h>
84 
85 /* Are these in a header file anywhere? */
86 /* Booter flags interface */
87 #define ZSMAC_RAW	0x01
88 #define ZSMAC_LOCALTALK	0x02
89 
90 #define	PCLK	(9600 * 384)
91 
92 /*
93  * Some warts needed by z8530tty.c -
94  */
95 int zs_def_cflag = (CREAD | CS8 | HUPCL);
96 
97 /*
98  * abort detection on console will now timeout after iterating on a loop
99  * the following # of times. Cheep hack. Also, abort detection is turned
100  * off after a timeout (i.e. maybe there's not a terminal hooked up).
101  */
102 #define ZSABORT_DELAY 3000000
103 
104 /*
105  * Define interrupt levels.
106  */
107 #define ZSHARD_PRI	4	/* Wired on the CPU board... */
108 /*
109  * Serial port cards with zs chips on them are actually at the
110  * NuBus interrupt level, which is lower than 4. But blocking
111  * level 4 interrupts will block those interrupts too, so level
112  * 4 is fine.
113  */
114 
115 /* The layout of this is hardware-dependent (padding, order). */
116 struct zschan {
117 	volatile uint8_t zc_csr;	/* ctrl,status, and indirect access */
118 	uint8_t		zc_xxx0;
119 	uint8_t		zc_xxx1;	/* part of the other channel lives here! */
120 	uint8_t		zc_xxx2;	/* Yea Apple! */
121 	volatile uint8_t zc_data;	/* data */
122 	uint8_t		zc_xxx3;
123 	uint8_t		zc_xxx4;
124 	uint8_t		zc_xxx5;
125 };
126 
127 /* Flags from cninit() */
128 static int zs_hwflags[2];
129 /* Default speed for each channel */
130 static int zs_defspeed[2] = {
131 	9600,	 	/* tty00 */
132 	9600,		/* tty01 */
133 };
134 /* console stuff */
135 void	*zs_conschan;
136 int	zs_consunit;
137 #ifdef	ZS_CONSOLE_ABORT
138 int	zs_cons_canabort = 1;
139 #else
140 int	zs_cons_canabort = 0;
141 #endif /* ZS_CONSOLE_ABORT*/
142 /* device to which the console is attached--if serial. */
143 dev_t	mac68k_zsdev;
144 /* Mac stuff */
145 extern volatile unsigned char *sccA;
146 
147 int	zs_cn_check_speed(int);
148 
149 /*
150  * Even though zsparam will set up the clock multiples, etc., we
151  * still set them here as: 1) mice & keyboards don't use zsparam,
152  * and 2) the console stuff uses these defaults before device
153  * attach.
154  */
155 
156 static uint8_t zs_init_reg[16] = {
157 	0,	/* 0: CMD (reset, etc.) */
158 	0,	/* 1: No interrupts yet. */
159 	0x18 + ZSHARD_PRI,	/* IVECT */
160 	ZSWR3_RX_8 | ZSWR3_RX_ENABLE,
161 	ZSWR4_CLK_X16 | ZSWR4_ONESB | ZSWR4_EVENP,
162 	ZSWR5_TX_8 | ZSWR5_TX_ENABLE,
163 	0,	/* 6: TXSYNC/SYNCLO */
164 	0,	/* 7: RXSYNC/SYNCHI */
165 	0,	/* 8: alias for data port */
166 	ZSWR9_MASTER_IE,
167 	0,	/*10: Misc. TX/RX control bits */
168 	ZSWR11_TXCLK_BAUD | ZSWR11_RXCLK_BAUD,
169 	((PCLK/32)/9600)-2,	/*12: BAUDLO (default=9600) */
170 	0,			/*13: BAUDHI (default=9600) */
171 	ZSWR14_BAUD_ENA,
172 	ZSWR15_BREAK_IE,
173 };
174 
175 struct zschan *
176 zs_get_chan_addr(int channel)
177 {
178 	char *addr;
179 	struct zschan *zc;
180 
181 	addr = (char *)__UNVOLATILE(sccA);
182 	if (channel == 0) {
183 		zc = (struct zschan *)(addr + 2);
184 		/* handle the fact the ports are intertwined. */
185 	} else {
186 		zc = (struct zschan *)(addr);
187 	}
188 	return (zc);
189 }
190 
191 
192 /* Find PROM mappings (for console support). */
193 int zsinited = 0; /* 0 = not, 1 = inited, not attached, 2= attached */
194 
195 void
196 zs_init()
197 {
198 	zsinited = 1;
199 	if (zs_conschan != 0){ /* we might have moved io under the console */
200 		zs_conschan = zs_get_chan_addr(zs_consunit);
201 		/* so recalc the console port */
202 	}
203 }
204 
205 
206 /****************************************************************
207  * Autoconfig
208  ****************************************************************/
209 
210 /* Definition of the driver for autoconfig. */
211 static int	zsc_match(device_t, cfdata_t, void *);
212 static void	zsc_attach(device_t, device_t, void *);
213 static int	zsc_print(void *, const char *);
214 
215 CFATTACH_DECL_NEW(zsc, sizeof(struct zsc_softc),
216     zsc_match, zsc_attach, NULL, NULL);
217 
218 extern struct cfdriver zsc_cd;
219 
220 int zshard(void *);
221 
222 /*
223  * Is the zs chip present?
224  */
225 static int
226 zsc_match(device_t parent, cfdata_t cf, void *aux)
227 {
228 	if (zsinited == 2)
229 		return 0;
230 
231 	return 1;
232 }
233 
234 /*
235  * Attach a found zs.
236  *
237  * Match slave number to zs unit number, so that misconfiguration will
238  * not set up the keyboard as ttya, etc.
239  */
240 static void
241 zsc_attach(device_t parent, device_t self, void *aux)
242 {
243 	struct zsc_softc *zsc = device_private(self);
244 	struct zsc_attach_args zsc_args;
245 	volatile struct zschan *zc;
246 	struct xzs_chanstate *xcs;
247 	struct zs_chanstate *cs;
248 	int s, chip, theflags, channel;
249 
250 	zsc->zsc_dev = self;
251 	if (!zsinited)
252 		zs_init();
253 	zsinited = 2;
254 
255 	chip = 0; /* We'll deal with chip types post 1.2 */
256 	aprint_normal(" chip type %d \n",chip);
257 
258 	/*
259 	 * Initialize software state for each channel.
260 	 */
261 	for (channel = 0; channel < 2; channel++) {
262 		zsc_args.channel = channel;
263 		zsc_args.hwflags = zs_hwflags[channel];
264 		xcs = &zsc->xzsc_xcs_store[channel];
265 		cs  = &xcs->xzs_cs;
266 		zsc->zsc_cs[channel] = cs;
267 
268 		zs_lock_init(cs);
269 		cs->cs_channel = channel;
270 		cs->cs_private = NULL;
271 		cs->cs_ops = &zsops_null;
272 
273 		zc = zs_get_chan_addr(channel);
274 		cs->cs_reg_csr  = &zc->zc_csr;
275 		cs->cs_reg_data = &zc->zc_data;
276 
277 		memcpy(cs->cs_creg, zs_init_reg, 16);
278 		memcpy(cs->cs_preg, zs_init_reg, 16);
279 
280 		/* Current BAUD rate generator clock. */
281 		cs->cs_brg_clk = PCLK / 16;	/* RTxC is 230400*16, so use 230400 */
282 		cs->cs_defspeed = zs_defspeed[channel];
283 		cs->cs_defcflag = zs_def_cflag;
284 
285 		/* Make these correspond to cs_defcflag (-crtscts) */
286 		cs->cs_rr0_dcd = ZSRR0_DCD;
287 		cs->cs_rr0_cts = 0;
288 		cs->cs_wr5_dtr = ZSWR5_DTR;
289 		cs->cs_wr5_rts = 0;
290 
291 #ifdef __notyet__
292 		cs->cs_slave_type = ZS_SLAVE_NONE;
293 #endif
294 
295 		/* Define BAUD rate stuff. */
296 		xcs->cs_clocks[0].clk = PCLK;
297 		xcs->cs_clocks[0].flags = ZSC_RTXBRG | ZSC_RTXDIV;
298 		xcs->cs_clocks[1].flags =
299 			ZSC_RTXBRG | ZSC_RTXDIV | ZSC_VARIABLE | ZSC_EXTERN;
300 		xcs->cs_clocks[2].flags = ZSC_TRXDIV | ZSC_VARIABLE;
301 		xcs->cs_clock_count = 3;
302 		if (channel == 0) {
303 			theflags = mac68k_machine.modem_flags;
304 			xcs->cs_clocks[1].clk = mac68k_machine.modem_dcd_clk;
305 			xcs->cs_clocks[2].clk = mac68k_machine.modem_cts_clk;
306 		} else {
307 			theflags = mac68k_machine.print_flags;
308 			xcs->cs_clocks[1].flags = ZSC_VARIABLE;
309 			/*
310 			 * Yes, we aren't defining ANY clock source enables for the
311 			 * printer's DCD clock in. The hardware won't let us
312 			 * use it. But a clock will freak out the chip, so we
313 			 * let you set it, telling us to bar interrupts on the line.
314 			 */
315 			xcs->cs_clocks[1].clk = mac68k_machine.print_dcd_clk;
316 			xcs->cs_clocks[2].clk = mac68k_machine.print_cts_clk;
317 		}
318 		if (xcs->cs_clocks[1].clk)
319 			zsc_args.hwflags |= ZS_HWFLAG_NO_DCD;
320 		if (xcs->cs_clocks[2].clk)
321 			zsc_args.hwflags |= ZS_HWFLAG_NO_CTS;
322 
323 		printf("zsc%d channel %d: d_speed %6d DCD clk %ld CTS clk %ld",
324 				device_unit(self), channel, cs->cs_defspeed,
325 				xcs->cs_clocks[1].clk, xcs->cs_clocks[2].clk);
326 
327 		/* Set defaults in our "extended" chanstate. */
328 		xcs->cs_csource = 0;
329 		xcs->cs_psource = 0;
330 		xcs->cs_cclk_flag = 0;  /* Nothing fancy by default */
331 		xcs->cs_pclk_flag = 0;
332 
333 		if (theflags & ZSMAC_RAW) {
334 			zsc_args.hwflags |= ZS_HWFLAG_RAW;
335 			printf(" (raw defaults)");
336 		}
337 
338 		/*
339 		 * XXX - This might be better done with a "stub" driver
340 		 * (to replace zstty) that ignores LocalTalk for now.
341 		 */
342 		if (theflags & ZSMAC_LOCALTALK) {
343 			printf(" shielding from LocalTalk");
344 			cs->cs_defspeed = 1;
345 			cs->cs_creg[ZSRR_BAUDLO] = cs->cs_preg[ZSRR_BAUDLO] = 0xff;
346 			cs->cs_creg[ZSRR_BAUDHI] = cs->cs_preg[ZSRR_BAUDHI] = 0xff;
347 			zs_write_reg(cs, ZSRR_BAUDLO, 0xff);
348 			zs_write_reg(cs, ZSRR_BAUDHI, 0xff);
349 			/*
350 			 * If we might have LocalTalk, then make sure we have the
351 			 * Baud rate low-enough to not do any damage.
352 			 */
353 		}
354 
355 		/*
356 		 * We used to disable chip interrupts here, but we now
357 		 * do that in zscnprobe, just in case MacOS left the chip on.
358 		 */
359 
360 		xcs->cs_chip = chip;
361 
362 		/* Stash away a copy of the final H/W flags. */
363 		xcs->cs_hwflags = zsc_args.hwflags;
364 
365 		printf("\n");
366 
367 		/*
368 		 * Look for a child driver for this channel.
369 		 * The child attach will setup the hardware.
370 		 */
371 		if (!config_found(self, (void *)&zsc_args, zsc_print)) {
372 			/* No sub-driver.  Just reset it. */
373 			uint8_t reset = (channel == 0) ?
374 				ZSWR9_A_RESET : ZSWR9_B_RESET;
375 			s = splzs();
376 			zs_write_reg(cs,  9, reset);
377 			splx(s);
378 		}
379 	}
380 
381 	if (current_mac_model->class == MACH_CLASSAV) {
382 		add_psc_lev4_intr(PSCINTR_SCCA, zshard, zsc);
383 		add_psc_lev4_intr(PSCINTR_SCCB, zshard, zsc);
384 	} else {
385 		intr_establish(zshard, zsc, ZSHARD_PRI);
386 	}
387 	zsc->zsc_softintr_cookie = softint_establish(SOFTINT_SERIAL,
388 	    (void (*)(void *))zsc_intr_soft, zsc);
389 
390 	/* Now safe to enable interrupts. */
391 
392 	/*
393 	 * Set the master interrupt enable and interrupt vector.
394 	 * (common to both channels, do it on A)
395 	 */
396 	cs = zsc->zsc_cs[0];
397 	s = splzs();
398 	/* interrupt vector */
399 	zs_write_reg(cs, 2, zs_init_reg[2]);
400 	/* master interrupt control (enable) */
401 	zs_write_reg(cs, 9, zs_init_reg[9]);
402 	splx(s);
403 }
404 
405 static int
406 zsc_print(void *aux, const char *name)
407 {
408 	struct zsc_attach_args *args = aux;
409 
410 	if (name != NULL)
411 		aprint_normal("%s: ", name);
412 
413 	if (args->channel != -1)
414 		aprint_normal(" channel %d", args->channel);
415 
416 	return UNCONF;
417 }
418 
419 int
420 zsmdioctl(struct zs_chanstate *cs, u_long cmd, void *data)
421 {
422 	switch (cmd) {
423 	default:
424 		return (EPASSTHROUGH);
425 	}
426 	return (0);
427 }
428 
429 void
430 zsmd_setclock(struct zs_chanstate *cs)
431 {
432 	struct xzs_chanstate *xcs = (void *)cs;
433 
434 	if (cs->cs_channel != 0)
435 		return;
436 
437 	/*
438 	 * If the new clock has the external bit set, then select the
439 	 * external source.
440 	 */
441 	via_set_modem((xcs->cs_pclk_flag & ZSC_EXTERN) ? 1 : 0);
442 }
443 
444 /*
445  * Do the minimum work to pull data off of the chip and queue it up
446  * for later processing.
447  */
448 int
449 zshard(void *arg)
450 {
451 	struct zsc_softc *zsc = arg;
452 	int rval;
453 
454 	if (zsc == NULL)
455 		return 0;
456 
457 	rval = zsc_intr_hard(zsc);
458 	if ((zsc->zsc_cs[0]->cs_softreq) || (zsc->zsc_cs[1]->cs_softreq)) {
459 		softint_schedule(zsc->zsc_softintr_cookie);
460 	}
461 	return (rval);
462 }
463 
464 #ifndef ZS_TOLERANCE
465 #define ZS_TOLERANCE 51
466 /* 5% in tenths of a %, plus 1 so that exactly 5% will be ok. */
467 #endif
468 
469 /*
470  * check out a rate for acceptability from the internal clock
471  * source. Used in console config to validate a requested
472  * default speed. Placed here so that all the speed checking code is
473  * in one place.
474  *
475  * != 0 means ok.
476  */
477 int
478 zs_cn_check_speed(int bps)
479 {
480 	int tc, rate;
481 
482 	tc = BPS_TO_TCONST(PCLK / 16, bps);
483 	if (tc < 0)
484 		return 0;
485 	rate = TCONST_TO_BPS(PCLK / 16, tc);
486 	if (ZS_TOLERANCE > abs(((rate - bps)*1000)/bps))
487 		return 1;
488 	else
489 		return 0;
490 }
491 
492 /*
493  * Search through the signal sources in the channel, and
494  * pick the best one for the baud rate requested. Return
495  * a -1 if not achievable in tolerance. Otherwise return 0
496  * and fill in the values.
497  *
498  * This routine draws inspiration from the Atari port's zs.c
499  * driver in NetBSD 1.1 which did the same type of source switching.
500  * Tolerance code inspired by comspeed routine in isa/com.c.
501  *
502  * By Bill Studenmund, 1996-05-12
503  */
504 int
505 zs_set_speed(struct zs_chanstate *cs, int bps)
506 {
507 	struct xzs_chanstate *xcs = (void *) cs;
508 	int i, tc, tc0 = 0, tc1, s, sf = 0;
509 	int src, rate0, rate1, err, tol;
510 
511 	if (bps == 0)
512 		return (0);
513 
514 	src = -1;		/* no valid source yet */
515 	tol = ZS_TOLERANCE;
516 
517 	/*
518 	 * Step through all the sources and see which one matches
519 	 * the best. A source has to match BETTER than tol to be chosen.
520 	 * Thus if two sources give the same error, the first one will be
521 	 * chosen. Also, allow for the possability that one source might run
522 	 * both the BRG and the direct divider (i.e. RTxC).
523 	 */
524 	for (i=0; i < xcs->cs_clock_count; i++) {
525 		if (xcs->cs_clocks[i].clk <= 0)
526 			continue;	/* skip non-existent or bad clocks */
527 		if (xcs->cs_clocks[i].flags & ZSC_BRG) {
528 			/* check out BRG at /16 */
529 			tc1 = BPS_TO_TCONST(xcs->cs_clocks[i].clk >> 4, bps);
530 			if (tc1 >= 0) {
531 				rate1 = TCONST_TO_BPS(xcs->cs_clocks[i].clk >> 4, tc1);
532 				err = abs(((rate1 - bps)*1000)/bps);
533 				if (err < tol) {
534 					tol = err;
535 					src = i;
536 					sf = xcs->cs_clocks[i].flags & ~ZSC_DIV;
537 					tc0 = tc1;
538 					rate0 = rate1;
539 				}
540 			}
541 		}
542 		if (xcs->cs_clocks[i].flags & ZSC_DIV) {
543 			/*
544 			 * Check out either /1, /16, /32, or /64
545 			 * Note: for /1, you'd better be using a synchronized
546 			 * clock!
547 			 */
548 			int b0 = xcs->cs_clocks[i].clk, e0 = abs(b0-bps);
549 			int b1 = b0 >> 4, e1 = abs(b1-bps);
550 			int b2 = b1 >> 1, e2 = abs(b2-bps);
551 			int b3 = b2 >> 1, e3 = abs(b3-bps);
552 
553 			if (e0 < e1 && e0 < e2 && e0 < e3) {
554 				err = e0;
555 				rate1 = b0;
556 				tc1 = ZSWR4_CLK_X1;
557 			} else if (e0 > e1 && e1 < e2  && e1 < e3) {
558 				err = e1;
559 				rate1 = b1;
560 				tc1 = ZSWR4_CLK_X16;
561 			} else if (e0 > e2 && e1 > e2 && e2 < e3) {
562 				err = e2;
563 				rate1 = b2;
564 				tc1 = ZSWR4_CLK_X32;
565 			} else {
566 				err = e3;
567 				rate1 = b3;
568 				tc1 = ZSWR4_CLK_X64;
569 			}
570 
571 			err = (err * 1000)/bps;
572 			if (err < tol) {
573 				tol = err;
574 				src = i;
575 				sf = xcs->cs_clocks[i].flags & ~ZSC_BRG;
576 				tc0 = tc1;
577 				rate0 = rate1;
578 			}
579 		}
580 	}
581 #ifdef ZSMACDEBUG
582 	zsprintf("Checking for rate %d. Found source #%d.\n",bps, src);
583 #endif
584 	if (src == -1)
585 		return (EINVAL); /* no can do */
586 
587 	/*
588 	 * The M.I. layer likes to keep cs_brg_clk current, even though
589 	 * we are the only ones who should be touching the BRG's rate.
590 	 *
591 	 * Note: we are assuming that any ZSC_EXTERN signal source comes in
592 	 * on the RTxC pin. Correct for the mac68k obio zsc.
593 	 */
594 	if (sf & ZSC_EXTERN)
595 		cs->cs_brg_clk = xcs->cs_clocks[i].clk >> 4;
596 	else
597 		cs->cs_brg_clk = PCLK / 16;
598 
599 	/*
600 	 * Now we have a source, so set it up.
601 	 */
602 	s = splzs();
603 	xcs->cs_psource = src;
604 	xcs->cs_pclk_flag = sf;
605 	bps = rate0;
606 	if (sf & ZSC_BRG) {
607 		cs->cs_preg[4] = ZSWR4_CLK_X16;
608 		cs->cs_preg[11]= ZSWR11_RXCLK_BAUD | ZSWR11_TXCLK_BAUD;
609 		if (sf & ZSC_PCLK) {
610 			cs->cs_preg[14] = ZSWR14_BAUD_ENA | ZSWR14_BAUD_FROM_PCLK;
611 		} else {
612 			cs->cs_preg[14] = ZSWR14_BAUD_ENA;
613 		}
614 		tc = tc0;
615 	} else {
616 		cs->cs_preg[4] = tc0;
617 		if (sf & ZSC_RTXDIV) {
618 			cs->cs_preg[11] = ZSWR11_RXCLK_RTXC | ZSWR11_TXCLK_RTXC;
619 		} else {
620 			cs->cs_preg[11] = ZSWR11_RXCLK_TRXC | ZSWR11_TXCLK_TRXC;
621 		}
622 		cs->cs_preg[14]= 0;
623 		tc = 0xffff;
624 	}
625 	/* Set the BAUD rate divisor. */
626 	cs->cs_preg[12] = tc;
627 	cs->cs_preg[13] = tc >> 8;
628 	splx(s);
629 
630 #ifdef ZSMACDEBUG
631 	zsprintf("Rate is %7d, tc is %7d, source no. %2d, flags %4x\n", \
632 	    bps, tc, src, sf);
633 	zsprintf("Registers are: 4 %x, 11 %x, 14 %x\n\n",
634 		cs->cs_preg[4], cs->cs_preg[11], cs->cs_preg[14]);
635 #endif
636 
637 	cs->cs_preg[5] |= ZSWR5_RTS;	/* Make sure the drivers are on! */
638 
639 	/* Caller will stuff the pending registers. */
640 	return (0);
641 }
642 
643 int
644 zs_set_modes(struct zs_chanstate *cs, int cflag)
645 {
646 	struct xzs_chanstate *xcs = (void*)cs;
647 	int s;
648 
649 	/*
650 	 * Make sure we don't enable hfc on a signal line we're ignoring.
651 	 * As we enable CTS interrupts only if we have CRTSCTS or CDTRCTS,
652 	 * this code also effectivly turns off ZSWR15_CTS_IE.
653 	 *
654 	 * Also, disable DCD interrupts if we've been told to ignore
655 	 * the DCD pin. Happens on mac68k because the input line for
656 	 * DCD can also be used as a clock input.  (Just set CLOCAL.)
657 	 *
658 	 * If someone tries to turn an invalid flow mode on, Just Say No
659 	 * (Suggested by gwr)
660 	 */
661 	if ((cflag & CDTRCTS) && (cflag & (CRTSCTS | MDMBUF)))
662 		return (EINVAL);
663 	cs->cs_rr0_pps = 0;
664 	if (xcs->cs_hwflags & ZS_HWFLAG_NO_DCD) {
665 		if (cflag & MDMBUF)
666 			return (EINVAL);
667 		cflag |= CLOCAL;
668 	} else {
669 		/*
670 		 * cs->cs_rr0_pps indicates which bit MAY be used for pps.
671 		 * Enable only if nothing else will want the interrupt and
672 		 * it's ok to enable interrupts on this line.
673 		 */
674 		if ((cflag & (CLOCAL | MDMBUF)) == CLOCAL)
675 			cs->cs_rr0_pps = ZSRR0_DCD;
676 	}
677 	if ((xcs->cs_hwflags & ZS_HWFLAG_NO_CTS) && (cflag & (CRTSCTS | CDTRCTS)))
678 		return (EINVAL);
679 
680 	/*
681 	 * Output hardware flow control on the chip is horrendous:
682 	 * if carrier detect drops, the receiver is disabled, and if
683 	 * CTS drops, the transmitter is stoped IN MID CHARACTER!
684 	 * Therefore, NEVER set the HFC bit, and instead use the
685 	 * status interrupt to detect CTS changes.
686 	 */
687 	s = splzs();
688 	if ((cflag & (CLOCAL | MDMBUF)) != 0)
689 		cs->cs_rr0_dcd = 0;
690 	else
691 		cs->cs_rr0_dcd = ZSRR0_DCD;
692 	/*
693 	 * The mac hardware only has one output, DTR (HSKo in Mac
694 	 * parlance). In HFC mode, we use it for the functions
695 	 * typically served by RTS and DTR on other ports, so we
696 	 * have to fake the upper layer out some.
697 	 *
698 	 * CRTSCTS we use CTS as an input which tells us when to shut up.
699 	 * We make no effort to shut up the other side of the connection.
700 	 * DTR is used to hang up the modem.
701 	 *
702 	 * In CDTRCTS, we use CTS to tell us to stop, but we use DTR to
703 	 * shut up the other side.
704 	 */
705 	if ((cflag & CRTSCTS) != 0) {
706 		cs->cs_wr5_dtr = ZSWR5_DTR;
707 		cs->cs_wr5_rts = 0;
708 		cs->cs_rr0_cts = ZSRR0_CTS;
709 	} else if ((cflag & CDTRCTS) != 0) {
710 		cs->cs_wr5_dtr = 0;
711 		cs->cs_wr5_rts = ZSWR5_DTR;
712 		cs->cs_rr0_cts = ZSRR0_CTS;
713 	} else if ((cflag & MDMBUF) != 0) {
714 		cs->cs_wr5_dtr = 0;
715 		cs->cs_wr5_rts = ZSWR5_DTR;
716 		cs->cs_rr0_cts = ZSRR0_DCD;
717 	} else {
718 		cs->cs_wr5_dtr = ZSWR5_DTR;
719 		cs->cs_wr5_rts = 0;
720 		cs->cs_rr0_cts = 0;
721 	}
722 	splx(s);
723 
724 	/* Caller will stuff the pending registers. */
725 	return (0);
726 }
727 
728 
729 /*
730  * Read or write the chip with suitable delays.
731  * MacII hardware has the delay built in.
732  * No need for extra delay. :-) However, some clock-chirped
733  * macs, or zsc's on serial add-on boards might need it.
734  */
735 #define	ZS_DELAY()
736 
737 uint8_t
738 zs_read_reg(struct zs_chanstate *cs, uint8_t reg)
739 {
740 	uint8_t val;
741 
742 	*cs->cs_reg_csr = reg;
743 	ZS_DELAY();
744 	val = *cs->cs_reg_csr;
745 	ZS_DELAY();
746 	return val;
747 }
748 
749 void
750 zs_write_reg(struct zs_chanstate *cs, uint8_t reg, uint8_t val)
751 {
752 	*cs->cs_reg_csr = reg;
753 	ZS_DELAY();
754 	*cs->cs_reg_csr = val;
755 	ZS_DELAY();
756 }
757 
758 uint8_t
759 zs_read_csr(struct zs_chanstate *cs)
760 {
761 	uint8_t val;
762 
763 	val = *cs->cs_reg_csr;
764 	ZS_DELAY();
765 	/* make up for the fact CTS is wired backwards */
766 	val ^= ZSRR0_CTS;
767 	return val;
768 }
769 
770 void
771 zs_write_csr(struct zs_chanstate *cs, uint8_t val)
772 {
773 	/* Note, the csr does not write CTS... */
774 	*cs->cs_reg_csr = val;
775 	ZS_DELAY();
776 }
777 
778 uint8_t
779 zs_read_data(struct zs_chanstate *cs)
780 {
781 	uint8_t val;
782 
783 	val = *cs->cs_reg_data;
784 	ZS_DELAY();
785 	return val;
786 }
787 
788 void
789 zs_write_data(struct zs_chanstate *cs, uint8_t val)
790 {
791 	*cs->cs_reg_data = val;
792 	ZS_DELAY();
793 }
794 
795 /****************************************************************
796  * Console support functions (mac68k specific!)
797  * Note: this code is allowed to know about the layout of
798  * the chip registers, and uses that to keep things simple.
799  * XXX - I think I like the mvme167 code better. -gwr
800  * XXX - Well :-P  :-)  -wrs
801  ****************************************************************/
802 
803 #define zscnpollc	nullcnpollc
804 cons_decl(zs);
805 
806 static void	zscnsetup(void);
807 
808 /*
809  * Console functions.
810  */
811 
812 /*
813  * This code modled after the zs_setparam routine in zskgdb
814  * It sets the console unit to a known state so we can output
815  * correctly.
816  */
817 static void
818 zscnsetup(void)
819 {
820 	struct xzs_chanstate xcs;
821 	struct zs_chanstate *cs;
822 	struct zschan *zc;
823 	int tconst, s;
824 
825 	/* Setup temporary chanstate. */
826 	memset(&xcs, 0, sizeof(xcs));
827 	cs = &xcs.xzs_cs;
828 	zc = zs_conschan;
829 	cs->cs_reg_csr  = &zc->zc_csr;
830 	cs->cs_reg_data = &zc->zc_data;
831 	cs->cs_channel = zs_consunit;
832 	cs->cs_brg_clk = PCLK / 16;
833 
834 	memcpy(cs->cs_preg, zs_init_reg, 16);
835 	cs->cs_preg[5] |= ZSWR5_DTR | ZSWR5_RTS;
836 	cs->cs_preg[15] = ZSWR15_BREAK_IE;
837 	tconst = BPS_TO_TCONST(cs->cs_brg_clk, zs_defspeed[zs_consunit]);
838 	cs->cs_preg[12] = tconst;
839 	cs->cs_preg[13] = tconst >> 8;
840 	/* can't use zs_set_speed as we haven't set up the
841 	 * signal sources, and it's not worth it for now
842 	 */
843 
844 	/*
845 	 * As zs_loadchannelregs doesn't touch reg 9 (interrupt control),
846 	 * we won't accidentally turn on interrupts below
847 	 */
848 	s = splhigh();
849 	zs_loadchannelregs(cs);
850 	splx(s);
851 }
852 
853 /*
854  * zscnprobe is the routine which gets called as the kernel is trying to
855  * figure out where the console should be. Each io driver which might
856  * be the console (as defined in mac68k/conf.c) gets probed. The probe
857  * fills in the consdev structure. Important parts are the device #,
858  * and the console priority. Values are CN_DEAD (don't touch me),
859  * CN_NORMAL (I'm here, but elsewhere might be better), CN_INTERNAL
860  * (the video, better than CN_NORMAL), and CN_REMOTE (pick me!)
861  *
862  * As the mac's a bit different, we do extra work here. We mainly check
863  * to see if we have serial echo going on. Also chould check for default
864  * speeds.
865  */
866 void
867 zscnprobe(struct consdev * cp)
868 {
869 	extern u_long   IOBase;
870 	int     maj, unit, i;
871 	extern const struct cdevsw zstty_cdevsw;
872 
873 	maj = cdevsw_lookup_major(&zstty_cdevsw);
874 	if (maj != -1) {
875 		cp->cn_pri = CN_NORMAL;		 /* Lower than CN_INTERNAL */
876 		if (mac68k_machine.serial_console != 0) {
877 			cp->cn_pri = CN_REMOTE;	 /* Higher than CN_INTERNAL */
878 			mac68k_machine.serial_boot_echo =0;
879 		}
880 
881 		unit = (mac68k_machine.serial_console == 1) ? 0 : 1;
882 		zs_consunit = unit;
883 		zs_conschan = (struct zschan *) -1; /* dummy flag for zs_init() */
884 
885 		mac68k_zsdev = cp->cn_dev = makedev(maj, unit);
886 	}
887 	if (mac68k_machine.serial_boot_echo) {
888 		/*
889 		 * at this point, we know that we don't have a serial
890 		 * console, but are doing echo
891 		 */
892 		zs_conschan = (struct zschan *) -1; /* dummy flag for zs_init() */
893 		zs_consunit = 1;
894 		zs_hwflags[zs_consunit] = ZS_HWFLAG_CONSOLE;
895 	}
896 
897 	if ((i = mac68k_machine.modem_d_speed) > 0) {
898 		if (zs_cn_check_speed(i))
899 			zs_defspeed[0] = i;
900 	}
901 	if ((i = mac68k_machine.print_d_speed) > 0) {
902 		if (zs_cn_check_speed(i))
903 			zs_defspeed[1] = i;
904 	}
905 	mac68k_set_io_offsets(IOBase);
906 	zs_init();
907 	/*
908 	 * zsinit will set up the addresses of the scc. It will also, if
909 	 * zs_conschan != 0, calculate the new address of the conschan for
910 	 * unit zs_consunit. So if we are (or think we are) going to use the
911 	 * chip for console I/O, we just set up the internal addresses for it.
912 	 *
913 	 * Now turn off interrupts for the chip. Note: using sccA to get at
914 	 * the chip is the only vestage of the NetBSD 1.0 ser driver. :-)
915 	 */
916 	unit = sccA[2];			/* reset reg. access */
917 	unit = sccA[0];
918 	sccA[2] = 9; sccA[2] = 0;	/* write 0 to reg. 9, clearing MIE */
919 	sccA[2] = ZSWR0_CLR_INTR; unit = sccA[2]; /* reset any pending ints. */
920 	sccA[0] = ZSWR0_CLR_INTR; unit = sccA[0];
921 
922 	if (mac68k_machine.serial_boot_echo)
923 		zscnsetup();
924 	return;
925 }
926 
927 void
928 zscninit(struct consdev *cp)
929 {
930 
931 	zs_hwflags[zs_consunit] = ZS_HWFLAG_CONSOLE;
932 
933 	/*
934 	 * zsinit will set up the addresses of the scc. It will also, if
935 	 * zs_conschan != 0, calculate the new address of the conschan for
936 	 * unit zs_consunit. So zs_init implicitly sets zs_conschan to the right
937 	 * number. :-)
938 	 */
939 	zscnsetup();
940 	printf("\nNetBSD/mac68k console\n");
941 }
942 
943 
944 /*
945  * Polled input char.
946  */
947 int
948 zs_getc(void *arg)
949 {
950 	volatile struct zschan *zc = arg;
951 	int s, c, rr0;
952 
953 	s = splhigh();
954 	/* Wait for a character to arrive. */
955 	do {
956 		rr0 = zc->zc_csr;
957 		ZS_DELAY();
958 	} while ((rr0 & ZSRR0_RX_READY) == 0);
959 
960 	c = zc->zc_data;
961 	ZS_DELAY();
962 	splx(s);
963 
964 	/*
965 	 * This is used by the kd driver to read scan codes,
966 	 * so don't translate '\r' ==> '\n' here...
967 	 */
968 	return (c);
969 }
970 
971 /*
972  * Polled output char.
973  */
974 void
975 zs_putc(void *arg, int c)
976 {
977 	volatile struct zschan *zc = arg;
978 	int s, rr0;
979 	long wait = 0;
980 
981 	s = splhigh();
982 	/* Wait for transmitter to become ready. */
983 	do {
984 		rr0 = zc->zc_csr;
985 		ZS_DELAY();
986 	} while (((rr0 & ZSRR0_TX_READY) == 0) && (wait++ < 1000000));
987 
988 	if ((rr0 & ZSRR0_TX_READY) != 0) {
989 		zc->zc_data = c;
990 		ZS_DELAY();
991 	}
992 	splx(s);
993 }
994 
995 
996 /*
997  * Polled console input putchar.
998  */
999 int
1000 zscngetc(dev_t dev)
1001 {
1002 	struct zschan *zc = zs_conschan;
1003 	int c;
1004 
1005 	c = zs_getc(zc);
1006 	return (c);
1007 }
1008 
1009 /*
1010  * Polled console output putchar.
1011  */
1012 void
1013 zscnputc(dev_t dev, int c)
1014 {
1015 	struct zschan *zc = zs_conschan;
1016 
1017 	zs_putc(zc, c);
1018 }
1019 
1020 
1021 
1022 /*
1023  * Handle user request to enter kernel debugger.
1024  */
1025 void
1026 zs_abort(struct zs_chanstate *cs)
1027 {
1028 	volatile struct zschan *zc = zs_conschan;
1029 	int rr0;
1030 	long wait = 0;
1031 
1032 	if (zs_cons_canabort == 0)
1033 		return;
1034 
1035 	/* Wait for end of break to avoid PROM abort. */
1036 	do {
1037 		rr0 = zc->zc_csr;
1038 		ZS_DELAY();
1039 	} while ((rr0 & ZSRR0_BREAK) && (wait++ < ZSABORT_DELAY));
1040 
1041 	if (wait > ZSABORT_DELAY) {
1042 		zs_cons_canabort = 0;
1043 	/* If we time out, turn off the abort ability! */
1044 	}
1045 
1046 #ifdef DDB
1047 	Debugger();
1048 #endif
1049 }
1050