xref: /netbsd-src/sys/arch/m68k/include/pmap_motorola.h (revision 946379e7b37692fc43f68eb0d1c10daa0a7f3b6c)
1 /*	$NetBSD: pmap_motorola.h,v 1.34 2011/10/29 18:26:19 tsutsui Exp $	*/
2 
3 /*
4  * Copyright (c) 1991, 1993
5  *	The Regents of the University of California.  All rights reserved.
6  *
7  * This code is derived from software contributed to Berkeley by
8  * the Systems Programming Group of the University of Utah Computer
9  * Science Department.
10  *
11  * Redistribution and use in source and binary forms, with or without
12  * modification, are permitted provided that the following conditions
13  * are met:
14  * 1. Redistributions of source code must retain the above copyright
15  *    notice, this list of conditions and the following disclaimer.
16  * 2. Redistributions in binary form must reproduce the above copyright
17  *    notice, this list of conditions and the following disclaimer in the
18  *    documentation and/or other materials provided with the distribution.
19  * 3. Neither the name of the University nor the names of its contributors
20  *    may be used to endorse or promote products derived from this software
21  *    without specific prior written permission.
22  *
23  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
24  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
25  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
26  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
27  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
28  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
29  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
30  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
31  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
32  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33  * SUCH DAMAGE.
34  *
35  *	@(#)pmap.h	8.1 (Berkeley) 6/10/93
36  */
37 
38 /*
39  * Copyright (c) 1987 Carnegie-Mellon University
40  *
41  * This code is derived from software contributed to Berkeley by
42  * the Systems Programming Group of the University of Utah Computer
43  * Science Department.
44  *
45  * Redistribution and use in source and binary forms, with or without
46  * modification, are permitted provided that the following conditions
47  * are met:
48  * 1. Redistributions of source code must retain the above copyright
49  *    notice, this list of conditions and the following disclaimer.
50  * 2. Redistributions in binary form must reproduce the above copyright
51  *    notice, this list of conditions and the following disclaimer in the
52  *    documentation and/or other materials provided with the distribution.
53  * 3. All advertising materials mentioning features or use of this software
54  *    must display the following acknowledgement:
55  *	This product includes software developed by the University of
56  *	California, Berkeley and its contributors.
57  * 4. Neither the name of the University nor the names of its contributors
58  *    may be used to endorse or promote products derived from this software
59  *    without specific prior written permission.
60  *
61  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
62  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
63  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
64  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
65  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
66  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
67  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
68  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
69  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
70  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
71  * SUCH DAMAGE.
72  *
73  *	@(#)pmap.h	8.1 (Berkeley) 6/10/93
74  */
75 
76 #ifndef	_M68K_PMAP_MOTOROLA_H_
77 #define	_M68K_PMAP_MOTOROLA_H_
78 
79 #ifdef _KERNEL_OPT
80 #include "opt_m68k_arch.h"
81 #endif
82 
83 #include <machine/cpu.h>
84 #include <machine/pte.h>
85 
86 /*
87  * Pmap stuff
88  */
89 struct pmap {
90 	pt_entry_t		*pm_ptab;	/* KVA of page table */
91 	st_entry_t		*pm_stab;	/* KVA of segment table */
92 	u_int			pm_stfree;	/* 040: free lev2 blocks */
93 	st_entry_t		*pm_stpa;	/* 040: ST phys addr */
94 	uint16_t		pm_sref;	/* segment table ref count */
95 	u_int			pm_count;	/* pmap reference count */
96 	struct pmap_statistics	pm_stats;	/* pmap statistics */
97 	int			pm_ptpages;	/* more stats: PT pages */
98 };
99 
100 /*
101  * MMU specific segment values
102  *
103  * We are using following segment layout in m68k pmap_motorola.c:
104  * 68020/030 4KB/page: l1,l2,page    == 10,10,12	(%tc = 0x82c0aa00)
105  * 68020/030 8KB/page: l1,l2,page    ==  8,11,13	(%tc = 0x82d08b00)
106  * 68040/060 4KB/page: l1,l2,l3,page == 7,7,6,12	(%tc = 0x8000)
107  * 68040/060 8KB/page: l1,l2,l3,page == 7,7,5,13	(%tc = 0xc000)
108  *
109  * 68020/030 l2 size is chosen per NPTEPG, a number of page table entries
110  * per page, to use one whole page for PTEs per one segment table entry,
111  * and maybe also because 68020 HP MMU machines use simlar structures.
112  *
113  * 68040/060 layout is defined by hardware design and not configurable,
114  * as defined in <m68k/pte_motorola.h>.
115  *
116  * Even on 68040/060, we still appropriate 2-level ste-pte pmap structures
117  * for 68020/030 (derived from 4.4BSD/hp300) to handle 040's 3-level MMU.
118  * TIA_SIZE and TIB_SIZE are used to represent such pmap structures and
119  * they are also refered on 040/060.
120  *
121  * NBSEG and SEGOFSET are used to check l2 STE of the specified VA,
122  * so they have different values between 020/030 and 040/060.
123  */
124 							/*  8KB /  4KB	*/
125 #define TIB_SHIFT	(PG_SHIFT - 2)			/*   11 /   10	*/
126 #define TIB_SIZE	(1U << TIB_SHIFT)		/* 2048 / 1024	*/
127 #define TIA_SHIFT	(32 - TIB_SHIFT - PG_SHIFT)	/*    8 /   10	*/
128 #define TIA_SIZE	(1U << TIA_SHIFT)		/*  256 / 1024	*/
129 
130 #define SEGSHIFT	(TIB_SHIFT + PG_SHIFT)		/*   24 /   22	*/
131 
132 #define NBSEG30		(1U << SEGSHIFT)
133 #define NBSEG40		(1U << SG4_SHIFT2)
134 
135 #if   ( defined(M68020) ||  defined(M68030)) &&	\
136       (!defined(M68040) && !defined(M68060))
137 #define NBSEG		NBSEG30
138 #elif ( defined(M68040) ||  defined(M68060)) &&	\
139       (!defined(M68020) && !defined(M68030))
140 #define NBSEG		NBSEG40
141 #else
142 #define NBSEG		((mmutype == MMU_68040) ? NBSEG40 : NBSEG30)
143 #endif
144 
145 #define SEGOFSET	(NBSEG - 1)	/* byte offset into segment */
146 
147 #define	m68k_round_seg(x)	((((vaddr_t)(x)) + SEGOFSET) & ~SEGOFSET)
148 #define	m68k_trunc_seg(x)	((vaddr_t)(x) & ~SEGOFSET)
149 #define	m68k_seg_offset(x)	((vaddr_t)(x) & SEGOFSET)
150 
151 /*
152  * On the 040, we keep track of which level 2 blocks are already in use
153  * with the pm_stfree mask.  Bits are arranged from LSB (block 0) to MSB
154  * (block 31).  For convenience, the level 1 table is considered to be
155  * block 0.
156  *
157  * MAX[KU]L2SIZE control how many pages of level 2 descriptors are allowed
158  * for the kernel and users.
159  * 16 or 8 implies only the initial "segment table" page is used,
160  * i.e. it means PAGE_SIZE / (SG4_LEV1SIZE * sizeof(st_entry_t)).
161  * WARNING: don't change MAXUL2SIZE unless you can allocate
162  * physically contiguous pages for the ST in pmap_motorola.c!
163  */
164 #define MAXKL2SIZE	32
165 #if PAGE_SIZE == 8192	/* NBPG / (SG4_LEV1SIZE * sizeof(st_entry_t)) */
166 #define MAXUL2SIZE	16
167 #else
168 #define MAXUL2SIZE	8
169 #endif
170 #define l2tobm(n)	(1U << (n))
171 #define bmtol2(n)	(ffs(n) - 1)
172 
173 /*
174  * Macros for speed
175  */
176 #define	PMAP_ACTIVATE(pmap, loadhw)					\
177 {									\
178 	if ((loadhw))							\
179 		loadustp(m68k_btop((paddr_t)(pmap)->pm_stpa));		\
180 }
181 
182 /*
183  * For each struct vm_page, there is a list of all currently valid virtual
184  * mappings of that page.  An entry is a pv_entry, the list is pv_table.
185  */
186 struct pv_entry {
187 	struct pv_entry	*pv_next;	/* next pv_entry */
188 	struct pmap	*pv_pmap;	/* pmap where mapping lies */
189 	vaddr_t		pv_va;		/* virtual address for mapping */
190 	st_entry_t	*pv_ptste;	/* non-zero if VA maps a PT page */
191 	struct pmap	*pv_ptpmap;	/* if pv_ptste, pmap for PT page */
192 };
193 
194 #define	active_pmap(pm) \
195 	((pm) == pmap_kernel() || (pm) == curproc->p_vmspace->vm_map.pmap)
196 #define	active_user_pmap(pm) \
197 	(curproc && \
198 	 (pm) != pmap_kernel() && (pm) == curproc->p_vmspace->vm_map.pmap)
199 
200 extern struct pv_header	*pv_table;	/* array of entries, one per page */
201 
202 #define	pmap_resident_count(pmap)	((pmap)->pm_stats.resident_count)
203 #define	pmap_wired_count(pmap)		((pmap)->pm_stats.wired_count)
204 
205 #define	pmap_update(pmap)		/* nothing (yet) */
206 
207 static __inline void
208 pmap_remove_all(struct pmap *pmap)
209 {
210 	/* Nothing. */
211 }
212 
213 extern paddr_t		Sysseg_pa;
214 extern st_entry_t	*Sysseg;
215 extern pt_entry_t	*Sysmap, *Sysptmap;
216 #define	SYSMAP_VA	VM_MAX_KERNEL_ADDRESS
217 extern vsize_t		Sysptsize;
218 extern vsize_t		mem_size;
219 extern vaddr_t		virtual_avail, virtual_end;
220 extern u_int		protection_codes[];
221 #if defined(M68040) || defined(M68060)
222 extern u_int		protostfree;
223 #endif
224 #ifdef CACHE_HAVE_VAC
225 extern u_int		pmap_aliasmask;
226 #endif
227 
228 extern char		*vmmap;		/* map for mem, dumps, etc. */
229 extern void		*CADDR1, *CADDR2;
230 extern void		*msgbufaddr;
231 
232 /* for lwp0 uarea initialization after MMU enabled */
233 extern vaddr_t		lwp0uarea;
234 void	pmap_bootstrap_finalize(void);
235 
236 vaddr_t	pmap_map(vaddr_t, paddr_t, paddr_t, int);
237 void	pmap_procwr(struct proc *, vaddr_t, size_t);
238 #define	PMAP_NEED_PROCWR
239 
240 #ifdef CACHE_HAVE_VAC
241 void	pmap_prefer(vaddr_t, vaddr_t *);
242 #define	PMAP_PREFER(foff, vap, sz, td)	pmap_prefer((foff), (vap))
243 #endif
244 
245 void	_pmap_set_page_cacheable(struct pmap *, vaddr_t);
246 void	_pmap_set_page_cacheinhibit(struct pmap *, vaddr_t);
247 int	_pmap_page_is_cacheable(struct pmap *, vaddr_t);
248 
249 #endif /* !_M68K_PMAP_MOTOROLA_H_ */
250