1 /* $NetBSD: fpu_subr.c,v 1.8 2005/12/24 20:07:15 perry Exp $ */ 2 3 /* 4 * Copyright (c) 1992, 1993 5 * The Regents of the University of California. All rights reserved. 6 * 7 * This software was developed by the Computer Systems Engineering group 8 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and 9 * contributed to Berkeley. 10 * 11 * All advertising materials mentioning features or use of this software 12 * must display the following acknowledgement: 13 * This product includes software developed by the University of 14 * California, Lawrence Berkeley Laboratory. 15 * 16 * Redistribution and use in source and binary forms, with or without 17 * modification, are permitted provided that the following conditions 18 * are met: 19 * 1. Redistributions of source code must retain the above copyright 20 * notice, this list of conditions and the following disclaimer. 21 * 2. Redistributions in binary form must reproduce the above copyright 22 * notice, this list of conditions and the following disclaimer in the 23 * documentation and/or other materials provided with the distribution. 24 * 3. Neither the name of the University nor the names of its contributors 25 * may be used to endorse or promote products derived from this software 26 * without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 29 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 30 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 31 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 32 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 37 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 38 * SUCH DAMAGE. 39 * 40 * @(#)fpu_subr.c 8.1 (Berkeley) 6/11/93 41 */ 42 43 /* 44 * FPU subroutines. 45 */ 46 47 #include <sys/cdefs.h> 48 __KERNEL_RCSID(0, "$NetBSD: fpu_subr.c,v 1.8 2005/12/24 20:07:15 perry Exp $"); 49 50 #include <sys/types.h> 51 #include <sys/systm.h> 52 53 #include <machine/reg.h> 54 55 #include "fpu_emulate.h" 56 #include "fpu_arith.h" 57 58 /* 59 * Shift the given number right rsh bits. Any bits that `fall off' will get 60 * shoved into the sticky field; we return the resulting sticky. Note that 61 * shifting NaNs is legal (this will never shift all bits out); a NaN's 62 * sticky field is ignored anyway. 63 */ 64 int 65 fpu_shr(register struct fpn *fp, register int rsh) 66 { 67 register u_int m0, m1, m2, s; 68 register int lsh; 69 70 #ifdef DIAGNOSTIC 71 if (rsh < 0 || (fp->fp_class != FPC_NUM && !ISNAN(fp))) 72 panic("fpu_rightshift 1"); 73 #endif 74 75 m0 = fp->fp_mant[0]; 76 m1 = fp->fp_mant[1]; 77 m2 = fp->fp_mant[2]; 78 79 /* If shifting all the bits out, take a shortcut. */ 80 if (rsh >= FP_NMANT) { 81 #ifdef DIAGNOSTIC 82 if ((m0 | m1 | m2) == 0) 83 panic("fpu_rightshift 2"); 84 #endif 85 fp->fp_mant[0] = 0; 86 fp->fp_mant[1] = 0; 87 fp->fp_mant[2] = 0; 88 #ifdef notdef 89 if ((m0 | m1 | m2) == 0) 90 fp->fp_class = FPC_ZERO; 91 else 92 #endif 93 fp->fp_sticky = 1; 94 return (1); 95 } 96 97 /* Squish out full words. */ 98 s = fp->fp_sticky; 99 if (rsh >= 32 * 2) { 100 s |= m2 | m1; 101 m2 = m0, m1 = 0, m0 = 0; 102 } else if (rsh >= 32) { 103 s |= m2; 104 m2 = m1, m1 = m0, m0 = 0; 105 } 106 107 /* Handle any remaining partial word. */ 108 if ((rsh &= 31) != 0) { 109 lsh = 32 - rsh; 110 s |= m2 << lsh; 111 m2 = (m2 >> rsh) | (m1 << lsh); 112 m1 = (m1 >> rsh) | (m0 << lsh); 113 m0 >>= rsh; 114 } 115 fp->fp_mant[0] = m0; 116 fp->fp_mant[1] = m1; 117 fp->fp_mant[2] = m2; 118 fp->fp_sticky = s; 119 return (s); 120 } 121 122 /* 123 * Force a number to be normal, i.e., make its fraction have all zero 124 * bits before FP_1, then FP_1, then all 1 bits. This is used for denorms 125 * and (sometimes) for intermediate results. 126 * 127 * Internally, this may use a `supernormal' -- a number whose fp_mant 128 * is greater than or equal to 2.0 -- so as a side effect you can hand it 129 * a supernormal and it will fix it (provided fp->fp_mant[2] == 0). 130 */ 131 void 132 fpu_norm(register struct fpn *fp) 133 { 134 register u_int m0, m1, m2, sup, nrm; 135 register int lsh, rsh, exp; 136 137 exp = fp->fp_exp; 138 m0 = fp->fp_mant[0]; 139 m1 = fp->fp_mant[1]; 140 m2 = fp->fp_mant[2]; 141 142 /* Handle severe subnormals with 32-bit moves. */ 143 if (m0 == 0) { 144 if (m1) { 145 m0 = m1; 146 m1 = m2; 147 m2 = 0; 148 exp -= 32; 149 } else if (m2) { 150 m0 = m2; 151 m1 = 0; 152 m2 = 0; 153 exp -= 2 * 32; 154 } else { 155 fp->fp_class = FPC_ZERO; 156 return; 157 } 158 } 159 160 /* Now fix any supernormal or remaining subnormal. */ 161 nrm = FP_1; 162 sup = nrm << 1; 163 if (m0 >= sup) { 164 /* 165 * We have a supernormal number. We need to shift it right. 166 * We may assume m2==0. 167 */ 168 __asm volatile("bfffo %1{#0:#32},%0" : "=d"(rsh) : "g"(m0)); 169 rsh = 31 - rsh - FP_LG; 170 exp += rsh; 171 lsh = 32 - rsh; 172 m2 = m1 << lsh; 173 m1 = (m1 >> rsh) | (m0 << lsh); 174 m0 = (m0 >> rsh); 175 } else if (m0 < nrm) { 176 /* 177 * We have a regular denorm (a subnormal number), and need 178 * to shift it left. 179 */ 180 __asm volatile("bfffo %1{#0:#32},%0" : "=d"(lsh) : "g"(m0)); 181 lsh = FP_LG - 31 + lsh; 182 exp -= lsh; 183 rsh = 32 - lsh; 184 m0 = (m0 << lsh) | (m1 >> rsh); 185 m1 = (m1 << lsh) | (m2 >> rsh); 186 m2 <<= lsh; 187 } 188 189 fp->fp_exp = exp; 190 fp->fp_mant[0] = m0; 191 fp->fp_mant[1] = m1; 192 fp->fp_mant[2] = m2; 193 } 194 195 /* 196 * Concoct a `fresh' Quiet NaN per Appendix N. 197 * As a side effect, we set OPERR for the current exceptions. 198 */ 199 struct fpn * 200 fpu_newnan(register struct fpemu *fe) 201 { 202 register struct fpn *fp; 203 204 fe->fe_fpsr |= FPSR_OPERR; 205 fp = &fe->fe_f3; 206 fp->fp_class = FPC_QNAN; 207 fp->fp_sign = 0; 208 fp->fp_mant[0] = FP_1 - 1; 209 fp->fp_mant[1] = fp->fp_mant[2] = ~0; 210 return (fp); 211 } 212