xref: /netbsd-src/sys/arch/m68k/fpe/fpu_mul.c (revision a93ea220fcb3e34cdfdcd4d7a5d391e0b2b4f2ba)
1 /*	$NetBSD: fpu_mul.c,v 1.3 2003/07/15 02:43:10 lukem Exp $ */
2 
3 /*
4  * Copyright (c) 1992, 1993
5  *	The Regents of the University of California.  All rights reserved.
6  *
7  * This software was developed by the Computer Systems Engineering group
8  * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
9  * contributed to Berkeley.
10  *
11  * All advertising materials mentioning features or use of this software
12  * must display the following acknowledgement:
13  *	This product includes software developed by the University of
14  *	California, Lawrence Berkeley Laboratory.
15  *
16  * Redistribution and use in source and binary forms, with or without
17  * modification, are permitted provided that the following conditions
18  * are met:
19  * 1. Redistributions of source code must retain the above copyright
20  *    notice, this list of conditions and the following disclaimer.
21  * 2. Redistributions in binary form must reproduce the above copyright
22  *    notice, this list of conditions and the following disclaimer in the
23  *    documentation and/or other materials provided with the distribution.
24  * 3. All advertising materials mentioning features or use of this software
25  *    must display the following acknowledgement:
26  *	This product includes software developed by the University of
27  *	California, Berkeley and its contributors.
28  * 4. Neither the name of the University nor the names of its contributors
29  *    may be used to endorse or promote products derived from this software
30  *    without specific prior written permission.
31  *
32  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
33  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
34  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
35  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
36  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
37  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
38  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
39  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
40  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
41  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
42  * SUCH DAMAGE.
43  *
44  *	@(#)fpu_mul.c	8.1 (Berkeley) 6/11/93
45  */
46 
47 /*
48  * Perform an FPU multiply (return x * y).
49  */
50 
51 #include <sys/cdefs.h>
52 __KERNEL_RCSID(0, "$NetBSD: fpu_mul.c,v 1.3 2003/07/15 02:43:10 lukem Exp $");
53 
54 #include <sys/types.h>
55 
56 #include <machine/reg.h>
57 
58 #include "fpu_arith.h"
59 #include "fpu_emulate.h"
60 
61 /*
62  * The multiplication algorithm for normal numbers is as follows:
63  *
64  * The fraction of the product is built in the usual stepwise fashion.
65  * Each step consists of shifting the accumulator right one bit
66  * (maintaining any guard bits) and, if the next bit in y is set,
67  * adding the multiplicand (x) to the accumulator.  Then, in any case,
68  * we advance one bit leftward in y.  Algorithmically:
69  *
70  *	A = 0;
71  *	for (bit = 0; bit < FP_NMANT; bit++) {
72  *		sticky |= A & 1, A >>= 1;
73  *		if (Y & (1 << bit))
74  *			A += X;
75  *	}
76  *
77  * (X and Y here represent the mantissas of x and y respectively.)
78  * The resultant accumulator (A) is the product's mantissa.  It may
79  * be as large as 11.11111... in binary and hence may need to be
80  * shifted right, but at most one bit.
81  *
82  * Since we do not have efficient multiword arithmetic, we code the
83  * accumulator as four separate words, just like any other mantissa.
84  * We use local `register' variables in the hope that this is faster
85  * than memory.  We keep x->fp_mant in locals for the same reason.
86  *
87  * In the algorithm above, the bits in y are inspected one at a time.
88  * We will pick them up 32 at a time and then deal with those 32, one
89  * at a time.  Note, however, that we know several things about y:
90  *
91  *    - the guard and round bits at the bottom are sure to be zero;
92  *
93  *    - often many low bits are zero (y is often from a single or double
94  *	precision source);
95  *
96  *    - bit FP_NMANT-1 is set, and FP_1*2 fits in a word.
97  *
98  * We can also test for 32-zero-bits swiftly.  In this case, the center
99  * part of the loop---setting sticky, shifting A, and not adding---will
100  * run 32 times without adding X to A.  We can do a 32-bit shift faster
101  * by simply moving words.  Since zeros are common, we optimize this case.
102  * Furthermore, since A is initially zero, we can omit the shift as well
103  * until we reach a nonzero word.
104  */
105 struct fpn *
106 fpu_mul(fe)
107 	register struct fpemu *fe;
108 {
109 	register struct fpn *x = &fe->fe_f1, *y = &fe->fe_f2;
110 	register u_int a2, a1, a0, x2, x1, x0, bit, m;
111 	register int sticky;
112 	FPU_DECL_CARRY
113 
114 	/*
115 	 * Put the `heavier' operand on the right (see fpu_emu.h).
116 	 * Then we will have one of the following cases, taken in the
117 	 * following order:
118 	 *
119 	 *  - y = NaN.  Implied: if only one is a signalling NaN, y is.
120 	 *	The result is y.
121 	 *  - y = Inf.  Implied: x != NaN (is 0, number, or Inf: the NaN
122 	 *    case was taken care of earlier).
123 	 *	If x = 0, the result is NaN.  Otherwise the result
124 	 *	is y, with its sign reversed if x is negative.
125 	 *  - x = 0.  Implied: y is 0 or number.
126 	 *	The result is 0 (with XORed sign as usual).
127 	 *  - other.  Implied: both x and y are numbers.
128 	 *	The result is x * y (XOR sign, multiply bits, add exponents).
129 	 */
130 	ORDER(x, y);
131 	if (ISNAN(y)) {
132 		y->fp_sign ^= x->fp_sign;
133 		return (y);
134 	}
135 	if (ISINF(y)) {
136 		if (ISZERO(x))
137 			return (fpu_newnan(fe));
138 		y->fp_sign ^= x->fp_sign;
139 		return (y);
140 	}
141 	if (ISZERO(x)) {
142 		x->fp_sign ^= y->fp_sign;
143 		return (x);
144 	}
145 
146 	/*
147 	 * Setup.  In the code below, the mask `m' will hold the current
148 	 * mantissa byte from y.  The variable `bit' denotes the bit
149 	 * within m.  We also define some macros to deal with everything.
150 	 */
151 	x2 = x->fp_mant[2];
152 	x1 = x->fp_mant[1];
153 	x0 = x->fp_mant[0];
154 	sticky = a2 = a1 = a0 = 0;
155 
156 #define	ADD	/* A += X */ \
157 	FPU_ADDS(a2, a2, x2); \
158 	FPU_ADDCS(a1, a1, x1); \
159 	FPU_ADDC(a0, a0, x0)
160 
161 #define	SHR1	/* A >>= 1, with sticky */ \
162 	sticky |= a2 & 1, \
163 	a2 = (a2 >> 1) | (a1 << 31), a1 = (a1 >> 1) | (a0 << 31), a0 >>= 1
164 
165 #define	SHR32	/* A >>= 32, with sticky */ \
166 	sticky |= a2, a2 = a1, a1 = a0, a0 = 0
167 
168 #define	STEP	/* each 1-bit step of the multiplication */ \
169 	SHR1; if (bit & m) { ADD; }; bit <<= 1
170 
171 	/*
172 	 * We are ready to begin.  The multiply loop runs once for each
173 	 * of the four 32-bit words.  Some words, however, are special.
174 	 * As noted above, the low order bits of Y are often zero.  Even
175 	 * if not, the first loop can certainly skip the guard bits.
176 	 * The last word of y has its highest 1-bit in position FP_NMANT-1,
177 	 * so we stop the loop when we move past that bit.
178 	 */
179 	if ((m = y->fp_mant[2]) == 0) {
180 		/* SHR32; */			/* unneeded since A==0 */
181 	} else {
182 		bit = 1 << FP_NG;
183 		do {
184 			STEP;
185 		} while (bit != 0);
186 	}
187 	if ((m = y->fp_mant[1]) == 0) {
188 		SHR32;
189 	} else {
190 		bit = 1;
191 		do {
192 			STEP;
193 		} while (bit != 0);
194 	}
195 	m = y->fp_mant[0];		/* definitely != 0 */
196 	bit = 1;
197 	do {
198 		STEP;
199 	} while (bit <= m);
200 
201 	/*
202 	 * Done with mantissa calculation.  Get exponent and handle
203 	 * 11.111...1 case, then put result in place.  We reuse x since
204 	 * it already has the right class (FP_NUM).
205 	 */
206 	m = x->fp_exp + y->fp_exp;
207 	if (a0 >= FP_2) {
208 		SHR1;
209 		m++;
210 	}
211 	x->fp_sign ^= y->fp_sign;
212 	x->fp_exp = m;
213 	x->fp_sticky = sticky;
214 	x->fp_mant[2] = a2;
215 	x->fp_mant[1] = a1;
216 	x->fp_mant[0] = a0;
217 	return (x);
218 }
219