1 /* $NetBSD: bus.h,v 1.10 2009/03/14 14:46:01 dsl Exp $ */ 2 3 /*- 4 * Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 /* 34 * Copyright (C) 1997 Scott Reynolds. All rights reserved. 35 * 36 * Redistribution and use in source and binary forms, with or without 37 * modification, are permitted provided that the following conditions 38 * are met: 39 * 1. Redistributions of source code must retain the above copyright 40 * notice, this list of conditions and the following disclaimer. 41 * 2. Redistributions in binary form must reproduce the above copyright 42 * notice, this list of conditions and the following disclaimer in the 43 * documentation and/or other materials provided with the distribution. 44 * 3. The name of the author may not be used to endorse or promote products 45 * derived from this software without specific prior written permission 46 * 47 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 48 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 49 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 50 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 51 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 52 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 53 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 54 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 55 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 56 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 57 */ 58 59 #ifndef _MACHINE_BUS_H_ 60 #define _MACHINE_BUS_H_ 61 62 /* 63 * Value for the luna68k bus space tag, not to be used directly by MI code. 64 */ 65 #define MACHINE_BUS_SPACE_MEM 0 /* space is mem space */ 66 67 /* 68 * Bus address and size types 69 */ 70 typedef u_long bus_addr_t; 71 typedef u_long bus_size_t; 72 73 /* 74 * Access methods for bus resources and address space. 75 */ 76 typedef int bus_space_tag_t; 77 typedef u_long bus_space_handle_t; 78 79 /* 80 * int bus_space_map(bus_space_tag_t t, bus_addr_t addr, 81 * bus_size_t size, int flags, bus_space_handle_t *bshp); 82 * 83 * Map a region of bus space. 84 */ 85 86 #define BUS_SPACE_MAP_CACHEABLE 0x01 87 #define BUS_SPACE_MAP_LINEAR 0x02 88 #define BUS_SPACE_MAP_PREFETCHABLE 0x04 89 90 int bus_space_map(bus_space_tag_t, bus_addr_t, bus_size_t, 91 int, bus_space_handle_t *); 92 93 /* 94 * void bus_space_unmap(bus_space_tag_t t, 95 * bus_space_handle_t bsh, bus_size_t size); 96 * 97 * Unmap a region of bus space. 98 */ 99 100 void bus_space_unmap(bus_space_tag_t, bus_space_handle_t, bus_size_t); 101 102 /* 103 * int bus_space_subregion(bus_space_tag_t t, 104 * bus_space_handle_t bsh, bus_size_t offset, bus_size_t size, 105 * bus_space_handle_t *nbshp); 106 * 107 * Get a new handle for a subregion of an already-mapped area of bus space. 108 */ 109 110 int bus_space_subregion(bus_space_tag_t t, bus_space_handle_t bsh, 111 bus_size_t offset, bus_size_t size, bus_space_handle_t *nbshp); 112 113 /* 114 * int bus_space_alloc(bus_space_tag_t t, bus_addr_t, rstart, 115 * bus_addr_t rend, bus_size_t size, bus_size_t align, 116 * bus_size_t boundary, int flags, bus_addr_t *addrp, 117 * bus_space_handle_t *bshp); 118 * 119 * Allocate a region of bus space. 120 */ 121 122 int bus_space_alloc(bus_space_tag_t t, bus_addr_t rstart, 123 bus_addr_t rend, bus_size_t size, bus_size_t align, 124 bus_size_t boundary, int cacheable, bus_addr_t *addrp, 125 bus_space_handle_t *bshp); 126 127 /* 128 * int bus_space_free(bus_space_tag_t t, 129 * bus_space_handle_t bsh, bus_size_t size); 130 * 131 * Free a region of bus space. 132 */ 133 134 void bus_space_free(bus_space_tag_t t, bus_space_handle_t bsh, 135 bus_size_t size); 136 137 /* 138 * u_intN_t bus_space_read_N(bus_space_tag_t tag, 139 * bus_space_handle_t bsh, bus_size_t offset); 140 * 141 * Read a 1, 2, 4, or 8 byte quantity from bus space 142 * described by tag/handle/offset. 143 */ 144 145 #define bus_space_read_1(t, h, o) \ 146 ((void) t, (*(volatile u_int8_t *)((h) + 4*(o)))) 147 148 #define bus_space_read_2(t, h, o) \ 149 ((void) t, (*(volatile u_int16_t *)((h) + 4*(o)))) 150 151 #define bus_space_read_4(t, h, o) \ 152 ((void) t, (*(volatile u_int32_t *)((h) + 4*(o)))) 153 154 #if 0 /* Cause a link error for bus_space_read_8 */ 155 #define bus_space_read_8(t, h, o) !!! bus_space_read_8 unimplemented !!! 156 #endif 157 158 /* 159 * void bus_space_read_multi_N(bus_space_tag_t tag, 160 * bus_space_handle_t bsh, bus_size_t offset, 161 * u_intN_t *addr, size_t count); 162 * 163 * Read `count' 1, 2, 4, or 8 byte quantities from bus space 164 * described by tag/handle/offset and copy into buffer provided. 165 */ 166 167 #define bus_space_read_multi_1(t, h, o, a, c) do { \ 168 (void) t; \ 169 __asm volatile (" \ 170 movl %0,%%a0 ; \ 171 movl %1,%%a1 ; \ 172 movl %2,%%d0 ; \ 173 1: movb %%a0@,%%a1@+ ; \ 174 subql #1,%%d0 ; \ 175 jne 1b" : \ 176 : \ 177 "r" ((h) + (o)), "g" (a), "g" ((size_t)(c)) : \ 178 "a0","a1","d0"); \ 179 } while (0) 180 181 #define bus_space_read_multi_2(t, h, o, a, c) do { \ 182 (void) t; \ 183 __asm volatile (" \ 184 movl %0,%%a0 ; \ 185 movl %1,%%a1 ; \ 186 movl %2,%%d0 ; \ 187 1: movw %%a0@,%%a1@+ ; \ 188 subql #1,%%d0 ; \ 189 jne 1b" : \ 190 : \ 191 "r" ((h) + (o)), "g" (a), "g" ((size_t)(c)) : \ 192 "a0","a1","d0"); \ 193 } while (0) 194 195 #define bus_space_read_multi_4(t, h, o, a, c) do { \ 196 (void) t; \ 197 __asm volatile (" \ 198 movl %0,%%a0 ; \ 199 movl %1,%%a1 ; \ 200 movl %2,%%d0 ; \ 201 1: movl %%a0@,%%a1@+ ; \ 202 subql #1,%%d0 ; \ 203 jne 1b" : \ 204 : \ 205 "r" ((h) + (o)), "g" (a), "g" ((size_t)(c)) : \ 206 "a0","a1","d0"); \ 207 } while (0) 208 209 #if 0 /* Cause a link error for bus_space_read_multi_8 */ 210 #define bus_space_read_multi_8 !!! bus_space_read_multi_8 unimplemented !!! 211 #endif 212 213 /* 214 * void bus_space_read_region_N(bus_space_tag_t tag, 215 * bus_space_handle_t bsh, bus_size_t offset, 216 * u_intN_t *addr, size_t count); 217 * 218 * Read `count' 1, 2, 4, or 8 byte quantities from bus space 219 * described by tag/handle and starting at `offset' and copy into 220 * buffer provided. 221 */ 222 223 #define bus_space_read_region_1(t, h, o, a, c) do { \ 224 (void) t; \ 225 __asm volatile (" \ 226 movl %0,%%a0 ; \ 227 movl %1,%%a1 ; \ 228 movl %2,%%d0 ; \ 229 1: movb %%a0@+,%%a1@+ ; \ 230 subql #1,%%d0 ; \ 231 jne 1b" : \ 232 : \ 233 "r" ((h) + (o)), "g" (a), "g" ((size_t)(c)) : \ 234 "a0","a1","d0"); \ 235 } while (0) 236 237 #define bus_space_read_region_2(t, h, o, a, c) do { \ 238 (void) t; \ 239 __asm volatile (" \ 240 movl %0,%%a0 ; \ 241 movl %1,%%a1 ; \ 242 movl %2,%%d0 ; \ 243 1: movw %%a0@+,%%a1@+ ; \ 244 subql #1,%%d0 ; \ 245 jne 1b" : \ 246 : \ 247 "r" ((h) + (o)), "g" (a), "g" ((size_t)(c)) : \ 248 "a0","a1","d0"); \ 249 } while (0) 250 251 #define bus_space_read_region_4(t, h, o, a, c) do { \ 252 (void) t; \ 253 __asm volatile (" \ 254 movl %0,%%a0 ; \ 255 movl %1,%%a1 ; \ 256 movl %2,%%d0 ; \ 257 1: movl %%a0@+,%%a1@+ ; \ 258 subql #1,%%d0 ; \ 259 jne 1b" : \ 260 : \ 261 "r" ((h) + (o)), "g" (a), "g" ((size_t)(c)) : \ 262 "a0","a1","d0"); \ 263 } while (0) 264 265 #if 0 /* Cause a link error for bus_space_read_region_8 */ 266 #define bus_space_read_region_8 !!! bus_space_read_region_8 unimplemented !!! 267 #endif 268 269 /* 270 * void bus_space_write_N(bus_space_tag_t tag, 271 * bus_space_handle_t bsh, bus_size_t offset, 272 * u_intN_t value); 273 * 274 * Write the 1, 2, 4, or 8 byte value `value' to bus space 275 * described by tag/handle/offset. 276 */ 277 278 #define bus_space_write_1(t, h, o, v) \ 279 ((void) t, ((void)(*(volatile u_int8_t *)((h) + 4*(o)) = (v)))) 280 281 #define bus_space_write_2(t, h, o, v) \ 282 ((void) t, ((void)(*(volatile u_int16_t *)((h) + 4*(o)) = (v)))) 283 284 #define bus_space_write_4(t, h, o, v) \ 285 ((void) t, ((void)(*(volatile u_int32_t *)((h) + 4*(o)) = (v)))) 286 287 #if 0 /* Cause a link error for bus_space_write_8 */ 288 #define bus_space_write_8 !!! bus_space_write_8 not implemented !!! 289 #endif 290 291 /* 292 * void bus_space_write_multi_N(bus_space_tag_t tag, 293 * bus_space_handle_t bsh, bus_size_t offset, 294 * const u_intN_t *addr, size_t count); 295 * 296 * Write `count' 1, 2, 4, or 8 byte quantities from the buffer 297 * provided to bus space described by tag/handle/offset. 298 */ 299 300 #define bus_space_write_multi_1(t, h, o, a, c) do { \ 301 (void) t; \ 302 __asm volatile (" \ 303 movl %0,%%a0 ; \ 304 movl %1,%%a1 ; \ 305 movl %2,%%d0 ; \ 306 1: movb %%a1@+,%%a0@ ; \ 307 subql #1,%%d0 ; \ 308 jne 1b" : \ 309 : \ 310 "r" ((h) + (o)), "g" (a), "g" ((size_t)(c)) : \ 311 "a0","a1","d0"); \ 312 } while (0) 313 314 #define bus_space_write_multi_2(t, h, o, a, c) do { \ 315 (void) t; \ 316 __asm volatile (" \ 317 movl %0,%%a0 ; \ 318 movl %1,%%a1 ; \ 319 movl %2,%%d0 ; \ 320 1: movw %%a1@+,%%a0@ ; \ 321 subql #1,%%d0 ; \ 322 jne 1b" : \ 323 : \ 324 "r" ((h) + (o)), "g" (a), "g" ((size_t)(c)) : \ 325 "a0","a1","d0"); \ 326 } while (0) 327 328 #define bus_space_write_multi_4(t, h, o, a, c) do { \ 329 (void) t; \ 330 __asm volatile (" \ 331 movl %0,%%a0 ; \ 332 movl %1,%%a1 ; \ 333 movl %2,%%d0 ; \ 334 1: movl %%a1@+,%%a0@ ; \ 335 subql #1,%%d0 ; \ 336 jne 1b" : \ 337 : \ 338 "r" ((h) + (o)), "g" (a), "g" ((size_t)(c)) : \ 339 "a0","a1","d0"); \ 340 } while (0) 341 342 #if 0 /* Cause a link error for bus_space_write_8 */ 343 #define bus_space_write_multi_8(t, h, o, a, c) \ 344 !!! bus_space_write_multi_8 unimplimented !!! 345 #endif 346 347 /* 348 * void bus_space_write_region_N(bus_space_tag_t tag, 349 * bus_space_handle_t bsh, bus_size_t offset, 350 * const u_intN_t *addr, size_t count); 351 * 352 * Write `count' 1, 2, 4, or 8 byte quantities from the buffer provided 353 * to bus space described by tag/handle starting at `offset'. 354 */ 355 356 #define bus_space_write_region_1(t, h, o, a, c) do { \ 357 (void) t; \ 358 __asm volatile (" \ 359 movl %0,%%a0 ; \ 360 movl %1,%%a1 ; \ 361 movl %2,%%d0 ; \ 362 1: movb %%a1@+,%%a0@+ ; \ 363 subql #1,%%d0 ; \ 364 jne 1b" : \ 365 : \ 366 "r" ((h) + (o)), "g" (a), "g" ((size_t)(c)) : \ 367 "a0","a1","d0"); \ 368 } while (0) 369 370 #define bus_space_write_region_2(t, h, o, a, c) do { \ 371 (void) t; \ 372 __asm volatile (" \ 373 movl %0,%%a0 ; \ 374 movl %1,%%a1 ; \ 375 movl %2,%%d0 ; \ 376 1: movw %%a1@+,%%a0@+ ; \ 377 subql #1,%%d0 ; \ 378 jne 1b" : \ 379 : \ 380 "r" ((h) + (o)), "g" (a), "g" ((size_t)(c)) : \ 381 "a0","a1","d0"); \ 382 } while (0) 383 384 #define bus_space_write_region_4(t, h, o, a, c) do { \ 385 (void) t; \ 386 __asm volatile (" \ 387 movl %0,%%a0 ; \ 388 movl %1,%%a1 ; \ 389 movl %2,%%d0 ; \ 390 1: movl %%a1@+,%%a0@+ ; \ 391 subql #1,%%d0 ; \ 392 jne 1b" : \ 393 : \ 394 "r" ((h) + (o)), "g" (a), "g" ((size_t)(c)) : \ 395 "a0","a1","d0"); \ 396 } while (0) 397 398 #if 0 /* Cause a link error for bus_space_write_region_8 */ 399 #define bus_space_write_region_8 \ 400 !!! bus_space_write_region_8 unimplemented !!! 401 #endif 402 403 /* 404 * void bus_space_set_multi_N(bus_space_tag_t tag, 405 * bus_space_handle_t bsh, bus_size_t offset, u_intN_t val, 406 * size_t count); 407 * 408 * Write the 1, 2, 4, or 8 byte value `val' to bus space described 409 * by tag/handle/offset `count' times. 410 */ 411 412 #define bus_space_set_multi_1(t, h, o, val, c) do { \ 413 (void) t; \ 414 __asm volatile (" \ 415 movl %0,%%a0 ; \ 416 movl %1,%%d1 ; \ 417 movl %2,%%d0 ; \ 418 1: movb %%d1,%%a0@ ; \ 419 subql #1,%%d0 ; \ 420 jne 1b" : \ 421 : \ 422 "r" ((h)+(o)), "g" ((u_long)val), \ 423 "g" ((size_t)(c)) : \ 424 "a0","d0","d1"); \ 425 } while (0) 426 427 #define bus_space_set_multi_2(t, h, o, val, c) do { \ 428 (void) t; \ 429 __asm volatile (" \ 430 movl %0,%%a0 ; \ 431 movl %1,%%d1 ; \ 432 movl %2,%%d0 ; \ 433 1: movw %%d1,%%a0@ ; \ 434 subql #1,%%d0 ; \ 435 jne 1b" : \ 436 : \ 437 "r" ((h)+(o)), "g" ((u_long)val), \ 438 "g" ((size_t)(c)) : \ 439 "a0","d0","d1"); \ 440 } while (0) 441 442 #define bus_space_set_multi_4(t, h, o, val, c) do { \ 443 (void) t; \ 444 __asm volatile (" \ 445 movl %0,%%a0 ; \ 446 movl %1,%%d1 ; \ 447 movl %2,%%d0 ; \ 448 1: movl %%d1,%%a0@ ; \ 449 subql #1,%%d0 ; \ 450 jne 1b" : \ 451 : \ 452 "r" ((h)+(o)), "g" ((u_long)val), \ 453 "g" ((size_t)(c)) : \ 454 "a0","d0","d1"); \ 455 } while (0) 456 457 #if 0 /* Cause a link error for bus_space_set_multi_8 */ 458 #define bus_space_set_multi_8 \ 459 !!! bus_space_set_multi_8 unimplemented !!! 460 #endif 461 462 /* 463 * void bus_space_set_region_N(bus_space_tag_t tag, 464 * bus_space_handle_t bsh, bus_size_t offset, u_intN_t val, 465 * size_t count); 466 * 467 * Write `count' 1, 2, 4, or 8 byte value `val' to bus space described 468 * by tag/handle starting at `offset'. 469 */ 470 471 #define bus_space_set_region_1(t, h, o, val, c) do { \ 472 (void) t; \ 473 __asm volatile (" \ 474 movl %0,%%a0 ; \ 475 movl %1,%%d1 ; \ 476 movl %2,%%d0 ; \ 477 1: movb %%d1,%%a0@+ ; \ 478 subql #1,%%d0 ; \ 479 jne 1b" : \ 480 : \ 481 "r" ((h)+(o)), "g" ((u_long)val), \ 482 "g" ((size_t)(c)) : \ 483 "a0","d0","d1"); \ 484 } while (0) 485 486 #define bus_space_set_region_2(t, h, o, val, c) do { \ 487 (void) t; \ 488 __asm volatile (" \ 489 movl %0,%%a0 ; \ 490 movl %1,%%d1 ; \ 491 movl %2,%%d0 ; \ 492 1: movw %%d1,%%a0@+ ; \ 493 subql #1,%%d0 ; \ 494 jne 1b" : \ 495 : \ 496 "r" ((h)+(o)), "g" ((u_long)val), \ 497 "g" ((size_t)(c)) : \ 498 "a0","d0","d1"); \ 499 } while (0) 500 501 #define bus_space_set_region_4(t, h, o, val, c) do { \ 502 (void) t; \ 503 __asm volatile (" \ 504 movl %0,%%a0 ; \ 505 movl %1,%%d1 ; \ 506 movl %2,%%d0 ; \ 507 1: movl %%d1,%%a0@+ ; \ 508 subql #1,%%d0 ; \ 509 jne 1b" : \ 510 : \ 511 "r" ((h)+(o)), "g" ((u_long)val), \ 512 "g" ((size_t)(c)) : \ 513 "a0","d0","d1"); \ 514 } while (0) 515 516 #if 0 /* Cause a link error for bus_space_set_region_8 */ 517 #define bus_space_set_region_8 \ 518 !!! bus_space_set_region_8 unimplemented !!! 519 #endif 520 521 /* 522 * void bus_space_copy_N(bus_space_tag_t tag, 523 * bus_space_handle_t bsh1, bus_size_t off1, 524 * bus_space_handle_t bsh2, bus_size_t off2, 525 * size_t count); 526 * 527 * Copy `count' 1, 2, 4, or 8 byte values from bus space starting 528 * at tag/bsh1/off1 to bus space starting at tag/bsh2/off2. 529 */ 530 531 #define __MACHINE_copy_region_N(BYTES) \ 532 static __inline void __CONCAT(bus_space_copy_region_,BYTES) \ 533 (bus_space_tag_t, \ 534 bus_space_handle_t bsh1, bus_size_t off1, \ 535 bus_space_handle_t bsh2, bus_size_t off2, \ 536 bus_size_t count); \ 537 \ 538 static __inline void \ 539 __CONCAT(bus_space_copy_region_,BYTES)(t, h1, o1, h2, o2, c) \ 540 bus_space_tag_t t; \ 541 bus_space_handle_t h1, h2; \ 542 bus_size_t o1, o2, c; \ 543 { \ 544 bus_size_t o; \ 545 \ 546 if ((h1 + o1) >= (h2 + o2)) { \ 547 /* src after dest: copy forward */ \ 548 for (o = 0; c != 0; c--, o += BYTES) \ 549 __CONCAT(bus_space_write_,BYTES)(t, h2, o2 + o, \ 550 __CONCAT(bus_space_read_,BYTES)(t, h1, o1 + o)); \ 551 } else { \ 552 /* dest after src: copy backwards */ \ 553 for (o = (c - 1) * BYTES; c != 0; c--, o -= BYTES) \ 554 __CONCAT(bus_space_write_,BYTES)(t, h2, o2 + o, \ 555 __CONCAT(bus_space_read_,BYTES)(t, h1, o1 + o)); \ 556 } \ 557 } 558 __MACHINE_copy_region_N(1) 559 __MACHINE_copy_region_N(2) 560 __MACHINE_copy_region_N(4) 561 #if 0 /* Cause a link error for bus_space_copy_8 */ 562 #define bus_space_copy_8 \ 563 !!! bus_space_copy_8 unimplemented !!! 564 #endif 565 566 #undef __MACHINE_copy_region_N 567 568 /* 569 * Bus read/write barrier methods. 570 * 571 * void bus_space_barrier(bus_space_tag_t tag, 572 * bus_space_handle_t bsh, bus_size_t offset, 573 * bus_size_t len, int flags); 574 * 575 * Note: the 680x0 does not currently require barriers, but we must 576 * provide the flags to MI code. 577 */ 578 #define bus_space_barrier(t, h, o, l, f) \ 579 ((void)((void)(t), (void)(h), (void)(o), (void)(l), (void)(f))) 580 #define BUS_SPACE_BARRIER_READ 0x01 /* force read barrier */ 581 #define BUS_SPACE_BARRIER_WRITE 0x02 /* force write barrier */ 582 583 #define BUS_SPACE_ALIGNED_POINTER(p, t) ALIGNED_POINTER(p, t) 584 585 #endif /* _MACHINE_BUS_H_ */ 586