1 /* $NetBSD: bus_defs.h,v 1.1 2011/07/01 17:10:00 dyoung Exp $ */ 2 3 /*- 4 * Copyright (c) 1996, 1997 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 /* 34 * Copyright (c) 1996 Charles M. Hannum. All rights reserved. 35 * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved. 36 * 37 * Redistribution and use in source and binary forms, with or without 38 * modification, are permitted provided that the following conditions 39 * are met: 40 * 1. Redistributions of source code must retain the above copyright 41 * notice, this list of conditions and the following disclaimer. 42 * 2. Redistributions in binary form must reproduce the above copyright 43 * notice, this list of conditions and the following disclaimer in the 44 * documentation and/or other materials provided with the distribution. 45 * 3. All advertising materials mentioning features or use of this software 46 * must display the following acknowledgement: 47 * This product includes software developed by Christopher G. Demetriou 48 * for the NetBSD Project. 49 * 4. The name of the author may not be used to endorse or promote products 50 * derived from this software without specific prior written permission 51 * 52 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 53 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 54 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 55 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 56 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 57 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 58 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 59 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 60 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 61 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 62 */ 63 64 #ifndef _LANDISK_BUS_DEFS_H_ 65 #define _LANDISK_BUS_DEFS_H_ 66 67 #include <sys/types.h> 68 69 #ifdef _KERNEL 70 typedef u_long bus_addr_t; 71 typedef u_long bus_size_t; 72 73 typedef struct _bus_space *bus_space_tag_t; 74 typedef u_long bus_space_handle_t; 75 76 /* 77 * Turn on BUS_SPACE_DEBUG if the global DEBUG option is enabled. 78 */ 79 #if defined(DEBUG) && !defined(BUS_SPACE_DEBUG) 80 #define BUS_SPACE_DEBUG 81 #endif 82 83 #ifdef BUS_SPACE_DEBUG 84 #include <sys/systm.h> /* for printf() prototype */ 85 /* 86 * Macros for checking the aligned-ness of pointers passed to bus 87 * space ops. Strict alignment is required by the Alpha architecture, 88 * and a trap will occur if unaligned access is performed. These 89 * may aid in the debugging of a broken device driver by displaying 90 * useful information about the problem. 91 */ 92 #define __BUS_SPACE_ALIGNED_ADDRESS(p, t) \ 93 ((((u_long)(p)) & (sizeof(t)-1)) == 0) 94 95 #define __BUS_SPACE_ADDRESS_SANITY(p, t, d) \ 96 ({ \ 97 if (__BUS_SPACE_ALIGNED_ADDRESS((p), t) == 0) { \ 98 printf("%s 0x%lx not aligned to %lu bytes %s:%d\n", \ 99 d, (u_long)(p), (u_long)sizeof(t), __FILE__, __LINE__); \ 100 } \ 101 (void) 0; \ 102 }) 103 104 #define BUS_SPACE_ALIGNED_POINTER(p, t) __BUS_SPACE_ALIGNED_ADDRESS(p, t) 105 #else 106 #define __BUS_SPACE_ADDRESS_SANITY(p, t, d) (void) 0 107 #define BUS_SPACE_ALIGNED_POINTER(p, t) ALIGNED_POINTER(p, t) 108 #endif /* BUS_SPACE_DEBUG */ 109 #endif /* _KERNEL */ 110 111 struct _bus_space { 112 /* cookie */ 113 void *bs_cookie; 114 115 /* mapping/unmapping */ 116 int (*bs_map)(void *, bus_addr_t, bus_size_t, 117 int, bus_space_handle_t *); 118 void (*bs_unmap)(void *, bus_space_handle_t, 119 bus_size_t); 120 int (*bs_subregion)(void *, bus_space_handle_t, 121 bus_size_t, bus_size_t, bus_space_handle_t *); 122 123 /* allocation/deallocation */ 124 int (*bs_alloc)(void *, bus_addr_t, bus_addr_t, 125 bus_size_t, bus_size_t, bus_size_t, int, 126 bus_addr_t *, bus_space_handle_t *); 127 void (*bs_free)(void *, bus_space_handle_t, 128 bus_size_t); 129 130 /* get kernel virtual address */ 131 void * (*bs_vaddr)(void *, bus_space_handle_t); 132 133 /* mmap bus space for user */ 134 paddr_t (*bs_mmap)(void *, bus_addr_t, off_t, int, int); 135 136 /* read (single) */ 137 uint8_t (*bs_r_1)(void *, bus_space_handle_t, 138 bus_size_t); 139 uint16_t (*bs_r_2)(void *, bus_space_handle_t, 140 bus_size_t); 141 uint32_t (*bs_r_4)(void *, bus_space_handle_t, 142 bus_size_t); 143 uint64_t (*bs_r_8)(void *, bus_space_handle_t, 144 bus_size_t); 145 146 /* read multiple */ 147 void (*bs_rm_1)(void *, bus_space_handle_t, 148 bus_size_t, uint8_t *, bus_size_t); 149 void (*bs_rm_2)(void *, bus_space_handle_t, 150 bus_size_t, uint16_t *, bus_size_t); 151 void (*bs_rm_4)(void *, bus_space_handle_t, 152 bus_size_t, uint32_t *, bus_size_t); 153 void (*bs_rm_8)(void *, bus_space_handle_t, 154 bus_size_t, uint64_t *, bus_size_t); 155 156 /* read region */ 157 void (*bs_rr_1)(void *, bus_space_handle_t, 158 bus_size_t, uint8_t *, bus_size_t); 159 void (*bs_rr_2)(void *, bus_space_handle_t, 160 bus_size_t, uint16_t *, bus_size_t); 161 void (*bs_rr_4)(void *, bus_space_handle_t, 162 bus_size_t, uint32_t *, bus_size_t); 163 void (*bs_rr_8)(void *, bus_space_handle_t, 164 bus_size_t, uint64_t *, bus_size_t); 165 166 /* write (single) */ 167 void (*bs_w_1)(void *, bus_space_handle_t, 168 bus_size_t, uint8_t); 169 void (*bs_w_2)(void *, bus_space_handle_t, 170 bus_size_t, uint16_t); 171 void (*bs_w_4)(void *, bus_space_handle_t, 172 bus_size_t, uint32_t); 173 void (*bs_w_8)(void *, bus_space_handle_t, 174 bus_size_t, uint64_t); 175 176 /* write multiple */ 177 void (*bs_wm_1)(void *, bus_space_handle_t, 178 bus_size_t, const uint8_t *, bus_size_t); 179 void (*bs_wm_2)(void *, bus_space_handle_t, 180 bus_size_t, const uint16_t *, bus_size_t); 181 void (*bs_wm_4)(void *, bus_space_handle_t, 182 bus_size_t, const uint32_t *, bus_size_t); 183 void (*bs_wm_8)(void *, bus_space_handle_t, 184 bus_size_t, const uint64_t *, bus_size_t); 185 186 /* write region */ 187 void (*bs_wr_1)(void *, bus_space_handle_t, 188 bus_size_t, const uint8_t *, bus_size_t); 189 void (*bs_wr_2)(void *, bus_space_handle_t, 190 bus_size_t, const uint16_t *, bus_size_t); 191 void (*bs_wr_4)(void *, bus_space_handle_t, 192 bus_size_t, const uint32_t *, bus_size_t); 193 void (*bs_wr_8)(void *, bus_space_handle_t, 194 bus_size_t, const uint64_t *, bus_size_t); 195 196 /* set multiple */ 197 void (*bs_sm_1)(void *, bus_space_handle_t, 198 bus_size_t, uint8_t, bus_size_t); 199 void (*bs_sm_2)(void *, bus_space_handle_t, 200 bus_size_t, uint16_t, bus_size_t); 201 void (*bs_sm_4)(void *, bus_space_handle_t, 202 bus_size_t, uint32_t, bus_size_t); 203 void (*bs_sm_8)(void *, bus_space_handle_t, 204 bus_size_t, uint64_t, bus_size_t); 205 206 /* set region */ 207 void (*bs_sr_1)(void *, bus_space_handle_t, 208 bus_size_t, uint8_t, bus_size_t); 209 void (*bs_sr_2)(void *, bus_space_handle_t, 210 bus_size_t, uint16_t, bus_size_t); 211 void (*bs_sr_4)(void *, bus_space_handle_t, 212 bus_size_t, uint32_t, bus_size_t); 213 void (*bs_sr_8)(void *, bus_space_handle_t, 214 bus_size_t, uint64_t, bus_size_t); 215 216 /* copy */ 217 void (*bs_c_1)(void *, bus_space_handle_t, bus_size_t, 218 bus_space_handle_t, bus_size_t, bus_size_t); 219 void (*bs_c_2)(void *, bus_space_handle_t, bus_size_t, 220 bus_space_handle_t, bus_size_t, bus_size_t); 221 void (*bs_c_4)(void *, bus_space_handle_t, bus_size_t, 222 bus_space_handle_t, bus_size_t, bus_size_t); 223 void (*bs_c_8)(void *, bus_space_handle_t, bus_size_t, 224 bus_space_handle_t, bus_size_t, bus_size_t); 225 }; 226 227 #define BUS_SPACE_MAP_CACHEABLE 0x01 228 #define BUS_SPACE_MAP_LINEAR 0x02 229 #define BUS_SPACE_MAP_PREFETCHABLE 0x04 230 231 #define __BUS_SPACE_HAS_STREAM_METHODS 232 233 #define BUS_SPACE_BARRIER_READ 0x01 234 #define BUS_SPACE_BARRIER_WRITE 0x02 235 236 /* 237 * Flags used in various bus DMA methods. 238 */ 239 #define BUS_DMA_WAITOK 0x000 /* safe to sleep (pseudo-flag) */ 240 #define BUS_DMA_NOWAIT 0x001 /* not safe to sleep */ 241 #define BUS_DMA_ALLOCNOW 0x002 /* perform resource allocation now */ 242 #define BUS_DMA_COHERENT 0x004 /* map memory to not require sync */ 243 #define BUS_DMA_STREAMING 0x008 /* hint: sequential, unidirectional */ 244 #define BUS_DMA_BUS1 0x010 /* placeholders for bus functions... */ 245 #define BUS_DMA_BUS2 0x020 246 #define BUS_DMA_BUS3 0x040 247 #define BUS_DMA_BUS4 0x080 248 #define BUS_DMA_READ 0x100 /* mapping is device -> memory only */ 249 #define BUS_DMA_WRITE 0x200 /* mapping is memory -> device only */ 250 #define BUS_DMA_NOCACHE 0x400 /* hint: map non-cached memory */ 251 252 /* Forwards needed by prototypes below. */ 253 struct mbuf; 254 struct uio; 255 256 /* 257 * Operations performed by bus_dmamap_sync(). 258 */ 259 #define BUS_DMASYNC_PREREAD 0x01 260 #define BUS_DMASYNC_POSTREAD 0x02 261 #define BUS_DMASYNC_PREWRITE 0x04 262 #define BUS_DMASYNC_POSTWRITE 0x08 263 264 typedef struct _bus_dma_tag *bus_dma_tag_t; 265 typedef struct _bus_dmamap *bus_dmamap_t; 266 267 #define BUS_DMA_TAG_VALID(t) ((t) != (bus_dma_tag_t)0) 268 269 /* 270 * bus_dma_segment_t 271 * 272 * Describes a single contiguous DMA transaction. Values 273 * are suitable for programming into DMA registers. 274 */ 275 struct _bus_dma_segment { 276 bus_addr_t ds_addr; /* DMA address */ 277 bus_size_t ds_len; /* length of transfer */ 278 279 /* private section */ 280 bus_addr_t _ds_vaddr; /* virtual address */ 281 }; 282 typedef struct _bus_dma_segment bus_dma_segment_t; 283 284 /* 285 * bus_dma_tag_t 286 * 287 * A machine-dependent opaque type describing the implementation of 288 * DMA for a given bus. 289 */ 290 291 struct _bus_dma_tag { 292 void *_cookie; /* cookie used in the guts */ 293 294 /* 295 * DMA mapping methods. 296 */ 297 int (*_dmamap_create)(bus_dma_tag_t, bus_size_t, int, 298 bus_size_t, bus_size_t, int, bus_dmamap_t *); 299 void (*_dmamap_destroy)(bus_dma_tag_t, bus_dmamap_t); 300 int (*_dmamap_load)(bus_dma_tag_t, bus_dmamap_t, void *, 301 bus_size_t, struct proc *, int); 302 int (*_dmamap_load_mbuf)(bus_dma_tag_t, bus_dmamap_t, 303 struct mbuf *, int); 304 int (*_dmamap_load_uio)(bus_dma_tag_t, bus_dmamap_t, 305 struct uio *, int); 306 int (*_dmamap_load_raw)(bus_dma_tag_t, bus_dmamap_t, 307 bus_dma_segment_t *, int, bus_size_t, int); 308 void (*_dmamap_unload)(bus_dma_tag_t, bus_dmamap_t); 309 void (*_dmamap_sync)(bus_dma_tag_t, bus_dmamap_t, 310 bus_addr_t, bus_size_t, int); 311 312 /* 313 * DMA memory utility functions. 314 */ 315 int (*_dmamem_alloc)(bus_dma_tag_t, bus_size_t, bus_size_t, 316 bus_size_t, bus_dma_segment_t *, int, int *, int); 317 void (*_dmamem_free)(bus_dma_tag_t, 318 bus_dma_segment_t *, int); 319 int (*_dmamem_map)(bus_dma_tag_t, bus_dma_segment_t *, 320 int, size_t, void **, int); 321 void (*_dmamem_unmap)(bus_dma_tag_t, void *, size_t); 322 paddr_t (*_dmamem_mmap)(bus_dma_tag_t, bus_dma_segment_t *, 323 int, off_t, int, int); 324 }; 325 326 /* 327 * bus_dmamap_t 328 * 329 * Describes a DMA mapping. 330 */ 331 struct _bus_dmamap { 332 /* 333 * PRIVATE MEMBERS: not for use my machine-independent code. 334 */ 335 bus_size_t _dm_size; /* largest DMA transfer mappable */ 336 int _dm_segcnt; /* number of segs this map can map */ 337 bus_size_t _dm_maxsegsz; /* largest possible segment */ 338 bus_size_t _dm_boundary; /* don't cross this */ 339 int _dm_flags; /* misc. flags */ 340 341 void *_dm_cookie; /* cookie for bus-specific functions */ 342 343 /* 344 * PUBLIC MEMBERS: these are used by machine-independent code. 345 */ 346 bus_size_t dm_mapsize; /* size of the mapping */ 347 int dm_nsegs; /* # valid segments in mapping */ 348 bus_dma_segment_t dm_segs[1]; /* segments; variable length */ 349 }; 350 351 #endif /* _LANDISK_BUS_DEFS_H_ */ 352