xref: /netbsd-src/sys/arch/landisk/dev/obio.c (revision bdc22b2e01993381dcefeff2bc9b56ca75a4235c)
1 /*	$NetBSD: obio.c,v 1.9 2011/07/01 19:12:53 dyoung Exp $	*/
2 
3 /*-
4  * Copyright (c) 1998 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Charles M. Hannum.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29  * POSSIBILITY OF SUCH DAMAGE.
30  */
31 
32 #include <sys/cdefs.h>
33 __KERNEL_RCSID(0, "$NetBSD: obio.c,v 1.9 2011/07/01 19:12:53 dyoung Exp $");
34 
35 #include "btn_obio.h"
36 #include "pwrsw_obio.h"
37 
38 #include <sys/param.h>
39 #include <sys/systm.h>
40 #include <sys/device.h>
41 
42 #include <uvm/uvm_extern.h>
43 
44 #include <sh3/devreg.h>
45 #include <sh3/mmu.h>
46 #include <sh3/pmap.h>
47 #include <sh3/pte.h>
48 
49 #include <sys/bus.h>
50 #include <machine/cpu.h>
51 #include <machine/intr.h>
52 
53 #include <landisk/dev/obiovar.h>
54 
55 #if (NPWRSW_OBIO > 0) || (NBTN_OBIO > 0)
56 #include <dev/sysmon/sysmonvar.h>
57 #include <dev/sysmon/sysmon_taskq.h>
58 #endif
59 
60 #include "locators.h"
61 
62 
63 struct obio_softc {
64 	device_t sc_dev;
65 
66 	bus_space_tag_t sc_iot;		/* io space tag */
67 	bus_space_tag_t sc_memt;	/* mem space tag */
68 };
69 
70 static int	obio_match(device_t, cfdata_t, void *);
71 static void	obio_attach(device_t, device_t, void *);
72 static int	obio_print(void *, const char *);
73 static int	obio_search(device_t, cfdata_t, const int *, void *);
74 
75 CFATTACH_DECL_NEW(obio, sizeof(struct obio_softc),
76     obio_match, obio_attach, NULL, NULL);
77 
78 static int
79 obio_match(device_t parent, cfdata_t cf, void *aux)
80 {
81 	struct obiobus_attach_args *oba = aux;
82 
83 	if (strcmp(oba->oba_busname, cf->cf_name))
84 		return (0);
85 
86 	return (1);
87 }
88 
89 static void
90 obio_attach(device_t parent, device_t self, void *aux)
91 {
92 	struct obio_softc *sc = device_private(self);
93 	struct obiobus_attach_args *oba = aux;
94 
95 	aprint_naive("\n");
96 	aprint_normal("\n");
97 
98 	sc->sc_dev = self;
99 
100 	sc->sc_iot = oba->oba_iot;
101 	sc->sc_memt = oba->oba_memt;
102 
103 #if (NPWRSW_OBIO > 0) || (NBTN_OBIO > 0)
104 	sysmon_power_settype("landisk");
105 	sysmon_task_queue_init();
106 #endif
107 
108 	config_search_ia(obio_search, self, "obio", NULL);
109 }
110 
111 static int
112 obio_search(device_t parent, cfdata_t cf, const int *ldesc, void *aux)
113 {
114 	struct obio_io res_io[1];
115 	struct obio_iomem res_mem[1];
116 	struct obio_irq res_irq[1];
117 	struct obio_softc *sc = device_private(parent);
118 	struct obio_attach_args oa;
119 	int tryagain;
120 
121 	do {
122 		oa.oa_iot = sc->sc_iot;
123 		oa.oa_memt = sc->sc_memt;
124 
125 		res_io[0].or_addr = cf->cf_iobase;
126 		res_io[0].or_size = cf->cf_iosize;
127 
128 		res_mem[0].or_addr = cf->cf_maddr;
129 		res_mem[0].or_size = cf->cf_msize;
130 
131 		res_irq[0].or_irq = cf->cf_irq;
132 
133 		oa.oa_io = res_io;
134 		oa.oa_nio = 1;
135 
136 		oa.oa_iomem = res_mem;
137 		oa.oa_niomem = 1;
138 
139 		oa.oa_irq = res_irq;
140 		oa.oa_nirq = 1;
141 
142 		tryagain = 0;
143 		if (config_match(parent, cf, &oa) > 0) {
144 			config_attach(parent, cf, &oa, obio_print);
145 			tryagain = (cf->cf_fstate == FSTATE_STAR);
146 		}
147 	} while (tryagain);
148 
149 	return (0);
150 }
151 
152 static int
153 obio_print(void *args, const char *name)
154 {
155 	struct obio_attach_args *oa = args;
156 	const char *sep;
157 	int i;
158 
159 	if (oa->oa_nio) {
160 		sep = "";
161 		aprint_normal(" port ");
162 		for (i = 0; i < oa->oa_nio; i++) {
163 			if (oa->oa_io[i].or_size == 0)
164 				continue;
165 			aprint_normal("%s0x%x", sep, oa->oa_io[i].or_addr);
166 			if (oa->oa_io[i].or_size > 1)
167 				aprint_normal("-0x%x", oa->oa_io[i].or_addr +
168 				    oa->oa_io[i].or_size - 1);
169 			sep = ",";
170 		}
171 	}
172 
173 	if (oa->oa_niomem) {
174 		sep = "";
175 		aprint_normal(" iomem ");
176 		for (i = 0; i < oa->oa_niomem; i++) {
177 			if (oa->oa_iomem[i].or_size == 0)
178 				continue;
179 			aprint_normal("%s0x%x", sep, oa->oa_iomem[i].or_addr);
180 			if (oa->oa_iomem[i].or_size > 1)
181 				aprint_normal("-0x%x", oa->oa_iomem[i].or_addr +
182 				    oa->oa_iomem[i].or_size - 1);
183 			sep = ",";
184 		}
185 	}
186 
187 	if (oa->oa_nirq) {
188 		sep = "";
189 		aprint_normal(" irq ");
190 		for (i = 0; i < oa->oa_nirq; i++) {
191 			if (oa->oa_irq[i].or_irq == IRQUNK)
192 				continue;
193 			aprint_normal("%s%d", sep, oa->oa_irq[i].or_irq);
194 			sep = ",";
195 		}
196 	}
197 
198 	return (UNCONF);
199 }
200 
201 /*
202  * Set up an interrupt handler to start being called.
203  */
204 void *
205 obio_intr_establish(int irq, int level, int (*ih_fun)(void *), void *ih_arg)
206 {
207 
208 	return extintr_establish(irq, level, ih_fun, ih_arg);
209 }
210 
211 /*
212  * Deregister an interrupt handler.
213  */
214 void
215 obio_intr_disestablish(void *arg)
216 {
217 
218 	extintr_disestablish(arg);
219 }
220 
221 /*
222  * on-board I/O bus space
223  */
224 #define	OBIO_IOMEM_IO		0	/* space is i/o space */
225 #define	OBIO_IOMEM_MEM		1	/* space is mem space */
226 #define	OBIO_IOMEM_PCMCIA_IO	2	/* PCMCIA IO space */
227 #define	OBIO_IOMEM_PCMCIA_MEM	3	/* PCMCIA Mem space */
228 #define	OBIO_IOMEM_PCMCIA_ATT	4	/* PCMCIA Attr space */
229 #define	OBIO_IOMEM_PCMCIA_8BIT	0x8000	/* PCMCIA BUS 8 BIT WIDTH */
230 #define	OBIO_IOMEM_PCMCIA_IO8 \
231 	    (OBIO_IOMEM_PCMCIA_IO|OBIO_IOMEM_PCMCIA_8BIT)
232 #define	OBIO_IOMEM_PCMCIA_MEM8 \
233 	    (OBIO_IOMEM_PCMCIA_MEM|OBIO_IOMEM_PCMCIA_8BIT)
234 #define	OBIO_IOMEM_PCMCIA_ATT8 \
235 	    (OBIO_IOMEM_PCMCIA_ATT|OBIO_IOMEM_PCMCIA_8BIT)
236 
237 int obio_iomem_map(void *v, bus_addr_t bpa, bus_size_t size, int flags,
238     bus_space_handle_t *bshp);
239 void obio_iomem_unmap(void *v, bus_space_handle_t bsh, bus_size_t size);
240 int obio_iomem_subregion(void *v, bus_space_handle_t bsh,
241     bus_size_t offset, bus_size_t size, bus_space_handle_t *nbshp);
242 int obio_iomem_alloc(void *v, bus_addr_t rstart, bus_addr_t rend,
243     bus_size_t size, bus_size_t alignment, bus_size_t boundary, int flags,
244     bus_addr_t *bpap, bus_space_handle_t *bshp);
245 void obio_iomem_free(void *v, bus_space_handle_t bsh, bus_size_t size);
246 paddr_t obio_iomem_mmap(void *v, bus_addr_t addr, off_t off, int prot,
247     int flags);
248 
249 static int obio_iomem_add_mapping(bus_addr_t, bus_size_t, int,
250     bus_space_handle_t *);
251 
252 static int
253 obio_iomem_add_mapping(bus_addr_t bpa, bus_size_t size, int type,
254     bus_space_handle_t *bshp)
255 {
256 	u_long pa, endpa;
257 	vaddr_t va;
258 	pt_entry_t *pte;
259 	unsigned int m = 0;
260 	int io_type = type & ~OBIO_IOMEM_PCMCIA_8BIT;
261 
262 	pa = sh3_trunc_page(bpa);
263 	endpa = sh3_round_page(bpa + size);
264 
265 #ifdef DIAGNOSTIC
266 	if (endpa <= pa)
267 		panic("obio_iomem_add_mapping: overflow");
268 #endif
269 
270 	va = uvm_km_alloc(kernel_map, endpa - pa, 0, UVM_KMF_VAONLY);
271 	if (va == 0){
272 		printf("obio_iomem_add_mapping: nomem\n");
273 		return (ENOMEM);
274 	}
275 
276 	*bshp = (bus_space_handle_t)(va + (bpa & PGOFSET));
277 
278 #define MODE(t, s)							\
279 	((t) & OBIO_IOMEM_PCMCIA_8BIT) ?				\
280 		_PG_PCMCIA_ ## s ## 8 :					\
281 		_PG_PCMCIA_ ## s ## 16
282 	switch (io_type) {
283 	default:
284 		panic("unknown pcmcia space.");
285 		/* NOTREACHED */
286 	case OBIO_IOMEM_PCMCIA_IO:
287 		m = MODE(type, IO);
288 		break;
289 	case OBIO_IOMEM_PCMCIA_MEM:
290 		m = MODE(type, MEM);
291 		break;
292 	case OBIO_IOMEM_PCMCIA_ATT:
293 		m = MODE(type, ATTR);
294 		break;
295 	}
296 #undef MODE
297 
298 	for (; pa < endpa; pa += PAGE_SIZE, va += PAGE_SIZE) {
299 		pmap_kenter_pa(va, pa, VM_PROT_READ | VM_PROT_WRITE, 0);
300 		pte = __pmap_kpte_lookup(va);
301 		KDASSERT(pte);
302 		*pte |= m;  /* PTEA PCMCIA assistant bit */
303 		sh_tlb_update(0, va, *pte);
304 	}
305 
306 	return (0);
307 }
308 
309 int
310 obio_iomem_map(void *v, bus_addr_t bpa, bus_size_t size,
311     int flags, bus_space_handle_t *bshp)
312 {
313 	bus_addr_t addr = SH3_PHYS_TO_P2SEG(bpa);
314 	int error;
315 
316 	KASSERT((bpa & SH3_PHYS_MASK) == bpa);
317 
318 	if (bpa < 0x14000000 || bpa >= 0x1c000000) {
319 		/* CS0,1,2,3,4,7 */
320 		*bshp = (bus_space_handle_t)addr;
321 		return (0);
322 	}
323 
324 	/* CS5,6 */
325 	error = obio_iomem_add_mapping(addr, size, (int)(u_long)v, bshp);
326 
327 	return (error);
328 }
329 
330 void
331 obio_iomem_unmap(void *v, bus_space_handle_t bsh, bus_size_t size)
332 {
333 	u_long va, endva;
334 	bus_addr_t bpa;
335 
336 	if (bsh >= SH3_P2SEG_BASE && bsh <= SH3_P2SEG_END) {
337 		/* maybe CS0,1,2,3,4,7 */
338 		return;
339 	}
340 
341 	/* CS5,6 */
342 	va = sh3_trunc_page(bsh);
343 	endva = sh3_round_page(bsh + size);
344 
345 #ifdef DIAGNOSTIC
346 	if (endva <= va)
347 		panic("obio_io_unmap: overflow");
348 #endif
349 
350 	pmap_extract(pmap_kernel(), va, &bpa);
351 	bpa += bsh & PGOFSET;
352 
353 	pmap_kremove(va, endva - va);
354 
355 	/*
356 	 * Free the kernel virtual mapping.
357 	 */
358 	uvm_km_free(kernel_map, va, endva - va, UVM_KMF_VAONLY);
359 }
360 
361 int
362 obio_iomem_subregion(void *v, bus_space_handle_t bsh,
363     bus_size_t offset, bus_size_t size, bus_space_handle_t *nbshp)
364 {
365 
366 	*nbshp = bsh + offset;
367 
368 	return (0);
369 }
370 
371 int
372 obio_iomem_alloc(void *v, bus_addr_t rstart, bus_addr_t rend,
373     bus_size_t size, bus_size_t alignment, bus_size_t boundary, int flags,
374     bus_addr_t *bpap, bus_space_handle_t *bshp)
375 {
376 
377 	*bshp = *bpap = rstart;
378 
379 	return (0);
380 }
381 
382 void
383 obio_iomem_free(void *v, bus_space_handle_t bsh, bus_size_t size)
384 {
385 
386 	obio_iomem_unmap(v, bsh, size);
387 }
388 
389 paddr_t
390 obio_iomem_mmap(void *v, bus_addr_t addr, off_t off, int prot, int flags)
391 {
392 
393 	return (paddr_t)-1;
394 }
395 
396 /*
397  * on-board I/O bus space read/write
398  */
399 uint8_t obio_iomem_read_1(void *v, bus_space_handle_t bsh, bus_size_t offset);
400 uint16_t obio_iomem_read_2(void *v, bus_space_handle_t bsh, bus_size_t offset);
401 uint32_t obio_iomem_read_4(void *v, bus_space_handle_t bsh, bus_size_t offset);
402 void obio_iomem_read_multi_1(void *v, bus_space_handle_t bsh,
403     bus_size_t offset, uint8_t *addr, bus_size_t count);
404 void obio_iomem_read_multi_2(void *v, bus_space_handle_t bsh,
405     bus_size_t offset, uint16_t *addr, bus_size_t count);
406 void obio_iomem_read_multi_4(void *v, bus_space_handle_t bsh,
407     bus_size_t offset, uint32_t *addr, bus_size_t count);
408 void obio_iomem_read_region_1(void *v, bus_space_handle_t bsh,
409     bus_size_t offset, uint8_t *addr, bus_size_t count);
410 void obio_iomem_read_region_2(void *v, bus_space_handle_t bsh,
411     bus_size_t offset, uint16_t *addr, bus_size_t count);
412 void obio_iomem_read_region_4(void *v, bus_space_handle_t bsh,
413     bus_size_t offset, uint32_t *addr, bus_size_t count);
414 void obio_iomem_write_1(void *v, bus_space_handle_t bsh, bus_size_t offset,
415     uint8_t value);
416 void obio_iomem_write_2(void *v, bus_space_handle_t bsh, bus_size_t offset,
417     uint16_t value);
418 void obio_iomem_write_4(void *v, bus_space_handle_t bsh, bus_size_t offset,
419     uint32_t value);
420 void obio_iomem_write_multi_1(void *v, bus_space_handle_t bsh,
421     bus_size_t offset, const uint8_t *addr, bus_size_t count);
422 void obio_iomem_write_multi_2(void *v, bus_space_handle_t bsh,
423     bus_size_t offset, const uint16_t *addr, bus_size_t count);
424 void obio_iomem_write_multi_4(void *v, bus_space_handle_t bsh,
425     bus_size_t offset, const uint32_t *addr, bus_size_t count);
426 void obio_iomem_write_region_1(void *v, bus_space_handle_t bsh,
427     bus_size_t offset, const uint8_t *addr, bus_size_t count);
428 void obio_iomem_write_region_2(void *v, bus_space_handle_t bsh,
429     bus_size_t offset, const uint16_t *addr, bus_size_t count);
430 void obio_iomem_write_region_4(void *v, bus_space_handle_t bsh,
431     bus_size_t offset, const uint32_t *addr, bus_size_t count);
432 void obio_iomem_set_multi_1(void *v, bus_space_handle_t bsh, bus_size_t offset,
433     uint8_t val, bus_size_t count);
434 void obio_iomem_set_multi_2(void *v, bus_space_handle_t bsh, bus_size_t offset,
435     uint16_t val, bus_size_t count);
436 void obio_iomem_set_multi_4(void *v, bus_space_handle_t bsh, bus_size_t offset,
437     uint32_t val, bus_size_t count);
438 void obio_iomem_set_region_1(void *v, bus_space_handle_t bsh,
439     bus_size_t offset, uint8_t val, bus_size_t count);
440 void obio_iomem_set_region_2(void *v, bus_space_handle_t bsh,
441     bus_size_t offset, uint16_t val, bus_size_t count);
442 void obio_iomem_set_region_4(void *v, bus_space_handle_t bsh,
443     bus_size_t offset, uint32_t val, bus_size_t count);
444 void obio_iomem_copy_region_1(void *v, bus_space_handle_t h1, bus_size_t o1,
445     bus_space_handle_t h2, bus_size_t o2, bus_size_t count);
446 void obio_iomem_copy_region_2(void *v, bus_space_handle_t h1, bus_size_t o1,
447     bus_space_handle_t h2, bus_size_t o2, bus_size_t count);
448 void obio_iomem_copy_region_4(void *v, bus_space_handle_t h1, bus_size_t o1,
449     bus_space_handle_t h2, bus_size_t o2, bus_size_t count);
450 
451 struct _bus_space obio_bus_io =
452 {
453 	.bs_cookie = (void *)OBIO_IOMEM_PCMCIA_IO,
454 
455 	.bs_map = obio_iomem_map,
456 	.bs_unmap = obio_iomem_unmap,
457 	.bs_subregion = obio_iomem_subregion,
458 
459 	.bs_alloc = obio_iomem_alloc,
460 	.bs_free = obio_iomem_free,
461 
462 	.bs_mmap = obio_iomem_mmap,
463 
464 	.bs_r_1 = obio_iomem_read_1,
465 	.bs_r_2 = obio_iomem_read_2,
466 	.bs_r_4 = obio_iomem_read_4,
467 
468 	.bs_rm_1 = obio_iomem_read_multi_1,
469 	.bs_rm_2 = obio_iomem_read_multi_2,
470 	.bs_rm_4 = obio_iomem_read_multi_4,
471 
472 	.bs_rr_1 = obio_iomem_read_region_1,
473 	.bs_rr_2 = obio_iomem_read_region_2,
474 	.bs_rr_4 = obio_iomem_read_region_4,
475 
476 	.bs_w_1 = obio_iomem_write_1,
477 	.bs_w_2 = obio_iomem_write_2,
478 	.bs_w_4 = obio_iomem_write_4,
479 
480 	.bs_wm_1 = obio_iomem_write_multi_1,
481 	.bs_wm_2 = obio_iomem_write_multi_2,
482 	.bs_wm_4 = obio_iomem_write_multi_4,
483 
484 	.bs_wr_1 = obio_iomem_write_region_1,
485 	.bs_wr_2 = obio_iomem_write_region_2,
486 	.bs_wr_4 = obio_iomem_write_region_4,
487 
488 	.bs_sm_1 = obio_iomem_set_multi_1,
489 	.bs_sm_2 = obio_iomem_set_multi_2,
490 	.bs_sm_4 = obio_iomem_set_multi_4,
491 
492 	.bs_sr_1 = obio_iomem_set_region_1,
493 	.bs_sr_2 = obio_iomem_set_region_2,
494 	.bs_sr_4 = obio_iomem_set_region_4,
495 
496 	.bs_c_1 = obio_iomem_copy_region_1,
497 	.bs_c_2 = obio_iomem_copy_region_2,
498 	.bs_c_4 = obio_iomem_copy_region_4,
499 };
500 
501 struct _bus_space obio_bus_mem =
502 {
503 	.bs_cookie = (void *)OBIO_IOMEM_PCMCIA_MEM,
504 
505 	.bs_map = obio_iomem_map,
506 	.bs_unmap = obio_iomem_unmap,
507 	.bs_subregion = obio_iomem_subregion,
508 
509 	.bs_alloc = obio_iomem_alloc,
510 	.bs_free = obio_iomem_free,
511 
512 	.bs_r_1 = obio_iomem_read_1,
513 	.bs_r_2 = obio_iomem_read_2,
514 	.bs_r_4 = obio_iomem_read_4,
515 
516 	.bs_rm_1 = obio_iomem_read_multi_1,
517 	.bs_rm_2 = obio_iomem_read_multi_2,
518 	.bs_rm_4 = obio_iomem_read_multi_4,
519 
520 	.bs_rr_1 = obio_iomem_read_region_1,
521 	.bs_rr_2 = obio_iomem_read_region_2,
522 	.bs_rr_4 = obio_iomem_read_region_4,
523 
524 	.bs_w_1 = obio_iomem_write_1,
525 	.bs_w_2 = obio_iomem_write_2,
526 	.bs_w_4 = obio_iomem_write_4,
527 
528 	.bs_wm_1 = obio_iomem_write_multi_1,
529 	.bs_wm_2 = obio_iomem_write_multi_2,
530 	.bs_wm_4 = obio_iomem_write_multi_4,
531 
532 	.bs_wr_1 = obio_iomem_write_region_1,
533 	.bs_wr_2 = obio_iomem_write_region_2,
534 	.bs_wr_4 = obio_iomem_write_region_4,
535 
536 	.bs_sm_1 = obio_iomem_set_multi_1,
537 	.bs_sm_2 = obio_iomem_set_multi_2,
538 	.bs_sm_4 = obio_iomem_set_multi_4,
539 
540 	.bs_sr_1 = obio_iomem_set_region_1,
541 	.bs_sr_2 = obio_iomem_set_region_2,
542 	.bs_sr_4 = obio_iomem_set_region_4,
543 
544 	.bs_c_1 = obio_iomem_copy_region_1,
545 	.bs_c_2 = obio_iomem_copy_region_2,
546 	.bs_c_4 = obio_iomem_copy_region_4,
547 };
548 
549 /* read */
550 uint8_t
551 obio_iomem_read_1(void *v, bus_space_handle_t bsh, bus_size_t offset)
552 {
553 
554 	return *(volatile uint8_t *)(bsh + offset);
555 }
556 
557 uint16_t
558 obio_iomem_read_2(void *v, bus_space_handle_t bsh, bus_size_t offset)
559 {
560 
561 	return *(volatile uint16_t *)(bsh + offset);
562 }
563 
564 uint32_t
565 obio_iomem_read_4(void *v, bus_space_handle_t bsh, bus_size_t offset)
566 {
567 
568 	return *(volatile uint32_t *)(bsh + offset);
569 }
570 
571 void
572 obio_iomem_read_multi_1(void *v, bus_space_handle_t bsh,
573     bus_size_t offset, uint8_t *addr, bus_size_t count)
574 {
575 	volatile uint8_t *p = (void *)(bsh + offset);
576 
577 	while (count--) {
578 		*addr++ = *p;
579 	}
580 }
581 
582 void
583 obio_iomem_read_multi_2(void *v, bus_space_handle_t bsh,
584     bus_size_t offset, uint16_t *addr, bus_size_t count)
585 {
586 	volatile uint16_t *p = (void *)(bsh + offset);
587 
588 	while (count--) {
589 		*addr++ = *p;
590 	}
591 }
592 
593 void
594 obio_iomem_read_multi_4(void *v, bus_space_handle_t bsh,
595     bus_size_t offset, uint32_t *addr, bus_size_t count)
596 {
597 	volatile uint32_t *p = (void *)(bsh + offset);
598 
599 	while (count--) {
600 		*addr++ = *p;
601 	}
602 }
603 
604 void
605 obio_iomem_read_region_1(void *v, bus_space_handle_t bsh,
606     bus_size_t offset, uint8_t *addr, bus_size_t count)
607 {
608 	volatile uint8_t *p = (void *)(bsh + offset);
609 
610 	while (count--) {
611 		*addr++ = *p++;
612 	}
613 }
614 
615 void
616 obio_iomem_read_region_2(void *v, bus_space_handle_t bsh,
617     bus_size_t offset, uint16_t *addr, bus_size_t count)
618 {
619 	volatile uint16_t *p = (void *)(bsh + offset);
620 
621 	while (count--) {
622 		*addr++ = *p++;
623 	}
624 }
625 
626 void
627 obio_iomem_read_region_4(void *v, bus_space_handle_t bsh,
628     bus_size_t offset, uint32_t *addr, bus_size_t count)
629 {
630 	volatile uint32_t *p = (void *)(bsh + offset);
631 
632 	while (count--) {
633 		*addr++ = *p++;
634 	}
635 }
636 
637 /* write */
638 void
639 obio_iomem_write_1(void *v, bus_space_handle_t bsh, bus_size_t offset,
640     uint8_t value)
641 {
642 
643 	*(volatile uint8_t *)(bsh + offset) = value;
644 }
645 
646 void
647 obio_iomem_write_2(void *v, bus_space_handle_t bsh, bus_size_t offset,
648     uint16_t value)
649 {
650 
651 	*(volatile uint16_t *)(bsh + offset) = value;
652 }
653 
654 void
655 obio_iomem_write_4(void *v, bus_space_handle_t bsh, bus_size_t offset,
656     uint32_t value)
657 {
658 
659 	*(volatile uint32_t *)(bsh + offset) = value;
660 }
661 
662 void
663 obio_iomem_write_multi_1(void *v, bus_space_handle_t bsh,
664     bus_size_t offset, const uint8_t *addr, bus_size_t count)
665 {
666 	volatile uint8_t *p = (void *)(bsh + offset);
667 
668 	while (count--) {
669 		*p = *addr++;
670 	}
671 }
672 
673 void
674 obio_iomem_write_multi_2(void *v, bus_space_handle_t bsh,
675     bus_size_t offset, const uint16_t *addr, bus_size_t count)
676 {
677 	volatile uint16_t *p = (void *)(bsh + offset);
678 
679 	while (count--) {
680 		*p = *addr++;
681 	}
682 }
683 
684 void
685 obio_iomem_write_multi_4(void *v, bus_space_handle_t bsh,
686     bus_size_t offset, const uint32_t *addr, bus_size_t count)
687 {
688 	volatile uint32_t *p = (void *)(bsh + offset);
689 
690 	while (count--) {
691 		*p = *addr++;
692 	}
693 }
694 
695 void
696 obio_iomem_write_region_1(void *v, bus_space_handle_t bsh,
697     bus_size_t offset, const uint8_t *addr, bus_size_t count)
698 {
699 	volatile uint8_t *p = (void *)(bsh + offset);
700 
701 	while (count--) {
702 		*p++ = *addr++;
703 	}
704 }
705 
706 void
707 obio_iomem_write_region_2(void *v, bus_space_handle_t bsh,
708     bus_size_t offset, const uint16_t *addr, bus_size_t count)
709 {
710 	volatile uint16_t *p = (void *)(bsh + offset);
711 
712 	while (count--) {
713 		*p++ = *addr++;
714 	}
715 }
716 
717 void
718 obio_iomem_write_region_4(void *v, bus_space_handle_t bsh,
719     bus_size_t offset, const uint32_t *addr, bus_size_t count)
720 {
721 	volatile uint32_t *p = (void *)(bsh + offset);
722 
723 	while (count--) {
724 		*p++ = *addr++;
725 	}
726 }
727 
728 void
729 obio_iomem_set_multi_1(void *v, bus_space_handle_t bsh,
730     bus_size_t offset, uint8_t val, bus_size_t count)
731 {
732 	volatile uint8_t *p = (void *)(bsh + offset);
733 
734 	while (count--) {
735 		*p = val;
736 	}
737 }
738 
739 void
740 obio_iomem_set_multi_2(void *v, bus_space_handle_t bsh,
741     bus_size_t offset, uint16_t val, bus_size_t count)
742 {
743 	volatile uint16_t *p = (void *)(bsh + offset);
744 
745 	while (count--) {
746 		*p = val;
747 	}
748 }
749 
750 void
751 obio_iomem_set_multi_4(void *v, bus_space_handle_t bsh,
752     bus_size_t offset, uint32_t val, bus_size_t count)
753 {
754 	volatile uint32_t *p = (void *)(bsh + offset);
755 
756 	while (count--) {
757 		*p = val;
758 	}
759 }
760 
761 void
762 obio_iomem_set_region_1(void *v, bus_space_handle_t bsh,
763     bus_size_t offset, uint8_t val, bus_size_t count)
764 {
765 	volatile uint8_t *addr = (void *)(bsh + offset);
766 
767 	while (count--) {
768 		*addr++ = val;
769 	}
770 }
771 
772 void
773 obio_iomem_set_region_2(void *v, bus_space_handle_t bsh,
774     bus_size_t offset, uint16_t val, bus_size_t count)
775 {
776 	volatile uint16_t *addr = (void *)(bsh + offset);
777 
778 	while (count--) {
779 		*addr++ = val;
780 	}
781 }
782 
783 void
784 obio_iomem_set_region_4(void *v, bus_space_handle_t bsh,
785     bus_size_t offset, uint32_t val, bus_size_t count)
786 {
787 	volatile uint32_t *addr = (void *)(bsh + offset);
788 
789 	while (count--) {
790 		*addr++ = val;
791 	}
792 }
793 
794 void
795 obio_iomem_copy_region_1(void *v, bus_space_handle_t h1, bus_size_t o1,
796     bus_space_handle_t h2, bus_size_t o2, bus_size_t count)
797 {
798 	volatile uint8_t *addr1 = (void *)(h1 + o1);
799 	volatile uint8_t *addr2 = (void *)(h2 + o2);
800 
801 	if (addr1 >= addr2) {	/* src after dest: copy forward */
802 		while (count--) {
803 			*addr2++ = *addr1++;
804 		}
805 	} else {		/* dest after src: copy backwards */
806 		addr1 += count - 1;
807 		addr2 += count - 1;
808 		while (count--) {
809 			*addr2-- = *addr1--;
810 		}
811 	}
812 }
813 
814 void
815 obio_iomem_copy_region_2(void *v, bus_space_handle_t h1, bus_size_t o1,
816     bus_space_handle_t h2, bus_size_t o2, bus_size_t count)
817 {
818 	volatile uint16_t *addr1 = (void *)(h1 + o1);
819 	volatile uint16_t *addr2 = (void *)(h2 + o2);
820 
821 	if (addr1 >= addr2) {	/* src after dest: copy forward */
822 		while (count--) {
823 			*addr2++ = *addr1++;
824 		}
825 	} else {		/* dest after src: copy backwards */
826 		addr1 += count - 1;
827 		addr2 += count - 1;
828 		while (count--) {
829 			*addr2-- = *addr1--;
830 		}
831 	}
832 }
833 
834 void
835 obio_iomem_copy_region_4(void *v, bus_space_handle_t h1, bus_size_t o1,
836     bus_space_handle_t h2, bus_size_t o2, bus_size_t count)
837 {
838 	volatile uint32_t *addr1 = (void *)(h1 + o1);
839 	volatile uint32_t *addr2 = (void *)(h2 + o2);
840 
841 	if (addr1 >= addr2) {	/* src after dest: copy forward */
842 		while (count--) {
843 			*addr2++ = *addr1++;
844 		}
845 	} else {		/* dest after src: copy backwards */
846 		addr1 += count - 1;
847 		addr2 += count - 1;
848 		while (count--) {
849 			*addr2-- = *addr1--;
850 		}
851 	}
852 }
853