xref: /netbsd-src/sys/arch/ia64/include/cpufunc.h (revision 50728e7823a76d5bd1a7bfa3a4eac400269b1339)
1 /*	$NetBSD: cpufunc.h,v 1.2 2008/03/20 09:09:20 kochi Exp $	*/
2 
3 /*-
4  * Copyright (c) 1998 Doug Rabson
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26  * SUCH DAMAGE.
27  *
28  * $FreeBSD$
29  */
30 
31 #ifndef _MACHINE_CPUFUNC_H_
32 #define _MACHINE_CPUFUNC_H_
33 
34 #ifdef _KERNEL
35 
36 #include <sys/types.h>
37 #include <machine/ia64_cpu.h>
38 #include <machine/vmparam.h>
39 
40 struct thread;
41 
42 #define	IA64_FIXED_BREAK	0x84B5D
43 
44 #ifdef __GNUC__
45 
46 static __inline void
47 breakpoint(void)
48 {
49 	__asm __volatile("break.m %0" :: "i"(IA64_FIXED_BREAK));
50 }
51 
52 #define	HAVE_INLINE_FFS
53 #define	ffs(x)	__builtin_ffs(x)
54 
55 #endif
56 
57 extern uint64_t ia64_port_base;
58 #define	__MEMIO_ADDR(x)		(__volatile void*)(IA64_PHYS_TO_RR6(x))
59 #define	__PIO_ADDR(x)		(__volatile void*)(ia64_port_base |	\
60 	(((x) & 0xFFFC) << 10) | ((x) & 0xFFF))
61 
62 #if 0
63 /*
64  * I/O port reads with ia32 semantics.
65  */
66 static __inline uint8_t
67 inb(unsigned int port)
68 {
69 	__volatile uint8_t *p;
70 	uint8_t v;
71 	p = __PIO_ADDR(port);
72 	ia64_mf();
73 	v = *p;
74 	ia64_mf_a();
75 	ia64_mf();
76 	return (v);
77 }
78 
79 static __inline uint16_t
80 inw(unsigned int port)
81 {
82 	__volatile uint16_t *p;
83 	uint16_t v;
84 	p = __PIO_ADDR(port);
85 	ia64_mf();
86 	v = *p;
87 	ia64_mf_a();
88 	ia64_mf();
89 	return (v);
90 }
91 
92 static __inline uint32_t
93 inl(unsigned int port)
94 {
95 	volatile uint32_t *p;
96 	uint32_t v;
97 	p = __PIO_ADDR(port);
98 	ia64_mf();
99 	v = *p;
100 	ia64_mf_a();
101 	ia64_mf();
102 	return (v);
103 }
104 
105 static __inline void
106 insb(unsigned int port, void *addr, size_t count)
107 {
108 	uint8_t *buf = addr;
109 	while (count--)
110 		*buf++ = inb(port);
111 }
112 
113 static __inline void
114 insw(unsigned int port, void *addr, size_t count)
115 {
116 	uint16_t *buf = addr;
117 	while (count--)
118 		*buf++ = inw(port);
119 }
120 
121 static __inline void
122 insl(unsigned int port, void *addr, size_t count)
123 {
124 	uint32_t *buf = addr;
125 	while (count--)
126 		*buf++ = inl(port);
127 }
128 
129 static __inline void
130 outb(unsigned int port, uint8_t data)
131 {
132 	volatile uint8_t *p;
133 	p = __PIO_ADDR(port);
134 	ia64_mf();
135 	*p = data;
136 	ia64_mf_a();
137 	ia64_mf();
138 }
139 
140 static __inline void
141 outw(unsigned int port, uint16_t data)
142 {
143 	volatile uint16_t *p;
144 	p = __PIO_ADDR(port);
145 	ia64_mf();
146 	*p = data;
147 	ia64_mf_a();
148 	ia64_mf();
149 }
150 
151 static __inline void
152 outl(unsigned int port, uint32_t data)
153 {
154 	volatile uint32_t *p;
155 	p = __PIO_ADDR(port);
156 	ia64_mf();
157 	*p = data;
158 	ia64_mf_a();
159 	ia64_mf();
160 }
161 
162 static __inline void
163 outsb(unsigned int port, const void *addr, size_t count)
164 {
165 	const uint8_t *buf = addr;
166 	while (count--)
167 		outb(port, *buf++);
168 }
169 
170 static __inline void
171 outsw(unsigned int port, const void *addr, size_t count)
172 {
173 	const uint16_t *buf = addr;
174 	while (count--)
175 		outw(port, *buf++);
176 }
177 
178 static __inline void
179 outsl(unsigned int port, const void *addr, size_t count)
180 {
181 	const uint32_t *buf = addr;
182 	while (count--)
183 		outl(port, *buf++);
184 }
185 #endif
186 
187 static __inline void
188 disable_intr(void)
189 {
190 	__asm __volatile ("rsm psr.i");
191 }
192 
193 static __inline void
194 enable_intr(void)
195 {
196 	__asm __volatile ("ssm psr.i;; srlz.d");
197 }
198 
199 static __inline register_t
200 intr_disable(void)
201 {
202 	register_t psr;
203 	__asm __volatile ("mov %0=psr;;" : "=r"(psr));
204 	disable_intr();
205 	return ((psr & IA64_PSR_I) ? 1 : 0);
206 }
207 
208 static __inline void
209 intr_restore(register_t ie)
210 {
211 	if (ie)
212 		enable_intr();
213 }
214 
215 #endif /* _KERNEL */
216 
217 #endif /* !_MACHINE_CPUFUNC_H_ */
218