xref: /netbsd-src/sys/arch/ia64/include/cpu.h (revision bdc22b2e01993381dcefeff2bc9b56ca75a4235c)
1 /*	$NetBSD: cpu.h,v 1.16 2017/04/08 18:01:22 scole Exp $	*/
2 
3 /*-
4  * Copyright (c) 2006 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9  * NASA Ames Research Center, and by Charles M. Hannum.
10  *
11  * Redistribution and use in source and binary forms, with or without
12  * modification, are permitted provided that the following conditions
13  * are met:
14  * 1. Redistributions of source code must retain the above copyright
15  *    notice, this list of conditions and the following disclaimer.
16  * 2. Redistributions in binary form must reproduce the above copyright
17  *    notice, this list of conditions and the following disclaimer in the
18  *    documentation and/or other materials provided with the distribution.
19  *
20  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
21  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
22  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
24  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30  * POSSIBILITY OF SUCH DAMAGE.
31  */
32 
33 
34 /*-
35  * Copyright (c) 1988 University of Utah.
36  * Copyright (c) 1982, 1990, 1993
37  *	The Regents of the University of California.  All rights reserved.
38  *
39  * This code is derived from software contributed to Berkeley by
40  * the Systems Programming Group of the University of Utah Computer
41  * Science Department.
42  *
43  * Redistribution and use in source and binary forms, with or without
44  * modification, are permitted provided that the following conditions
45  * are met:
46  * 1. Redistributions of source code must retain the above copyright
47  *    notice, this list of conditions and the following disclaimer.
48  * 2. Redistributions in binary form must reproduce the above copyright
49  *    notice, this list of conditions and the following disclaimer in the
50  *    documentation and/or other materials provided with the distribution.
51  * 4. Neither the name of the University nor the names of its contributors
52  *    may be used to endorse or promote products derived from this software
53  *    without specific prior written permission.
54  *
55  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
56  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
57  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
58  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
59  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
60  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
61  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
62  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
63  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
64  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
65  * SUCH DAMAGE.
66  *
67  * from: Utah $Hdr: cpu.h 1.16 91/03/25$
68  *
69  *	@(#)cpu.h	8.4 (Berkeley) 1/5/94
70  */
71 
72 
73 #ifndef _IA64_CPU_H_
74 #define _IA64_CPU_H_
75 
76 #ifdef _KERNEL
77 #include <sys/cpu_data.h>
78 #include <sys/cctr.h>
79 #include <machine/frame.h>
80 #include <machine/ia64_cpu.h>
81 #include <sys/device_if.h>
82 
83 struct cpu_info {
84 
85 	/*
86 	 * Public members.
87 	 */
88 
89 	struct cpu_data ci_data;	/* MI per-cpu data */
90 	device_t ci_dev;		/* pointer to our device */
91 	struct lwp *ci_curlwp;		/* current owner of the processor */
92 	struct cctr_state ci_cc;	/* cycle counter state */
93 	struct cpu_info *ci_next;	/* next cpu_info structure */
94 
95 	volatile int ci_mtx_count;	/* Negative count of spin mutexes */
96 	volatile int ci_mtx_oldspl;	/* Old SPL at this ci_idepth */
97 
98 	/* XXX: Todo */
99 	/*
100 	 * Private members.
101 	 */
102 	cpuid_t ci_cpuid;		/* our CPU ID */
103 	uint32_t ci_acpiid;		/* our ACPI/MADT ID */
104 	uint32_t ci_initapicid;		/* our intitial APIC ID */
105 	struct pmap *ci_pmap;		/* current pmap */ /* XXX FreeBSD has *pcb_current_pmap in pcb ? */
106 	struct lwp *ci_fpcurlwp;	/* current owner of the FPU */
107 	paddr_t ci_curpcb;		/* PA of current HW PCB */
108 	struct pcb *ci_idle_pcb;	/* our idle PCB */
109 	u_long ci_want_resched;		/* preempt current process */
110 	u_long ci_intrdepth;		/* interrupt trap depth */
111 	struct trapframe *ci_db_regs;	/* registers for debuggers */
112 	uint64_t ci_clock;		/* clock counter */
113 	uint64_t ci_clockadj;		/* clock adjust */
114 	uint64_t ci_vhpt;		/* address of vhpt */
115 };
116 
117 
118 extern struct cpu_info cpu_info_primary;
119 extern struct cpu_info *cpu_info_list;
120 
121 #define	CPU_INFO_ITERATOR		int __unused
122 #define	CPU_INFO_FOREACH(cii, ci)	ci = cpu_info_list; \
123 					ci != NULL; ci = ci->ci_next
124 #ifdef MULTIPROCESSOR
125 /*
126  * XXX: TODO use percpu infrastructure that yamt proposed or use KR? for
127  * storing the percpu pointer.
128  */
129 #else
130 #define	curcpu() (&cpu_info_primary)
131 #endif /* MULTIPROCESSOR */
132 #define curlwp	(curcpu()->ci_curlwp)
133 
134 #define cpu_number() 0              /*XXX: FIXME */
135 
136 #define aston(l) ((l)->l_md.md_astpending = 1)
137 
138 #define	need_resched(ci)            /*XXX: FIXME */
139 
140 struct clockframe {
141 	struct trapframe cf_tf;
142 };
143 
144 #define	CLKF_PC(cf)		(TRAPF_PC(&(cf)->cf_tf))
145 #define	CLKF_CPL(cf)		(TRAPF_CPL(&(cf)->cf_tf))
146 #define	CLKF_USERMODE(cf)	(TRAPF_USERMODE(&(cf)->cf_tf))
147 #define	CLKF_INTR(frame)	(curcpu()->ci_intrdepth)
148 
149 #define	TRAPF_PC(tf)		((tf)->tf_special.iip)
150 #define	TRAPF_CPL(tf)		((tf)->tf_special.psr & IA64_PSR_CPL)
151 #define	TRAPF_USERMODE(tf)	(TRAPF_CPL(tf) != IA64_PSR_CPL_KERN)
152 
153 /*
154  * Give a profiling tick to the current process when the user profiling
155  * buffer pages are invalid. XXX:Fixme.... On the ia64 I haven't yet figured
156  * out what to do about this.. XXX.
157  */
158 /* extern void	cpu_need_proftick(struct lwp *l); */
159 #define cpu_need_proftick(l) __nothing
160 
161 /*
162  * Notify the LWP l that it has a signal pending, process as soon as possible.
163  */
164 #define	cpu_signotify(l)	aston(l)
165 
166 // void cpu_need_resched(struct cpu_info *ci, int flags)
167 #define cpu_need_resched(ci, f) do {	\
168 	__USE(ci);			\
169 	__USE(f);			\
170 } while(/*CONSTCOND*/0)
171 
172 #define setsoftclock()        __nothing       /*XXX: FIXME */
173 
174 /* machdep.c */
175 int cpu_maxproc(void); /*XXX: Fill in machdep.c */
176 
177 #define	cpu_proc_fork(p1, p2)  __nothing	/* XXX: Look into this. */
178 
179 #define DELAY(x)	 __nothing	/* XXX: FIXME */
180 
181 static inline void cpu_idle(void);
182 static inline
183 void cpu_idle(void)
184 {
185 	asm ("hint @pause" ::: "memory");
186 }
187 
188 #endif /* _KERNEL_ */
189 #endif /* _IA64_CPU_H */
190