xref: /netbsd-src/sys/arch/i386/pci/viapcib.c (revision d90047b5d07facf36e6c01dcc0bded8997ce9cc2)
1 /* $NetBSD: viapcib.c,v 1.17 2019/12/22 23:23:30 thorpej Exp $ */
2 /* $FreeBSD: src/sys/pci/viapm.c,v 1.10 2005/05/29 04:42:29 nyan Exp $ */
3 
4 /*-
5  * Copyright (c) 2005, 2006 Jared D. McNeill <jmcneill@invisible.ca>
6  * All rights reserved.
7  *
8  * Redistribution and use in source and binary forms, with or without
9  * modification, are permitted provided that the following conditions
10  * are met:
11  * 1. Redistributions of source code must retain the above copyright
12  *    notice, this list of conditions and the following disclaimer.
13  * 2. Redistributions in binary form must reproduce the above copyright
14  *    notice, this list of conditions, and the following disclaimer in the
15  *    documentation and/or other materials provided with the distribution.
16  * 3. The name of the author may not be used to endorse or promote products
17  *    derived from this software without specific prior written permission.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
20  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
21  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
22  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
23  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
24  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
25  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
26  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
27  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29  * SUCH DAMAGE.
30  */
31 /*-
32  * Copyright (c) 2001 Alcove - Nicolas Souchu
33  * All rights reserved.
34  *
35  * Redistribution and use in source and binary forms, with or without
36  * modification, are permitted provided that the following conditions
37  * are met:
38  * 1. Redistributions of source code must retain the above copyright
39  *    notice, this list of conditions and the following disclaimer.
40  * 2. Redistributions in binary form must reproduce the above copyright
41  *    notice, this list of conditions and the following disclaimer in the
42  *    documentation and/or other materials provided with the distribution.
43  *
44  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
45  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
46  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
47  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
48  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
49  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
50  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
51  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
52  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
53  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
54  * SUCH DAMAGE.
55  */
56 
57 #include <sys/cdefs.h>
58 __KERNEL_RCSID(0, "$NetBSD: viapcib.c,v 1.17 2019/12/22 23:23:30 thorpej Exp $");
59 
60 #include <sys/types.h>
61 #include <sys/param.h>
62 #include <sys/systm.h>
63 #include <sys/device.h>
64 #include <sys/mutex.h>
65 #include <sys/bus.h>
66 
67 #include <dev/pci/pcireg.h>
68 #include <dev/pci/pcivar.h>
69 #include <dev/pci/pcidevs.h>
70 
71 #include <dev/i2c/i2cvar.h>
72 
73 #include <i386/pci/viapcibreg.h>
74 #include <x86/pci/pcibvar.h>
75 
76 /*#define VIAPCIB_DEBUG*/
77 
78 #ifdef	VIAPCIB_DEBUG
79 #define	DPRINTF(x)	printf x
80 #else
81 #define	DPRINTF(x)
82 #endif
83 
84 struct viapcib_softc {
85 	/* we call pcibattach(), which assumes softc starts like this: */
86 	struct pcib_softc sc_pcib;
87 
88 	bus_space_tag_t	sc_iot;
89 	bus_space_handle_t sc_ioh;
90 	struct i2c_controller sc_i2c;
91 
92 	int sc_revision;
93 };
94 
95 static int	viapcib_match(device_t, cfdata_t, void *);
96 static void	viapcib_attach(device_t, device_t, void *);
97 
98 static int	viapcib_clear(struct viapcib_softc *);
99 static int	viapcib_busy(struct viapcib_softc *);
100 
101 #define		viapcib_smbus_read(sc, o) \
102 	bus_space_read_1((sc)->sc_iot, (sc)->sc_ioh, (o))
103 #define		viapcib_smbus_write(sc, o, v) \
104 	bus_space_write_1((sc)->sc_iot, (sc)->sc_ioh, (o), (v))
105 
106 #define	VIAPCIB_SMBUS_TIMEOUT	10000
107 
108 static int	viapcib_exec(void *, i2c_op_t, i2c_addr_t, const void *,
109 			     size_t, void *, size_t, int);
110 
111 /* SMBus operations */
112 static int      viapcib_smbus_quick_write(void *, i2c_addr_t);
113 static int      viapcib_smbus_quick_read(void *, i2c_addr_t);
114 static int      viapcib_smbus_send_byte(void *, i2c_addr_t, uint8_t);
115 static int      viapcib_smbus_receive_byte(void *, i2c_addr_t,
116                                            uint8_t *);
117 static int      viapcib_smbus_read_byte(void *, i2c_addr_t, uint8_t,
118 					int8_t *);
119 static int      viapcib_smbus_write_byte(void *, i2c_addr_t, uint8_t,
120 					 int8_t);
121 static int      viapcib_smbus_read_word(void *, i2c_addr_t, uint8_t,
122 					int16_t *);
123 static int      viapcib_smbus_write_word(void *, i2c_addr_t, uint8_t,
124 					 int16_t);
125 static int      viapcib_smbus_block_write(void *, i2c_addr_t, uint8_t,
126 					  int, void *);
127 static int      viapcib_smbus_block_read(void *, i2c_addr_t, uint8_t,
128 					 int, void *);
129 /* XXX Should be moved to smbus layer */
130 #define	SMB_MAXBLOCKSIZE	32
131 
132 CFATTACH_DECL_NEW(viapcib, sizeof(struct viapcib_softc),
133     viapcib_match, viapcib_attach, NULL, NULL);
134 
135 static int
136 viapcib_match(device_t parent, cfdata_t match, void *opaque)
137 {
138 	struct pci_attach_args *pa = opaque;
139 
140 	if (PCI_VENDOR(pa->pa_id) != PCI_VENDOR_VIATECH)
141 		return 0;
142 
143 	switch (PCI_PRODUCT(pa->pa_id)) {
144 	case PCI_PRODUCT_VIATECH_VT8235:
145 	case PCI_PRODUCT_VIATECH_VT8237:
146 	case PCI_PRODUCT_VIATECH_VT8237A_ISA:
147 		return 2; /* match above generic pcib(4) */
148 	}
149 
150 	return 0;
151 }
152 
153 static void
154 viapcib_attach(device_t parent, device_t self, void *opaque)
155 {
156 	struct viapcib_softc *sc = device_private(self);
157 	struct pci_attach_args *pa = opaque;
158 	pcireg_t addr, val;
159 
160 	/* XXX Only the 8235 is supported for now */
161 	sc->sc_iot = pa->pa_iot;
162 	addr = pci_conf_read(pa->pa_pc, pa->pa_tag, SMB_BASE3);
163 	addr &= 0xfff0;
164 	if (bus_space_map(sc->sc_iot, addr, 8, 0, &sc->sc_ioh)) {
165 		printf(": failed to map SMBus I/O space\n");
166 		addr = 0;
167 		goto core_pcib;
168 	}
169 
170 	val = pci_conf_read(pa->pa_pc, pa->pa_tag, SMB_HOST_CONFIG);
171 	if ((val & 0x10000) == 0) {
172 		printf(": SMBus is disabled\n");
173 		addr = 0;
174 		/* XXX We can enable the SMBus here by writing 1 to
175 		 * SMB_HOST_CONFIG, but do we want to?
176 		 */
177 		goto core_pcib;
178 	}
179 
180 #ifdef VIAPCIB_DEBUG
181 	switch (val & 0x0e) {
182 	case 8:
183 		printf(": interrupting at irq 9\n");
184 		break;
185 	case 0:
186 		printf(": interrupting at SMI#\n");
187 		break;
188 	default:
189 		printf(": interrupt misconfigured\n");
190 		break;
191 	}
192 #endif /* !VIAPCIB_DEBUG */
193 
194 	val = pci_conf_read(pa->pa_pc, pa->pa_tag, SMB_REVISION);
195 	sc->sc_revision = val >> 16;
196 
197 core_pcib:
198 	pcibattach(parent, self, opaque);
199 
200 	if (addr != 0) {
201 		struct i2cbus_attach_args iba;
202 		uint8_t b;
203 
204 		printf("%s: SMBus found at 0x%x (revision 0x%x)\n",
205 		    device_xname(self), addr, sc->sc_revision);
206 
207 		/* Disable slave function */
208 		b = viapcib_smbus_read(sc, SMBSLVCNT);
209 		viapcib_smbus_write(sc, SMBSLVCNT, b & ~1);
210 
211 		memset(&iba, 0, sizeof(iba));
212 		iba.iba_tag = &sc->sc_i2c;
213 		iic_tag_init(&sc->sc_i2c);
214 		iba.iba_tag->ic_cookie = (void *)sc;
215 		iba.iba_tag->ic_exec = viapcib_exec;
216 
217 		config_found_ia(self, "i2cbus", &iba, iicbus_print);
218 	}
219 }
220 
221 static int
222 viapcib_wait(struct viapcib_softc *sc)
223 {
224 	int rv, timeout;
225 	uint8_t val = 0;
226 
227 	timeout = VIAPCIB_SMBUS_TIMEOUT;
228 	rv = 0;
229 
230 	while (timeout--) {
231 		val = viapcib_smbus_read(sc, SMBHSTSTS);
232 		if (!(val & SMBHSTSTS_BUSY) && (val & SMBHSTSTS_INTR))
233 			break;
234 		DELAY(10);
235 	}
236 
237 	if (timeout == 0)
238 		rv = EBUSY;
239 
240 	if ((val & SMBHSTSTS_FAILED) || (val & SMBHSTSTS_COLLISION) ||
241 	    (val & SMBHSTSTS_ERROR))
242 		rv = EIO;
243 
244 	viapcib_clear(sc);
245 
246 	return rv;
247 }
248 
249 static int
250 viapcib_clear(struct viapcib_softc *sc)
251 {
252 	viapcib_smbus_write(sc, SMBHSTSTS,
253 	    (SMBHSTSTS_FAILED | SMBHSTSTS_COLLISION | SMBHSTSTS_ERROR |
254 	     SMBHSTSTS_INTR));
255 	DELAY(10);
256 
257 	return 0;
258 }
259 
260 static int
261 viapcib_busy(struct viapcib_softc *sc)
262 {
263 	uint8_t val;
264 
265 	val = viapcib_smbus_read(sc, SMBHSTSTS);
266 
267 	return (val & SMBHSTSTS_BUSY);
268 }
269 
270 static int
271 viapcib_exec(void *opaque, i2c_op_t op, i2c_addr_t addr, const void *vcmd,
272     size_t cmdlen, void *vbuf, size_t buflen, int flags)
273 {
274 	struct viapcib_softc *sc;
275 	uint8_t cmd;
276 	int rv = -1;
277 
278 	DPRINTF(("viapcib_exec(%p, 0x%x, 0x%x, %p, %d, %p, %d, 0x%x)\n",
279 	    opaque, op, addr, vcmd, cmdlen, vbuf, buflen, flags));
280 
281 	sc = (struct viapcib_softc *)opaque;
282 
283 	if (op != I2C_OP_READ_WITH_STOP &&
284 	    op != I2C_OP_WRITE_WITH_STOP)
285 		return -1;
286 
287 	if (cmdlen > 0)
288 		cmd = *(uint8_t *)(__UNCONST(vcmd)); /* XXX */
289 
290 	switch (cmdlen) {
291 	case 0:
292 		switch (buflen) {
293 		case 0:
294 			/* SMBus quick read/write */
295 			if (I2C_OP_READ_P(op))
296 				rv = viapcib_smbus_quick_read(sc, addr);
297 			else
298 				rv = viapcib_smbus_quick_write(sc, addr);
299 
300 			return rv;
301 		case 1:
302 			/* SMBus send/receive byte */
303 			if (I2C_OP_READ_P(op))
304 				rv = viapcib_smbus_send_byte(sc, addr,
305 				    *(uint8_t *)vbuf);
306 			else
307 				rv = viapcib_smbus_receive_byte(sc, addr,
308 				    (uint8_t *)vbuf);
309 			return rv;
310 		default:
311 			return -1;
312 		}
313 	case 1:
314 		switch (buflen) {
315 		case 0:
316 			return -1;
317 		case 1:
318 			/* SMBus read/write byte */
319 			if (I2C_OP_READ_P(op))
320 				rv = viapcib_smbus_read_byte(sc, addr,
321 				    cmd, (uint8_t *)vbuf);
322 			else
323 				rv = viapcib_smbus_write_byte(sc, addr,
324 				    cmd, *(uint8_t *)vbuf);
325 			return rv;
326 		case 2:
327 			/* SMBus read/write word */
328 			if (I2C_OP_READ_P(op))
329 				rv = viapcib_smbus_read_word(sc, addr,
330 				    cmd, (uint16_t *)vbuf);
331 			else
332 				rv = viapcib_smbus_write_word(sc, addr,
333 				    cmd, *(uint16_t *)vbuf);
334 			return rv;
335 		default:
336 			/* SMBus read/write block */
337 			if (I2C_OP_READ_P(op))
338 				rv = viapcib_smbus_block_read(sc, addr,
339 				    cmd, buflen, vbuf);
340 			else
341 				rv = viapcib_smbus_block_write(sc, addr,
342 				    cmd, buflen, vbuf);
343 			return rv;
344 		}
345 	}
346 
347 	return -1; /* XXX ??? */
348 }
349 
350 static int
351 viapcib_smbus_quick_write(void *opaque, i2c_addr_t slave)
352 {
353 	struct viapcib_softc *sc;
354 
355 	sc = (struct viapcib_softc *)opaque;
356 
357 	DPRINTF(("viapcib_smbus_quick_write(%p, 0x%x)\n", opaque, slave));
358 
359 	viapcib_clear(sc);
360 	if (viapcib_busy(sc))
361 		return EBUSY;
362 
363 	viapcib_smbus_write(sc, SMBHSTADD, (slave & 0x7f) << 1);
364 	viapcib_smbus_write(sc, SMBHSTCNT, SMBHSTCNT_QUICK);
365 	if (viapcib_wait(sc))
366 		return EBUSY;
367 	viapcib_smbus_write(sc, SMBHSTCNT, SMBHSTCNT_QUICK | SMBHSTCNT_START);
368 
369 	return viapcib_wait(sc);
370 }
371 
372 static int
373 viapcib_smbus_quick_read(void *opaque, i2c_addr_t slave)
374 {
375 	struct viapcib_softc *sc;
376 
377 	sc = (struct viapcib_softc *)opaque;
378 
379 	DPRINTF(("viapcib_smbus_quick_read(%p, 0x%x)\n", opaque, slave));
380 
381 	viapcib_clear(sc);
382 	if (viapcib_busy(sc))
383 		return EBUSY;
384 
385 	viapcib_smbus_write(sc, SMBHSTADD, ((slave & 0x7f) << 1) | 1);
386 	viapcib_smbus_write(sc, SMBHSTCNT, SMBHSTCNT_QUICK);
387 	if (viapcib_wait(sc))
388 		return EBUSY;
389 	viapcib_smbus_write(sc, SMBHSTCNT, SMBHSTCNT_QUICK | SMBHSTCNT_START);
390 
391 	return viapcib_wait(sc);
392 }
393 
394 static int
395 viapcib_smbus_send_byte(void *opaque, i2c_addr_t slave, uint8_t byte)
396 {
397 	struct viapcib_softc *sc;
398 
399 	sc = (struct viapcib_softc *)opaque;
400 
401 	DPRINTF(("viapcib_smbus_send_byte(%p, 0x%x, 0x%x)\n", opaque,
402 	    slave, byte));
403 
404 	viapcib_clear(sc);
405 	if (viapcib_busy(sc))
406 		return EBUSY;
407 
408 	viapcib_smbus_write(sc, SMBHSTADD, (slave & 0x7f) << 1);
409 	viapcib_smbus_write(sc, SMBHSTCMD, byte);
410 	viapcib_smbus_write(sc, SMBHSTCNT, SMBHSTCNT_SENDRECV);
411 	if (viapcib_wait(sc))
412 		return EBUSY;
413 	viapcib_smbus_write(sc, SMBHSTCNT,
414 	    SMBHSTCNT_START | SMBHSTCNT_SENDRECV);
415 
416 	return viapcib_wait(sc);
417 }
418 
419 static int
420 viapcib_smbus_receive_byte(void *opaque, i2c_addr_t slave, uint8_t *pbyte)
421 {
422 	struct viapcib_softc *sc;
423 	int rv;
424 
425 	sc = (struct viapcib_softc *)opaque;
426 
427 	DPRINTF(("viapcib_smbus_receive_byte(%p, 0x%x, %p)\n", opaque,
428 	    slave, pbyte));
429 
430 	viapcib_clear(sc);
431 	if (viapcib_busy(sc))
432 		return EBUSY;
433 
434 	viapcib_smbus_write(sc, SMBHSTADD, ((slave & 0x7f) << 1) | 1);
435 	viapcib_smbus_write(sc, SMBHSTCNT, SMBHSTCNT_SENDRECV);
436 	if (viapcib_wait(sc))
437 		return EBUSY;
438 	viapcib_smbus_write(sc, SMBHSTCNT,
439 	    SMBHSTCNT_START | SMBHSTCNT_SENDRECV);
440 
441 	rv = viapcib_wait(sc);
442 	if (rv == 0)
443 		*pbyte = viapcib_smbus_read(sc, SMBHSTDAT0);
444 
445 	return rv;
446 }
447 
448 static int
449 viapcib_smbus_write_byte(void *opaque, i2c_addr_t slave, uint8_t cmd,
450 		   int8_t byte)
451 {
452 	struct viapcib_softc *sc;
453 
454 	sc = (struct viapcib_softc *)opaque;
455 
456 	DPRINTF(("viapcib_smbus_write_byte(%p, 0x%x, 0x%x, 0x%x)\n", opaque,
457 	    slave, cmd, byte));
458 
459 	viapcib_clear(sc);
460 	if (viapcib_busy(sc))
461 		return EBUSY;
462 
463 	viapcib_smbus_write(sc, SMBHSTADD, (slave & 0x7f) << 1);
464 	viapcib_smbus_write(sc, SMBHSTCMD, cmd);
465 	viapcib_smbus_write(sc, SMBHSTDAT0, byte);
466 	viapcib_smbus_write(sc, SMBHSTCNT, SMBHSTCNT_BYTE);
467 	if (viapcib_wait(sc))
468 		return EBUSY;
469 	viapcib_smbus_write(sc, SMBHSTCNT, SMBHSTCNT_START | SMBHSTCNT_BYTE);
470 
471 	return viapcib_wait(sc);
472 }
473 
474 static int
475 viapcib_smbus_read_byte(void *opaque, i2c_addr_t slave, uint8_t cmd,
476 		  int8_t *pbyte)
477 {
478 	struct viapcib_softc *sc;
479 	int rv;
480 
481 	sc = (struct viapcib_softc *)opaque;
482 
483 	DPRINTF(("viapcib_smbus_read_byte(%p, 0x%x, 0x%x, %p)\n", opaque,
484 	    slave, cmd, pbyte));
485 
486 	viapcib_clear(sc);
487 	if (viapcib_busy(sc))
488 		return EBUSY;
489 
490 	viapcib_smbus_write(sc, SMBHSTADD, ((slave & 0x7f) << 1) | 1);
491 	viapcib_smbus_write(sc, SMBHSTCMD, cmd);
492 	viapcib_smbus_write(sc, SMBHSTCNT, SMBHSTCNT_BYTE);
493 	if (viapcib_wait(sc))
494 		return EBUSY;
495 	viapcib_smbus_write(sc, SMBHSTCNT, SMBHSTCNT_START | SMBHSTCNT_BYTE);
496 	rv = viapcib_wait(sc);
497 	if (rv == 0)
498 		*pbyte = viapcib_smbus_read(sc, SMBHSTDAT0);
499 
500 	return rv;
501 }
502 
503 static int
504 viapcib_smbus_write_word(void *opaque, i2c_addr_t slave, uint8_t cmd,
505 		   int16_t word)
506 {
507 	struct viapcib_softc *sc;
508 
509 	sc = (struct viapcib_softc *)opaque;
510 
511 	DPRINTF(("viapcib_smbus_write_word(%p, 0x%x, 0x%x, 0x%x)\n", opaque,
512 	    slave, cmd, word));
513 
514 	viapcib_clear(sc);
515 	if (viapcib_busy(sc))
516 		return EBUSY;
517 
518 	viapcib_smbus_write(sc, SMBHSTADD, (slave & 0x7f) << 1);
519 	viapcib_smbus_write(sc, SMBHSTCMD, cmd);
520 	viapcib_smbus_write(sc, SMBHSTDAT0, word & 0x00ff);
521 	viapcib_smbus_write(sc, SMBHSTDAT1, (word & 0xff00) >> 8);
522 	viapcib_smbus_write(sc, SMBHSTCNT, SMBHSTCNT_WORD);
523 	if (viapcib_wait(sc))
524 		return EBUSY;
525 	viapcib_smbus_write(sc, SMBHSTCNT, SMBHSTCNT_START | SMBHSTCNT_WORD);
526 
527 	return viapcib_wait(sc);
528 }
529 
530 static int
531 viapcib_smbus_read_word(void *opaque, i2c_addr_t slave, uint8_t cmd,
532 		  int16_t *pword)
533 {
534 	struct viapcib_softc *sc;
535 	int rv;
536 	int8_t high, low;
537 
538 	sc = (struct viapcib_softc *)opaque;
539 
540 	DPRINTF(("viapcib_smbus_read_word(%p, 0x%x, 0x%x, %p)\n", opaque,
541 	    slave, cmd, pword));
542 
543 	viapcib_clear(sc);
544 	if (viapcib_busy(sc))
545 		return EBUSY;
546 
547 	viapcib_smbus_write(sc, SMBHSTADD, ((slave & 0x7f) << 1) | 1);
548 	viapcib_smbus_write(sc, SMBHSTCMD, cmd);
549 	viapcib_smbus_write(sc, SMBHSTCNT, SMBHSTCNT_WORD);
550 	if (viapcib_wait(sc))
551 		return EBUSY;
552 	viapcib_smbus_write(sc, SMBHSTCNT, SMBHSTCNT_START | SMBHSTCNT_WORD);
553 
554 	rv = viapcib_wait(sc);
555 	if (rv == 0) {
556 		low = viapcib_smbus_read(sc, SMBHSTDAT0);
557 		high = viapcib_smbus_read(sc, SMBHSTDAT1);
558 		*pword = ((high & 0xff) << 8) | (low & 0xff);
559 	}
560 
561 	return rv;
562 }
563 
564 static int
565 viapcib_smbus_block_write(void *opaque, i2c_addr_t slave, uint8_t cmd,
566 		    int cnt, void *data)
567 {
568 	struct viapcib_softc *sc;
569 	int8_t *buf;
570 	int remain, len, i;
571 	int rv;
572 
573 	sc = (struct viapcib_softc *)opaque;
574 	buf = (int8_t *)data;
575 	rv = 0;
576 
577 	DPRINTF(("viapcib_smbus_block_write(%p, 0x%x, 0x%x, %d, %p)\n",
578 	    opaque, slave, cmd, cnt, data));
579 
580 	viapcib_clear(sc);
581 	if (viapcib_busy(sc))
582 		return EBUSY;
583 
584 	remain = cnt;
585 	while (remain) {
586 		len = uimin(remain, SMB_MAXBLOCKSIZE);
587 
588 		viapcib_smbus_write(sc, SMBHSTADD, (slave & 0x7f) << 1);
589 		viapcib_smbus_write(sc, SMBHSTCMD, cmd);
590 		viapcib_smbus_write(sc, SMBHSTDAT0, len);
591 		i = viapcib_smbus_read(sc, SMBHSTCNT);
592 		/* XXX FreeBSD does this, but it looks wrong */
593 		for (i = 0; i < len; i++) {
594 			viapcib_smbus_write(sc, SMBBLKDAT,
595 			    buf[cnt - remain + i]);
596 		}
597 		viapcib_smbus_write(sc, SMBHSTCNT, SMBHSTCNT_BLOCK);
598 		if (viapcib_wait(sc))
599 			return EBUSY;
600 		viapcib_smbus_write(sc, SMBHSTCNT,
601 		    SMBHSTCNT_START | SMBHSTCNT_BLOCK);
602 		if (viapcib_wait(sc))
603 			return EBUSY;
604 
605 		remain -= len;
606 	}
607 
608 	return rv;
609 }
610 
611 static int
612 viapcib_smbus_block_read(void *opaque, i2c_addr_t slave, uint8_t cmd,
613 			 int cnt, void *data)
614 {
615 	struct viapcib_softc *sc;
616 	int8_t *buf;
617 	int remain, len, i;
618 	int rv;
619 
620 	sc = (struct viapcib_softc *)opaque;
621 	buf = (int8_t *)data;
622 	rv = 0;
623 
624 	DPRINTF(("viapcib_smbus_block_read(%p, 0x%x, 0x%x, %d, %p)\n",
625 	    opaque, slave, cmd, cnt, data));
626 
627 	viapcib_clear(sc);
628 	if (viapcib_busy(sc))
629 		return EBUSY;
630 
631 	remain = cnt;
632 	while (remain) {
633 		viapcib_smbus_write(sc, SMBHSTADD, ((slave & 0x7f) << 1) | 1);
634 		viapcib_smbus_write(sc, SMBHSTCMD, cmd);
635 		viapcib_smbus_write(sc, SMBHSTCNT, SMBHSTCNT_BLOCK);
636 		if (viapcib_wait(sc))
637 			return EBUSY;
638 		viapcib_smbus_write(sc, SMBHSTCNT,
639 		    SMBHSTCNT_START | SMBHSTCNT_BLOCK);
640 		if (viapcib_wait(sc))
641 			return EBUSY;
642 
643 		len = viapcib_smbus_read(sc, SMBHSTDAT0);
644 		i = viapcib_smbus_read(sc, SMBHSTCNT);
645 
646 		len = uimin(len, remain);
647 
648 		/* FreeBSD does this too... */
649 		for (i = 0; i < len; i++) {
650 			buf[cnt - remain + i] =
651 			    viapcib_smbus_read(sc, SMBBLKDAT);
652 		}
653 
654 		remain -= len;
655 	}
656 
657 	return rv;
658 }
659