xref: /netbsd-src/sys/arch/i386/pci/sis85c503.c (revision 3cec974c61d7fac0a37c0377723a33214a458c8b)
1 /*	$NetBSD: sis85c503.c,v 1.2 2000/07/18 11:24:09 soda Exp $	*/
2 
3 /*-
4  * Copyright (c) 1999 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9  * NASA Ames Research Center.
10  *
11  * Redistribution and use in source and binary forms, with or without
12  * modification, are permitted provided that the following conditions
13  * are met:
14  * 1. Redistributions of source code must retain the above copyright
15  *    notice, this list of conditions and the following disclaimer.
16  * 2. Redistributions in binary form must reproduce the above copyright
17  *    notice, this list of conditions and the following disclaimer in the
18  *    documentation and/or other materials provided with the distribution.
19  * 3. All advertising materials mentioning features or use of this software
20  *    must display the following acknowledgement:
21  *	This product includes software developed by the NetBSD
22  *	Foundation, Inc. and its contributors.
23  * 4. Neither the name of The NetBSD Foundation nor the names of its
24  *    contributors may be used to endorse or promote products derived
25  *    from this software without specific prior written permission.
26  *
27  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37  * POSSIBILITY OF SUCH DAMAGE.
38  */
39 
40 /*
41  * Copyright (c) 1999, by UCHIYAMA Yasushi
42  * All rights reserved.
43  *
44  * Redistribution and use in source and binary forms, with or without
45  * modification, are permitted provided that the following conditions
46  * are met:
47  * 1. Redistributions of source code must retain the above copyright
48  *    notice, this list of conditions and the following disclaimer.
49  * 2. The name of the developer may NOT be used to endorse or promote products
50  *    derived from this software without specific prior written permission.
51  *
52  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
53  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
54  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
55  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
56  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
57  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
58  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
59  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
60  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
61  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
62  * SUCH DAMAGE.
63  */
64 
65 /*
66  * Support for the SiS 85c503 PCI-ISA bridge interrupt controller.
67  */
68 
69 #include <sys/param.h>
70 #include <sys/systm.h>
71 #include <sys/device.h>
72 
73 #include <machine/intr.h>
74 #include <machine/bus.h>
75 
76 #include <dev/pci/pcivar.h>
77 #include <dev/pci/pcireg.h>
78 #include <dev/pci/pcidevs.h>
79 
80 #include <i386/pci/pci_intr_fixup.h>
81 #include <i386/pci/sis85c503reg.h>
82 #include <i386/pci/piixvar.h>
83 
84 int	sis85c503_getclink __P((pciintr_icu_handle_t, int, int *));
85 int	sis85c503_get_intr __P((pciintr_icu_handle_t, int, int *));
86 int	sis85c503_set_intr __P((pciintr_icu_handle_t, int, int));
87 
88 const struct pciintr_icu sis85c503_pci_icu = {
89 	sis85c503_getclink,
90 	sis85c503_get_intr,
91 	sis85c503_set_intr,
92 	piix_get_trigger,
93 	piix_set_trigger,
94 };
95 
96 int
97 sis85c503_init(pc, iot, tag, ptagp, phandp)
98 	pci_chipset_tag_t pc;
99 	bus_space_tag_t iot;
100 	pcitag_t tag;
101 	pciintr_icu_tag_t *ptagp;
102 	pciintr_icu_handle_t *phandp;
103 {
104 
105 	if (piix_init(pc, iot, tag, ptagp, phandp) == 0) {
106 		*ptagp = &sis85c503_pci_icu;
107 		return (0);
108 	}
109 
110 	return (1);
111 }
112 
113 int
114 sis85c503_getclink(v, link, clinkp)
115 	pciintr_icu_handle_t v;
116 	int link, *clinkp;
117 {
118 
119 	/* Pattern 1: simple. */
120 	if (link >= 1 && link <= 4) {
121 		*clinkp = SIS85C503_CFG_PIRQ_REGSTART + link - 1;
122 		return (0);
123 	}
124 
125 	/* Pattern 2: configuration register offset */
126 	if (link >= SIS85C503_CFG_PIRQ_REGSTART &&
127 	    link <= SIS85C503_CFG_PIRQ_REGEND) {
128 		*clinkp = link;
129 		return (0);
130 	}
131 
132 	return (1);
133 }
134 
135 int
136 sis85c503_get_intr(v, clink, irqp)
137 	pciintr_icu_handle_t v;
138 	int clink, *irqp;
139 {
140 	struct piix_handle *ph = v;
141 	pcireg_t reg;
142 
143 	if (SIS85C503_LEGAL_LINK(clink) == 0)
144 		return (1);
145 
146 	reg = pci_conf_read(ph->ph_pc, ph->ph_tag,
147 	    SIS85C503_CFG_PIRQ_REGOFS(clink));
148 	reg = SIS85C503_CFG_PIRQ_REG(reg, clink);
149 
150 	if (reg & SIS85C503_CFG_PIRQ_ROUTE_DISABLE)
151 		*irqp = I386_PCI_INTERRUPT_LINE_NO_CONNECTION;
152 	else
153 		*irqp = reg & SIS85C503_CFG_PIRQ_INTR_MASK;
154 
155 	return (0);
156 }
157 
158 int
159 sis85c503_set_intr(v, clink, irq)
160 	pciintr_icu_handle_t v;
161 	int clink, irq;
162 {
163 	struct piix_handle *ph = v;
164 	int shift;
165 	pcireg_t reg;
166 
167 	if (SIS85C503_LEGAL_LINK(clink) == 0 || SIS85C503_LEGAL_IRQ(irq) == 0)
168 		return (1);
169 
170 	reg = pci_conf_read(ph->ph_pc, ph->ph_tag,
171 	    SIS85C503_CFG_PIRQ_REGOFS(clink));
172 	shift = SIS85C503_CFG_PIRQ_SHIFT(clink);
173 	reg &= ~((SIS85C503_CFG_PIRQ_ROUTE_DISABLE |
174 	    SIS85C503_CFG_PIRQ_INTR_MASK) << shift);
175 	reg |= (irq << shift);
176 	pci_conf_write(ph->ph_pc, ph->ph_tag, SIS85C503_CFG_PIRQ_REGOFS(clink),
177 	    reg);
178 
179 	return (0);
180 }
181