xref: /netbsd-src/sys/arch/i386/pci/pci_intr_fixup.c (revision 37b34d511dea595d3ba03a661cf3b775038ea5f8)
1 /*	$NetBSD: pci_intr_fixup.c,v 1.21 2002/09/20 14:52:39 kanaoka Exp $	*/
2 
3 /*-
4  * Copyright (c) 1999 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9  * NASA Ames Research Center.
10  *
11  * Redistribution and use in source and binary forms, with or without
12  * modification, are permitted provided that the following conditions
13  * are met:
14  * 1. Redistributions of source code must retain the above copyright
15  *    notice, this list of conditions and the following disclaimer.
16  * 2. Redistributions in binary form must reproduce the above copyright
17  *    notice, this list of conditions and the following disclaimer in the
18  *    documentation and/or other materials provided with the distribution.
19  * 3. All advertising materials mentioning features or use of this software
20  *    must display the following acknowledgement:
21  *	This product includes software developed by the NetBSD
22  *	Foundation, Inc. and its contributors.
23  * 4. Neither the name of The NetBSD Foundation nor the names of its
24  *    contributors may be used to endorse or promote products derived
25  *    from this software without specific prior written permission.
26  *
27  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37  * POSSIBILITY OF SUCH DAMAGE.
38  */
39 
40 /*
41  * Copyright (c) 1999, by UCHIYAMA Yasushi
42  * All rights reserved.
43  *
44  * Redistribution and use in source and binary forms, with or without
45  * modification, are permitted provided that the following conditions
46  * are met:
47  * 1. Redistributions of source code must retain the above copyright
48  *    notice, this list of conditions and the following disclaimer.
49  * 2. The name of the developer may NOT be used to endorse or promote products
50  *    derived from this software without specific prior written permission.
51  *
52  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
53  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
54  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
55  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
56  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
57  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
58  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
59  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
60  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
61  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
62  * SUCH DAMAGE.
63  */
64 
65 /*
66  * PCI Interrupt Router support.
67  */
68 
69 #include <sys/cdefs.h>
70 __KERNEL_RCSID(0, "$NetBSD: pci_intr_fixup.c,v 1.21 2002/09/20 14:52:39 kanaoka Exp $");
71 
72 #include "opt_pcibios.h"
73 
74 #include <sys/param.h>
75 #include <sys/systm.h>
76 #include <sys/kernel.h>
77 #include <sys/malloc.h>
78 #include <sys/queue.h>
79 #include <sys/device.h>
80 
81 #include <machine/bus.h>
82 #include <machine/intr.h>
83 
84 #include <dev/pci/pcireg.h>
85 #include <dev/pci/pcivar.h>
86 #include <dev/pci/pcidevs.h>
87 
88 #include <i386/isa/icu.h>
89 #include <i386/pci/pci_intr_fixup.h>
90 #include <i386/pci/pcibios.h>
91 
92 struct pciintr_link_map {
93 	int link;
94 	int clink;
95 	int irq;
96 	u_int16_t bitmap;
97 	int fixup_stage;
98 	SIMPLEQ_ENTRY(pciintr_link_map) list;
99 };
100 
101 pciintr_icu_tag_t pciintr_icu_tag;
102 pciintr_icu_handle_t pciintr_icu_handle;
103 
104 #ifdef PCIBIOS_IRQS_HINT
105 int pcibios_irqs_hint = PCIBIOS_IRQS_HINT;
106 #endif
107 
108 struct pciintr_link_map *pciintr_link_lookup __P((int));
109 struct pciintr_link_map *pciintr_link_alloc __P((struct pcibios_intr_routing *,
110 	int));
111 struct pcibios_intr_routing *pciintr_pir_lookup __P((int, int));
112 static int pciintr_bitmap_count_irq __P((int, int *));
113 static int pciintr_bitmap_find_lowest_irq __P((int, int *));
114 int	pciintr_link_init __P((void));
115 #ifdef PCIBIOS_INTR_GUESS
116 int	pciintr_guess_irq __P((void));
117 #endif
118 int	pciintr_link_fixup __P((void));
119 int	pciintr_link_route __P((u_int16_t *));
120 int	pciintr_irq_release __P((u_int16_t *));
121 int	pciintr_header_fixup __P((pci_chipset_tag_t));
122 void	pciintr_do_header_fixup __P((pci_chipset_tag_t, pcitag_t, void*));
123 
124 SIMPLEQ_HEAD(, pciintr_link_map) pciintr_link_map_list;
125 
126 const struct pciintr_icu_table {
127 	pci_vendor_id_t	piit_vendor;
128 	pci_product_id_t piit_product;
129 	int (*piit_init) __P((pci_chipset_tag_t,
130 		bus_space_tag_t, pcitag_t, pciintr_icu_tag_t *,
131 		pciintr_icu_handle_t *));
132 } pciintr_icu_table[] = {
133 	{ PCI_VENDOR_INTEL,	PCI_PRODUCT_INTEL_82371MX,
134 	  piix_init },
135 	{ PCI_VENDOR_INTEL,	PCI_PRODUCT_INTEL_82371AB_ISA,
136 	  piix_init },
137 	{ PCI_VENDOR_INTEL,	PCI_PRODUCT_INTEL_82371FB_ISA,
138 	  piix_init },
139 	{ PCI_VENDOR_INTEL,	PCI_PRODUCT_INTEL_82371SB_ISA,
140 	  piix_init },
141 	{ PCI_VENDOR_INTEL,	PCI_PRODUCT_INTEL_82801BA_LPC,
142 	  piix_init },
143 	{ PCI_VENDOR_INTEL,	PCI_PRODUCT_INTEL_82801BAM_LPC,
144 	  piix_init },
145 	{ PCI_VENDOR_INTEL,	PCI_PRODUCT_INTEL_82801DB_LPC,
146 	  piix_init },
147 
148 	{ PCI_VENDOR_OPTI,	PCI_PRODUCT_OPTI_82C558,
149 	  opti82c558_init },
150 	{ PCI_VENDOR_OPTI,	PCI_PRODUCT_OPTI_82C700,
151 	  opti82c700_init },
152 
153 	{ PCI_VENDOR_VIATECH,	PCI_PRODUCT_VIATECH_VT82C586_ISA,
154 	  via82c586_init },
155 	{ PCI_VENDOR_VIATECH,	PCI_PRODUCT_VIATECH_VT82C686A_ISA,
156 	  via82c586_init },
157 
158 	{ PCI_VENDOR_SIS,	PCI_PRODUCT_SIS_85C503,
159 	  sis85c503_init },
160 
161 	{ PCI_VENDOR_AMD,	PCI_PRODUCT_AMD_PBC756_PMC,
162 	  amd756_init },
163 
164 	{ PCI_VENDOR_ALI,	PCI_PRODUCT_ALI_M1543,
165 	  ali1543_init },
166 
167 	{ 0,			0,
168 	  NULL },
169 };
170 
171 const struct pciintr_icu_table *pciintr_icu_lookup __P((pcireg_t));
172 
173 const struct pciintr_icu_table *
174 pciintr_icu_lookup(id)
175 	pcireg_t id;
176 {
177 	const struct pciintr_icu_table *piit;
178 
179 	for (piit = pciintr_icu_table;
180 	     piit->piit_init != NULL;
181 	     piit++) {
182 		if (PCI_VENDOR(id) == piit->piit_vendor &&
183 		    PCI_PRODUCT(id) == piit->piit_product)
184 			return (piit);
185 	}
186 
187 	return (NULL);
188 }
189 
190 struct pciintr_link_map *
191 pciintr_link_lookup(link)
192 	int link;
193 {
194 	struct pciintr_link_map *l;
195 
196 	SIMPLEQ_FOREACH(l, &pciintr_link_map_list, list) {
197 		if (l->link == link)
198 			return (l);
199 	}
200 
201 	return (NULL);
202 }
203 
204 struct pciintr_link_map *
205 pciintr_link_alloc(pir, pin)
206 	struct pcibios_intr_routing *pir;
207 	int pin;
208 {
209 	int link = pir->linkmap[pin].link, clink, irq;
210 	struct pciintr_link_map *l, *lstart;
211 
212 	if (pciintr_icu_tag != NULL) { /* compatible PCI ICU found */
213 		/*
214 		 * Get the canonical link value for this entry.
215 		 */
216 		if (pciintr_icu_getclink(pciintr_icu_tag, pciintr_icu_handle,
217 		    link, &clink) != 0) {
218 			/*
219 			 * ICU doesn't understand the link value.
220 			 * Just ignore this PIR entry.
221 			 */
222 #ifdef DIAGNOSTIC
223 			printf("pciintr_link_alloc: bus %d device %d: "
224 			    "link 0x%02x invalid\n",
225 			    pir->bus, PIR_DEVFUNC_DEVICE(pir->device), link);
226 #endif
227 			return (NULL);
228 		}
229 
230 		/*
231 		 * Check the link value by asking the ICU for the
232 		 * canonical link value.
233 		 * Also, determine if this PIRQ is mapped to an IRQ.
234 		 */
235 		if (pciintr_icu_get_intr(pciintr_icu_tag, pciintr_icu_handle,
236 		    clink, &irq) != 0) {
237 			/*
238 			 * ICU doesn't understand the canonical link value.
239 			 * Just ignore this PIR entry.
240 			 */
241 #ifdef DIAGNOSTIC
242 			printf("pciintr_link_alloc: "
243 			    "bus %d device %d link 0x%02x: "
244 			    "PIRQ 0x%02x invalid\n",
245 			    pir->bus, PIR_DEVFUNC_DEVICE(pir->device), link,
246 			    clink);
247 #endif
248 			return (NULL);
249 		}
250 	}
251 
252 	l = malloc(sizeof(*l), M_DEVBUF, M_NOWAIT);
253 	if (l == NULL)
254 		panic("pciintr_link_alloc");
255 
256 	memset(l, 0, sizeof(*l));
257 
258 	l->link = link;
259 	l->bitmap = pir->linkmap[pin].bitmap;
260 	if (pciintr_icu_tag != NULL) { /* compatible PCI ICU found */
261 		l->clink = clink;
262 		l->irq = irq; /* maybe I386_PCI_INTERRUPT_LINE_NO_CONNECTION */
263 	} else {
264 		l->clink = link; /* only for PCIBIOSVERBOSE diagnostic */
265 		l->irq = I386_PCI_INTERRUPT_LINE_NO_CONNECTION;
266 	}
267 
268 	lstart = SIMPLEQ_FIRST(&pciintr_link_map_list);
269 	if (lstart == NULL || lstart->link < l->link)
270 		SIMPLEQ_INSERT_TAIL(&pciintr_link_map_list, l, list);
271 	else
272 		SIMPLEQ_INSERT_HEAD(&pciintr_link_map_list, l, list);
273 
274 	return (l);
275 }
276 
277 struct pcibios_intr_routing *
278 pciintr_pir_lookup(bus, device)
279 	int bus, device;
280 {
281 	struct pcibios_intr_routing *pir;
282 	int entry;
283 
284 	if (pcibios_pir_table == NULL)
285 		return (NULL);
286 
287 	for (entry = 0; entry < pcibios_pir_table_nentries; entry++) {
288 		pir = &pcibios_pir_table[entry];
289 		if (pir->bus == bus &&
290 		    PIR_DEVFUNC_DEVICE(pir->device) == device)
291 			return (pir);
292 	}
293 
294 	return (NULL);
295 }
296 
297 static int
298 pciintr_bitmap_count_irq(irq_bitmap, irqp)
299 	int irq_bitmap, *irqp;
300 {
301 	int i, bit, count = 0, irq = I386_PCI_INTERRUPT_LINE_NO_CONNECTION;
302 
303 	if (irq_bitmap != 0) {
304 		for (i = 0, bit = 1; i < 16; i++, bit <<= 1) {
305 			if (irq_bitmap & bit) {
306 				irq = i;
307 				count++;
308 			}
309 		}
310 	}
311 	*irqp = irq;
312 	return (count);
313 }
314 
315 static int
316 pciintr_bitmap_find_lowest_irq(irq_bitmap, irqp)
317 	int irq_bitmap, *irqp;
318 {
319 	int i, bit;
320 
321 	if (irq_bitmap != 0) {
322 		for (i = 0, bit = 1; i < 16; i++, bit <<= 1) {
323 			if (irq_bitmap & bit) {
324 				*irqp = i;
325 				return (1); /* found */
326 			}
327 		}
328 	}
329 	return (0); /* not found */
330 }
331 
332 int
333 pciintr_link_init()
334 {
335 	int entry, pin, link;
336 	struct pcibios_intr_routing *pir;
337 	struct pciintr_link_map *l;
338 
339 	if (pcibios_pir_table == NULL) {
340 		/* No PIR table; can't do anything. */
341 		printf("pciintr_link_init: no PIR table\n");
342 		return (1);
343 	}
344 
345 	SIMPLEQ_INIT(&pciintr_link_map_list);
346 
347 	for (entry = 0; entry < pcibios_pir_table_nentries; entry++) {
348 		pir = &pcibios_pir_table[entry];
349 		for (pin = 0; pin < PCI_INTERRUPT_PIN_MAX; pin++) {
350 			link = pir->linkmap[pin].link;
351 			if (link == 0) {
352 				/* No connection for this pin. */
353 				continue;
354 			}
355 			/*
356 			 * Multiple devices may be wired to the same
357 			 * interrupt; check to see if we've seen this
358 			 * one already.  If not, allocate a new link
359 			 * map entry and stuff it in the map.
360 			 */
361 			l = pciintr_link_lookup(link);
362 			if (l == NULL) {
363 				(void) pciintr_link_alloc(pir, pin);
364 			} else if (pir->linkmap[pin].bitmap != l->bitmap) {
365 				/*
366 				 * violates PCI IRQ Routing Table Specification
367 				 */
368 #ifdef DIAGNOSTIC
369 				printf("pciintr_link_init: "
370 				    "bus %d device %d link 0x%02x: "
371 				    "bad irq bitmap 0x%04x, "
372 				    "should be 0x%04x\n",
373 				    pir->bus, PIR_DEVFUNC_DEVICE(pir->device),
374 				    link, pir->linkmap[pin].bitmap, l->bitmap);
375 #endif
376 				/* safer value. */
377 				l->bitmap &= pir->linkmap[pin].bitmap;
378 				/* XXX - or, should ignore this entry? */
379 			}
380 		}
381 	}
382 
383 	return (0);
384 }
385 
386 #ifdef PCIBIOS_INTR_GUESS
387 /*
388  * No compatible PCI ICU found.
389  * Hopes the BIOS already setup the ICU.
390  */
391 int
392 pciintr_guess_irq()
393 {
394 	struct pciintr_link_map *l;
395 	int irq, guessed = 0;
396 
397 	/*
398 	 * Stage 1: If only one IRQ is available for the link, use it.
399 	 */
400 	SIMPLEQ_FOREACH(l, &pciintr_link_map_list, list) {
401 		if (l->irq != I386_PCI_INTERRUPT_LINE_NO_CONNECTION)
402 			continue;
403 		if (pciintr_bitmap_count_irq(l->bitmap, &irq) == 1) {
404 			l->irq = irq;
405 			l->fixup_stage = 1;
406 #ifdef PCIINTR_DEBUG
407 			printf("pciintr_guess_irq (stage 1): "
408 			    "guessing PIRQ 0x%02x to be IRQ %d\n",
409 			    l->clink, l->irq);
410 #endif
411 			guessed = 1;
412 		}
413 	}
414 
415 	return (guessed ? 0 : -1);
416 }
417 #endif /* PCIBIOS_INTR_GUESS */
418 
419 int
420 pciintr_link_fixup()
421 {
422 	struct pciintr_link_map *l;
423 	int irq;
424 	u_int16_t pciirq = 0;
425 
426 	/*
427 	 * First stage: Attempt to connect PIRQs which aren't
428 	 * yet connected.
429 	 */
430 	SIMPLEQ_FOREACH(l, &pciintr_link_map_list, list) {
431 		if (l->irq != I386_PCI_INTERRUPT_LINE_NO_CONNECTION) {
432 			/*
433 			 * Interrupt is already connected.  Don't do
434 			 * anything to it.
435 			 * In this case, l->fixup_stage == 0.
436 			 */
437 			pciirq |= 1 << l->irq;
438 #ifdef PCIINTR_DEBUG
439 			printf("pciintr_link_fixup: PIRQ 0x%02x already "
440 			    "connected to IRQ %d\n", l->clink, l->irq);
441 #endif
442 			continue;
443 		}
444 		/*
445 		 * Interrupt isn't connected.  Attempt to assign it to an IRQ.
446 		 */
447 #ifdef PCIINTR_DEBUG
448 		printf("pciintr_link_fixup: PIRQ 0x%02x not connected",
449 		    l->clink);
450 #endif
451 		/*
452 		 * Just do the easy case now; we'll defer the harder ones
453 		 * to Stage 2.
454 		 */
455 		if (pciintr_bitmap_count_irq(l->bitmap, &irq) == 1) {
456 			l->irq = irq;
457 			l->fixup_stage = 1;
458 			pciirq |= 1 << irq;
459 #ifdef PCIINTR_DEBUG
460 			printf(", assigning IRQ %d", l->irq);
461 #endif
462 		}
463 #ifdef PCIINTR_DEBUG
464 		printf("\n");
465 #endif
466 	}
467 
468 	/*
469 	 * Stage 2: Attempt to connect PIRQs which we didn't
470 	 * connect in Stage 1.
471 	 */
472 	SIMPLEQ_FOREACH(l, &pciintr_link_map_list, list) {
473 		if (l->irq != I386_PCI_INTERRUPT_LINE_NO_CONNECTION)
474 			continue;
475 		if (pciintr_bitmap_find_lowest_irq(l->bitmap & pciirq,
476 		    &l->irq)) {
477 			/*
478 			 * This IRQ is a valid PCI IRQ already
479 			 * connected to another PIRQ, and also an
480 			 * IRQ our PIRQ can use; connect it up!
481 			 */
482 			l->fixup_stage = 2;
483 #ifdef PCIINTR_DEBUG
484 			printf("pciintr_link_fixup (stage 2): "
485 			       "assigning IRQ %d to PIRQ 0x%02x\n",
486 			       l->irq, l->clink);
487 #endif
488 		}
489 	}
490 
491 #ifdef PCIBIOS_IRQS_HINT
492 	/*
493 	 * Stage 3: The worst case. I need configuration hint that
494 	 * user supplied a mask for the PCI irqs
495 	 */
496 	SIMPLEQ_FOREACH(l, &pciintr_link_map_list, list) {
497 		if (l->irq != I386_PCI_INTERRUPT_LINE_NO_CONNECTION)
498 			continue;
499 		if (pciintr_bitmap_find_lowest_irq(
500 		    l->bitmap & pcibios_irqs_hint, &l->irq)) {
501 			l->fixup_stage = 3;
502 #ifdef PCIINTR_DEBUG
503 			printf("pciintr_link_fixup (stage 3): "
504 			       "assigning IRQ %d to PIRQ 0x%02x\n",
505 			       l->irq, l->clink);
506 #endif
507 		}
508 	}
509 #endif /* PCIBIOS_IRQS_HINT */
510 
511 	return (0);
512 }
513 
514 int
515 pciintr_link_route(pciirq)
516 	u_int16_t *pciirq;
517 {
518 	struct pciintr_link_map *l;
519 	int rv = 0;
520 
521 	*pciirq = 0;
522 
523 	SIMPLEQ_FOREACH(l, &pciintr_link_map_list, list) {
524 		if (l->fixup_stage == 0) {
525 			if (l->irq == I386_PCI_INTERRUPT_LINE_NO_CONNECTION) {
526 				/* Appropriate interrupt was not found. */
527 #ifdef DIAGNOSTIC
528 				printf("pciintr_link_route: "
529 				    "PIRQ 0x%02x: no IRQ, try "
530 				    "\"options PCIBIOS_IRQS_HINT=0x%04x\"\n",
531 				    l->clink,
532 				    /* suggest irq 9/10/11, if possible */
533 				    (l->bitmap & 0x0e00) ? (l->bitmap & 0x0e00)
534 				    : l->bitmap);
535 #endif
536 			} else {
537 				/* BIOS setting has no problem */
538 #ifdef PCIINTR_DEBUG
539 				printf("pciintr_link_route: "
540 				    "route of PIRQ 0x%02x -> "
541 				    "IRQ %d preserved BIOS setting\n",
542 				    l->clink, l->irq);
543 #endif
544 				*pciirq |= (1 << l->irq);
545 			}
546 			continue; /* nothing to do. */
547 		}
548 
549 		if (pciintr_icu_set_intr(pciintr_icu_tag, pciintr_icu_handle,
550 					 l->clink, l->irq) != 0 ||
551 		    pciintr_icu_set_trigger(pciintr_icu_tag,
552 					    pciintr_icu_handle,
553 					    l->irq, IST_LEVEL) != 0) {
554 			printf("pciintr_link_route: route of PIRQ 0x%02x -> "
555 			    "IRQ %d failed\n", l->clink, l->irq);
556 			rv = 1;
557 		} else {
558 			/*
559 			 * Succssfully routed interrupt.  Mark this as
560 			 * a PCI interrupt.
561 			 */
562 			*pciirq |= (1 << l->irq);
563 		}
564 	}
565 
566 	return (rv);
567 }
568 
569 int
570 pciintr_irq_release(pciirq)
571 	u_int16_t *pciirq;
572 {
573 	int i, bit;
574 
575 	for (i = 0, bit = 1; i < 16; i++, bit <<= 1) {
576 		if ((*pciirq & bit) == 0)
577 			(void) pciintr_icu_set_trigger(pciintr_icu_tag,
578 			    pciintr_icu_handle, i, IST_EDGE);
579 	}
580 
581 	return (0);
582 }
583 
584 int
585 pciintr_header_fixup(pc)
586 	pci_chipset_tag_t pc;
587 {
588 	PCIBIOS_PRINTV(("------------------------------------------\n"));
589 	PCIBIOS_PRINTV(("  device vendor product pin PIRQ IRQ stage\n"));
590 	PCIBIOS_PRINTV(("------------------------------------------\n"));
591 	pci_device_foreach(pc, pcibios_max_bus, pciintr_do_header_fixup, NULL);
592 	PCIBIOS_PRINTV(("------------------------------------------\n"));
593 
594 	return (0);
595 }
596 
597 void
598 pciintr_do_header_fixup(pc, tag, context)
599 	pci_chipset_tag_t pc;
600 	pcitag_t tag;
601 	void *context;
602 {
603 	struct pcibios_intr_routing *pir;
604 	struct pciintr_link_map *l;
605 	int pin, irq, link;
606 	int bus, device, function;
607 	pcireg_t intr, id;
608 
609 	pci_decompose_tag(pc, tag, &bus, &device, &function);
610 	id = pci_conf_read(pc, tag, PCI_ID_REG);
611 
612 	intr = pci_conf_read(pc, tag, PCI_INTERRUPT_REG);
613 	pin = PCI_INTERRUPT_PIN(intr);
614 	irq = PCI_INTERRUPT_LINE(intr);
615 
616 #if 0
617 	if (pin == 0) {
618 		/*
619 		 * No interrupt used.
620 		 */
621 		return;
622 	}
623 #endif
624 
625 	pir = pciintr_pir_lookup(bus, device);
626 	if (pir == NULL || (link = pir->linkmap[pin - 1].link) == 0) {
627 		/*
628 		 * Interrupt not connected; no
629 		 * need to change.
630 		 */
631 		return;
632 	}
633 
634 	l = pciintr_link_lookup(link);
635 	if (l == NULL) {
636 #ifdef PCIINTR_DEBUG
637 		/*
638 		 * No link map entry.
639 		 * Probably pciintr_icu_getclink() or pciintr_icu_get_intr()
640 		 * was failed.
641 		 */
642 		printf("pciintr_header_fixup: no entry for link 0x%02x "
643 		       "(%d:%d:%d:%c)\n", link, bus, device, function,
644 		       '@' + pin);
645 #endif
646 		return;
647 	}
648 
649 #ifdef PCIBIOSVERBOSE
650 	if (pcibiosverbose) {
651 		printf("%03d:%02d:%d 0x%04x 0x%04x   %c  0x%02x",
652 		    bus, device, function, PCI_VENDOR(id), PCI_PRODUCT(id),
653 		    '@' + pin, l->clink);
654 		if (l->irq == I386_PCI_INTERRUPT_LINE_NO_CONNECTION)
655 			printf("   -");
656 		else
657 			printf(" %3d", l->irq);
658 		printf("  %d   ", l->fixup_stage);
659 	}
660 #endif
661 
662 	/*
663 	 * IRQs 14 and 15 are reserved for PCI IDE interrupts; don't muck
664 	 * with them.
665 	 */
666 	if (irq == 14 || irq == 15) {
667 		PCIBIOS_PRINTV((" WARNING: ignored\n"));
668 		return;
669 	}
670 
671 	if (l->irq == I386_PCI_INTERRUPT_LINE_NO_CONNECTION) {
672 		/* Appropriate interrupt was not found. */
673 		if (pciintr_icu_tag == NULL &&
674 		    irq != 0 && irq != I386_PCI_INTERRUPT_LINE_NO_CONNECTION) {
675 			/*
676 			 * Do not print warning,
677 			 * if no compatible PCI ICU found,
678 			 * but the irq is already assigned by BIOS.
679 			 */
680 			PCIBIOS_PRINTV(("\n"));
681 		} else {
682 			PCIBIOS_PRINTV((" WARNING: missing IRQ\n"));
683 		}
684 		return;
685 	}
686 
687 	if (l->irq == irq) {
688 		/* don't have to reconfigure */
689 		PCIBIOS_PRINTV((" already assigned\n"));
690 		return;
691 	}
692 
693 	if (irq == 0 || irq == I386_PCI_INTERRUPT_LINE_NO_CONNECTION) {
694 		PCIBIOS_PRINTV((" fixed up\n"));
695 	} else {
696 		/* routed by BIOS, but inconsistent */
697 #ifdef PCIBIOS_INTR_FIXUP_FORCE
698 		/* believe PCI IRQ Routing table */
699 		PCIBIOS_PRINTV((" WARNING: overriding irq %d\n", irq));
700 #else
701 		/* believe PCI Interrupt Configuration Register (default) */
702 		PCIBIOS_PRINTV((" WARNING: preserving irq %d\n", irq));
703 		return;
704 #endif
705 	}
706 
707 	intr &= ~(PCI_INTERRUPT_LINE_MASK << PCI_INTERRUPT_LINE_SHIFT);
708 	intr |= (l->irq << PCI_INTERRUPT_LINE_SHIFT);
709 	pci_conf_write(pc, tag, PCI_INTERRUPT_REG, intr);
710 }
711 
712 int
713 pci_intr_fixup(pc, iot, pciirq)
714 	pci_chipset_tag_t pc;
715 	bus_space_tag_t iot;
716 	u_int16_t *pciirq;
717 {
718 	const struct pciintr_icu_table *piit = NULL;
719 	pcitag_t icutag;
720 	pcireg_t icuid;
721 
722 	/*
723 	 * Attempt to initialize our PCI interrupt router.  If
724 	 * the PIR Table is present in ROM, use the location
725 	 * specified by the PIR Table, and use the compat ID,
726 	 * if present.  Otherwise, we have to look for the router
727 	 * ourselves (the PCI-ISA bridge).
728 	 *
729 	 * A number of buggy BIOS implementations leave the router
730 	 * entry as 000:00:0, which is typically not the correct
731 	 * device/function.  If the router device address is set to
732 	 * this value, and the compatible router entry is undefined
733 	 * (zero is the correct value to indicate undefined), then we
734 	 * work on the basis it is most likely an error, and search
735 	 * the entire device-space of bus 0 (but obviously starting
736 	 * with 000:00:0, in case that really is the right one).
737 	 */
738 	if (pcibios_pir_header.signature != 0 &&
739 	    (pcibios_pir_header.router_bus != 0 ||
740 	     PIR_DEVFUNC_DEVICE(pcibios_pir_header.router_devfunc) != 0 ||
741 	     PIR_DEVFUNC_FUNCTION(pcibios_pir_header.router_devfunc) != 0 ||
742 	     pcibios_pir_header.compat_router != 0)) {
743 		icutag = pci_make_tag(pc, pcibios_pir_header.router_bus,
744 		    PIR_DEVFUNC_DEVICE(pcibios_pir_header.router_devfunc),
745 		    PIR_DEVFUNC_FUNCTION(pcibios_pir_header.router_devfunc));
746 		icuid = pcibios_pir_header.compat_router;
747 		if (icuid == 0 ||
748 		    (piit = pciintr_icu_lookup(icuid)) == NULL) {
749 			/*
750 			 * No compat ID, or don't know the compat ID?  Read
751 			 * it from the configuration header.
752 			 */
753 			icuid = pci_conf_read(pc, icutag, PCI_ID_REG);
754 		}
755 		if (piit == NULL)
756 			piit = pciintr_icu_lookup(icuid);
757 	} else {
758 		int device, maxdevs = pci_bus_maxdevs(pc, 0);
759 
760 		/*
761 		 * Search configuration space for a known interrupt
762 		 * router.
763 		 */
764 		for (device = 0; device < maxdevs; device++) {
765 			const struct pci_quirkdata *qd;
766 			int function, nfuncs;
767 			pcireg_t bhlcr;
768 
769 			icutag = pci_make_tag(pc, 0, device, 0);
770 			icuid = pci_conf_read(pc, icutag, PCI_ID_REG);
771 
772 			/* Invalid vendor ID value? */
773 			if (PCI_VENDOR(icuid) == PCI_VENDOR_INVALID)
774 				continue;
775 			/* XXX Not invalid, but we've done this ~forever. */
776 			if (PCI_VENDOR(icuid) == 0)
777 				continue;
778 
779 			qd = pci_lookup_quirkdata(PCI_VENDOR(icuid),
780 			    PCI_PRODUCT(icuid));
781 
782 			bhlcr = pci_conf_read(pc, icutag, PCI_BHLC_REG);
783 			if (PCI_HDRTYPE_MULTIFN(bhlcr) ||
784 			    (qd != NULL &&
785 			     (qd->quirks & PCI_QUIRK_MULTIFUNCTION) != 0))
786 				nfuncs = 8;
787 			else
788 				nfuncs = 1;
789 
790 			for (function = 0; function < nfuncs; function++) {
791 				icutag = pci_make_tag(pc, 0, device, function);
792 				icuid = pci_conf_read(pc, icutag, PCI_ID_REG);
793 
794 				/* Invalid vendor ID value? */
795 				if (PCI_VENDOR(icuid) == PCI_VENDOR_INVALID)
796 					continue;
797 				/* Not invalid, but we've done this ~forever */
798 				if (PCI_VENDOR(icuid) == 0)
799 					continue;
800 
801 				piit = pciintr_icu_lookup(icuid);
802 				if (piit != NULL)
803 					goto found;
804 			}
805 		}
806 
807 		/*
808 		 * Invalidate the ICU ID.  If we failed to find the
809 		 * interrupt router (piit == NULL) we don't want to
810 		 * display a spurious device address below containing
811 		 * the product information of the last device we
812 		 * looked at.
813 		 */
814 		icuid = 0;
815 found:;
816 	}
817 
818 	if (piit == NULL) {
819 		printf("pci_intr_fixup: no compatible PCI ICU found");
820 		if (pcibios_pir_header.signature != 0 && icuid != 0)
821 			printf(": ICU vendor 0x%04x product 0x%04x",
822 			    PCI_VENDOR(icuid), PCI_PRODUCT(icuid));
823 		printf("\n");
824 #ifdef PCIBIOS_INTR_GUESS
825 		if (pciintr_link_init())
826 			return (-1);	/* non-fatal */
827 		if (pciintr_guess_irq())
828 			return (-1);	/* non-fatal */
829 		if (pciintr_header_fixup(pc))
830 			return (1);	/* fatal */
831 		return (0);		/* success! */
832 #else
833 		return (-1);		/* non-fatal */
834 #endif
835 	}
836 
837 	/*
838 	 * Initialize the PCI ICU.
839 	 */
840 	if ((*piit->piit_init)(pc, iot, icutag, &pciintr_icu_tag,
841 	    &pciintr_icu_handle) != 0)
842 		return (-1);		/* non-fatal */
843 
844 	/*
845 	 * Initialize the PCI interrupt link map.
846 	 */
847 	if (pciintr_link_init())
848 		return (-1);		/* non-fatal */
849 
850 	/*
851 	 * Fix up the link->IRQ mappings.
852 	 */
853 	if (pciintr_link_fixup() != 0)
854 		return (-1);		/* non-fatal */
855 
856 	/*
857 	 * Now actually program the PCI ICU with the new
858 	 * routing information.
859 	 */
860 	if (pciintr_link_route(pciirq) != 0)
861 		return (1);		/* fatal */
862 
863 	/*
864 	 * Now that we've routed all of the PIRQs, rewrite the PCI
865 	 * configuration headers to reflect the new mapping.
866 	 */
867 	if (pciintr_header_fixup(pc) != 0)
868 		return (1);		/* fatal */
869 
870 	/*
871 	 * Free any unused PCI IRQs for ISA devices.
872 	 */
873 	if (pciintr_irq_release(pciirq) != 0)
874 		return (-1);		/* non-fatal */
875 
876 	/*
877 	 * All done!
878 	 */
879 	return (0);			/* success! */
880 }
881