1 /* $NetBSD: pci_intr_fixup.c,v 1.24 2003/04/05 16:03:48 perry Exp $ */ 2 3 /*- 4 * Copyright (c) 1999 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * Copyright (c) 1999, by UCHIYAMA Yasushi 42 * All rights reserved. 43 * 44 * Redistribution and use in source and binary forms, with or without 45 * modification, are permitted provided that the following conditions 46 * are met: 47 * 1. Redistributions of source code must retain the above copyright 48 * notice, this list of conditions and the following disclaimer. 49 * 2. The name of the developer may NOT be used to endorse or promote products 50 * derived from this software without specific prior written permission. 51 * 52 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 53 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 54 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 55 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 56 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 57 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 58 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 59 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 60 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 61 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 62 * SUCH DAMAGE. 63 */ 64 65 /* 66 * PCI Interrupt Router support. 67 */ 68 69 #include <sys/cdefs.h> 70 __KERNEL_RCSID(0, "$NetBSD: pci_intr_fixup.c,v 1.24 2003/04/05 16:03:48 perry Exp $"); 71 72 #include "opt_pcibios.h" 73 74 #include <sys/param.h> 75 #include <sys/systm.h> 76 #include <sys/kernel.h> 77 #include <sys/malloc.h> 78 #include <sys/queue.h> 79 #include <sys/device.h> 80 81 #include <machine/bus.h> 82 #include <machine/intr.h> 83 84 #include <dev/pci/pcireg.h> 85 #include <dev/pci/pcivar.h> 86 #include <dev/pci/pcidevs.h> 87 88 #include <i386/pci/pci_intr_fixup.h> 89 #include <i386/pci/pcibios.h> 90 91 struct pciintr_link_map { 92 int link; 93 int clink; 94 int irq; 95 u_int16_t bitmap; 96 int fixup_stage; 97 SIMPLEQ_ENTRY(pciintr_link_map) list; 98 }; 99 100 pciintr_icu_tag_t pciintr_icu_tag; 101 pciintr_icu_handle_t pciintr_icu_handle; 102 103 #ifdef PCIBIOS_IRQS_HINT 104 int pcibios_irqs_hint = PCIBIOS_IRQS_HINT; 105 #endif 106 107 struct pciintr_link_map *pciintr_link_lookup __P((int)); 108 struct pciintr_link_map *pciintr_link_alloc __P((struct pcibios_intr_routing *, 109 int)); 110 struct pcibios_intr_routing *pciintr_pir_lookup __P((int, int)); 111 static int pciintr_bitmap_count_irq __P((int, int *)); 112 static int pciintr_bitmap_find_lowest_irq __P((int, int *)); 113 int pciintr_link_init __P((void)); 114 #ifdef PCIBIOS_INTR_GUESS 115 int pciintr_guess_irq __P((void)); 116 #endif 117 int pciintr_link_fixup __P((void)); 118 int pciintr_link_route __P((u_int16_t *)); 119 int pciintr_irq_release __P((u_int16_t *)); 120 int pciintr_header_fixup __P((pci_chipset_tag_t)); 121 void pciintr_do_header_fixup __P((pci_chipset_tag_t, pcitag_t, void*)); 122 123 SIMPLEQ_HEAD(, pciintr_link_map) pciintr_link_map_list; 124 125 const struct pciintr_icu_table { 126 pci_vendor_id_t piit_vendor; 127 pci_product_id_t piit_product; 128 int (*piit_init) __P((pci_chipset_tag_t, 129 bus_space_tag_t, pcitag_t, pciintr_icu_tag_t *, 130 pciintr_icu_handle_t *)); 131 } pciintr_icu_table[] = { 132 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82371MX, 133 piix_init }, 134 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82371AB_ISA, 135 piix_init }, 136 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82371FB_ISA, 137 piix_init }, 138 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82371SB_ISA, 139 piix_init }, 140 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801BA_LPC, 141 piix_init }, 142 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801BAM_LPC, 143 piix_init }, 144 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801DB_LPC, 145 piix_init }, 146 147 { PCI_VENDOR_OPTI, PCI_PRODUCT_OPTI_82C558, 148 opti82c558_init }, 149 { PCI_VENDOR_OPTI, PCI_PRODUCT_OPTI_82C700, 150 opti82c700_init }, 151 152 { PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT82C586_ISA, 153 via82c586_init }, 154 { PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT82C596A, 155 via82c586_init }, 156 { PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT82C686A_ISA, 157 via82c586_init }, 158 159 { PCI_VENDOR_SIS, PCI_PRODUCT_SIS_85C503, 160 sis85c503_init }, 161 162 { PCI_VENDOR_AMD, PCI_PRODUCT_AMD_PBC756_PMC, 163 amd756_init }, 164 165 { PCI_VENDOR_ALI, PCI_PRODUCT_ALI_M1543, 166 ali1543_init }, 167 168 { 0, 0, 169 NULL }, 170 }; 171 172 const struct pciintr_icu_table *pciintr_icu_lookup __P((pcireg_t)); 173 174 const struct pciintr_icu_table * 175 pciintr_icu_lookup(id) 176 pcireg_t id; 177 { 178 const struct pciintr_icu_table *piit; 179 180 for (piit = pciintr_icu_table; 181 piit->piit_init != NULL; 182 piit++) { 183 if (PCI_VENDOR(id) == piit->piit_vendor && 184 PCI_PRODUCT(id) == piit->piit_product) 185 return (piit); 186 } 187 188 return (NULL); 189 } 190 191 struct pciintr_link_map * 192 pciintr_link_lookup(link) 193 int link; 194 { 195 struct pciintr_link_map *l; 196 197 SIMPLEQ_FOREACH(l, &pciintr_link_map_list, list) { 198 if (l->link == link) 199 return (l); 200 } 201 202 return (NULL); 203 } 204 205 struct pciintr_link_map * 206 pciintr_link_alloc(pir, pin) 207 struct pcibios_intr_routing *pir; 208 int pin; 209 { 210 int link = pir->linkmap[pin].link, clink, irq; 211 struct pciintr_link_map *l, *lstart; 212 213 if (pciintr_icu_tag != NULL) { /* compatible PCI ICU found */ 214 /* 215 * Get the canonical link value for this entry. 216 */ 217 if (pciintr_icu_getclink(pciintr_icu_tag, pciintr_icu_handle, 218 link, &clink) != 0) { 219 /* 220 * ICU doesn't understand the link value. 221 * Just ignore this PIR entry. 222 */ 223 #ifdef DIAGNOSTIC 224 printf("pciintr_link_alloc: bus %d device %d: " 225 "link 0x%02x invalid\n", 226 pir->bus, PIR_DEVFUNC_DEVICE(pir->device), link); 227 #endif 228 return (NULL); 229 } 230 231 /* 232 * Check the link value by asking the ICU for the 233 * canonical link value. 234 * Also, determine if this PIRQ is mapped to an IRQ. 235 */ 236 if (pciintr_icu_get_intr(pciintr_icu_tag, pciintr_icu_handle, 237 clink, &irq) != 0) { 238 /* 239 * ICU doesn't understand the canonical link value. 240 * Just ignore this PIR entry. 241 */ 242 #ifdef DIAGNOSTIC 243 printf("pciintr_link_alloc: " 244 "bus %d device %d link 0x%02x: " 245 "PIRQ 0x%02x invalid\n", 246 pir->bus, PIR_DEVFUNC_DEVICE(pir->device), link, 247 clink); 248 #endif 249 return (NULL); 250 } 251 } 252 253 l = malloc(sizeof(*l), M_DEVBUF, M_NOWAIT); 254 if (l == NULL) 255 panic("pciintr_link_alloc"); 256 257 memset(l, 0, sizeof(*l)); 258 259 l->link = link; 260 l->bitmap = pir->linkmap[pin].bitmap; 261 if (pciintr_icu_tag != NULL) { /* compatible PCI ICU found */ 262 l->clink = clink; 263 l->irq = irq; /* maybe X86_PCI_INTERRUPT_LINE_NO_CONNECTION */ 264 } else { 265 l->clink = link; /* only for PCIBIOSVERBOSE diagnostic */ 266 l->irq = X86_PCI_INTERRUPT_LINE_NO_CONNECTION; 267 } 268 269 lstart = SIMPLEQ_FIRST(&pciintr_link_map_list); 270 if (lstart == NULL || lstart->link < l->link) 271 SIMPLEQ_INSERT_TAIL(&pciintr_link_map_list, l, list); 272 else 273 SIMPLEQ_INSERT_HEAD(&pciintr_link_map_list, l, list); 274 275 return (l); 276 } 277 278 struct pcibios_intr_routing * 279 pciintr_pir_lookup(bus, device) 280 int bus, device; 281 { 282 struct pcibios_intr_routing *pir; 283 int entry; 284 285 if (pcibios_pir_table == NULL) 286 return (NULL); 287 288 for (entry = 0; entry < pcibios_pir_table_nentries; entry++) { 289 pir = &pcibios_pir_table[entry]; 290 if (pir->bus == bus && 291 PIR_DEVFUNC_DEVICE(pir->device) == device) 292 return (pir); 293 } 294 295 return (NULL); 296 } 297 298 static int 299 pciintr_bitmap_count_irq(irq_bitmap, irqp) 300 int irq_bitmap, *irqp; 301 { 302 int i, bit, count = 0, irq = X86_PCI_INTERRUPT_LINE_NO_CONNECTION; 303 304 if (irq_bitmap != 0) { 305 for (i = 0, bit = 1; i < 16; i++, bit <<= 1) { 306 if (irq_bitmap & bit) { 307 irq = i; 308 count++; 309 } 310 } 311 } 312 *irqp = irq; 313 return (count); 314 } 315 316 static int 317 pciintr_bitmap_find_lowest_irq(irq_bitmap, irqp) 318 int irq_bitmap, *irqp; 319 { 320 int i, bit; 321 322 if (irq_bitmap != 0) { 323 for (i = 0, bit = 1; i < 16; i++, bit <<= 1) { 324 if (irq_bitmap & bit) { 325 *irqp = i; 326 return (1); /* found */ 327 } 328 } 329 } 330 return (0); /* not found */ 331 } 332 333 int 334 pciintr_link_init() 335 { 336 int entry, pin, link; 337 struct pcibios_intr_routing *pir; 338 struct pciintr_link_map *l; 339 340 if (pcibios_pir_table == NULL) { 341 /* No PIR table; can't do anything. */ 342 printf("pciintr_link_init: no PIR table\n"); 343 return (1); 344 } 345 346 SIMPLEQ_INIT(&pciintr_link_map_list); 347 348 for (entry = 0; entry < pcibios_pir_table_nentries; entry++) { 349 pir = &pcibios_pir_table[entry]; 350 for (pin = 0; pin < PCI_INTERRUPT_PIN_MAX; pin++) { 351 link = pir->linkmap[pin].link; 352 if (link == 0) { 353 /* No connection for this pin. */ 354 continue; 355 } 356 /* 357 * Multiple devices may be wired to the same 358 * interrupt; check to see if we've seen this 359 * one already. If not, allocate a new link 360 * map entry and stuff it in the map. 361 */ 362 l = pciintr_link_lookup(link); 363 if (l == NULL) { 364 (void) pciintr_link_alloc(pir, pin); 365 } else if (pir->linkmap[pin].bitmap != l->bitmap) { 366 /* 367 * violates PCI IRQ Routing Table Specification 368 */ 369 #ifdef DIAGNOSTIC 370 printf("pciintr_link_init: " 371 "bus %d device %d link 0x%02x: " 372 "bad irq bitmap 0x%04x, " 373 "should be 0x%04x\n", 374 pir->bus, PIR_DEVFUNC_DEVICE(pir->device), 375 link, pir->linkmap[pin].bitmap, l->bitmap); 376 #endif 377 /* safer value. */ 378 l->bitmap &= pir->linkmap[pin].bitmap; 379 /* XXX - or, should ignore this entry? */ 380 } 381 } 382 } 383 384 return (0); 385 } 386 387 #ifdef PCIBIOS_INTR_GUESS 388 /* 389 * No compatible PCI ICU found. 390 * Hopes the BIOS already setup the ICU. 391 */ 392 int 393 pciintr_guess_irq() 394 { 395 struct pciintr_link_map *l; 396 int irq, guessed = 0; 397 398 /* 399 * Stage 1: If only one IRQ is available for the link, use it. 400 */ 401 SIMPLEQ_FOREACH(l, &pciintr_link_map_list, list) { 402 if (l->irq != X86_PCI_INTERRUPT_LINE_NO_CONNECTION) 403 continue; 404 if (pciintr_bitmap_count_irq(l->bitmap, &irq) == 1) { 405 l->irq = irq; 406 l->fixup_stage = 1; 407 #ifdef PCIINTR_DEBUG 408 printf("pciintr_guess_irq (stage 1): " 409 "guessing PIRQ 0x%02x to be IRQ %d\n", 410 l->clink, l->irq); 411 #endif 412 guessed = 1; 413 } 414 } 415 416 return (guessed ? 0 : -1); 417 } 418 #endif /* PCIBIOS_INTR_GUESS */ 419 420 int 421 pciintr_link_fixup() 422 { 423 struct pciintr_link_map *l; 424 int irq; 425 u_int16_t pciirq = 0; 426 427 /* 428 * First stage: Attempt to connect PIRQs which aren't 429 * yet connected. 430 */ 431 SIMPLEQ_FOREACH(l, &pciintr_link_map_list, list) { 432 if (l->irq != X86_PCI_INTERRUPT_LINE_NO_CONNECTION) { 433 /* 434 * Interrupt is already connected. Don't do 435 * anything to it. 436 * In this case, l->fixup_stage == 0. 437 */ 438 pciirq |= 1 << l->irq; 439 #ifdef PCIINTR_DEBUG 440 printf("pciintr_link_fixup: PIRQ 0x%02x already " 441 "connected to IRQ %d\n", l->clink, l->irq); 442 #endif 443 continue; 444 } 445 /* 446 * Interrupt isn't connected. Attempt to assign it to an IRQ. 447 */ 448 #ifdef PCIINTR_DEBUG 449 printf("pciintr_link_fixup: PIRQ 0x%02x not connected", 450 l->clink); 451 #endif 452 /* 453 * Just do the easy case now; we'll defer the harder ones 454 * to Stage 2. 455 */ 456 if (pciintr_bitmap_count_irq(l->bitmap, &irq) == 1) { 457 l->irq = irq; 458 l->fixup_stage = 1; 459 pciirq |= 1 << irq; 460 #ifdef PCIINTR_DEBUG 461 printf(", assigning IRQ %d", l->irq); 462 #endif 463 } 464 #ifdef PCIINTR_DEBUG 465 printf("\n"); 466 #endif 467 } 468 469 /* 470 * Stage 2: Attempt to connect PIRQs which we didn't 471 * connect in Stage 1. 472 */ 473 SIMPLEQ_FOREACH(l, &pciintr_link_map_list, list) { 474 if (l->irq != X86_PCI_INTERRUPT_LINE_NO_CONNECTION) 475 continue; 476 if (pciintr_bitmap_find_lowest_irq(l->bitmap & pciirq, 477 &l->irq)) { 478 /* 479 * This IRQ is a valid PCI IRQ already 480 * connected to another PIRQ, and also an 481 * IRQ our PIRQ can use; connect it up! 482 */ 483 l->fixup_stage = 2; 484 #ifdef PCIINTR_DEBUG 485 printf("pciintr_link_fixup (stage 2): " 486 "assigning IRQ %d to PIRQ 0x%02x\n", 487 l->irq, l->clink); 488 #endif 489 } 490 } 491 492 #ifdef PCIBIOS_IRQS_HINT 493 /* 494 * Stage 3: The worst case. I need configuration hint that 495 * user supplied a mask for the PCI irqs 496 */ 497 SIMPLEQ_FOREACH(l, &pciintr_link_map_list, list) { 498 if (l->irq != X86_PCI_INTERRUPT_LINE_NO_CONNECTION) 499 continue; 500 if (pciintr_bitmap_find_lowest_irq( 501 l->bitmap & pcibios_irqs_hint, &l->irq)) { 502 l->fixup_stage = 3; 503 #ifdef PCIINTR_DEBUG 504 printf("pciintr_link_fixup (stage 3): " 505 "assigning IRQ %d to PIRQ 0x%02x\n", 506 l->irq, l->clink); 507 #endif 508 } 509 } 510 #endif /* PCIBIOS_IRQS_HINT */ 511 512 return (0); 513 } 514 515 int 516 pciintr_link_route(pciirq) 517 u_int16_t *pciirq; 518 { 519 struct pciintr_link_map *l; 520 int rv = 0; 521 522 *pciirq = 0; 523 524 SIMPLEQ_FOREACH(l, &pciintr_link_map_list, list) { 525 if (l->fixup_stage == 0) { 526 if (l->irq == X86_PCI_INTERRUPT_LINE_NO_CONNECTION) { 527 /* Appropriate interrupt was not found. */ 528 #ifdef DIAGNOSTIC 529 printf("pciintr_link_route: " 530 "PIRQ 0x%02x: no IRQ, try " 531 "\"options PCIBIOS_IRQS_HINT=0x%04x\"\n", 532 l->clink, 533 /* suggest irq 9/10/11, if possible */ 534 (l->bitmap & 0x0e00) ? (l->bitmap & 0x0e00) 535 : l->bitmap); 536 #endif 537 } else { 538 /* BIOS setting has no problem */ 539 #ifdef PCIINTR_DEBUG 540 printf("pciintr_link_route: " 541 "route of PIRQ 0x%02x -> " 542 "IRQ %d preserved BIOS setting\n", 543 l->clink, l->irq); 544 #endif 545 *pciirq |= (1 << l->irq); 546 } 547 continue; /* nothing to do. */ 548 } 549 550 if (pciintr_icu_set_intr(pciintr_icu_tag, pciintr_icu_handle, 551 l->clink, l->irq) != 0 || 552 pciintr_icu_set_trigger(pciintr_icu_tag, 553 pciintr_icu_handle, 554 l->irq, IST_LEVEL) != 0) { 555 printf("pciintr_link_route: route of PIRQ 0x%02x -> " 556 "IRQ %d failed\n", l->clink, l->irq); 557 rv = 1; 558 } else { 559 /* 560 * Succssfully routed interrupt. Mark this as 561 * a PCI interrupt. 562 */ 563 *pciirq |= (1 << l->irq); 564 } 565 } 566 567 return (rv); 568 } 569 570 int 571 pciintr_irq_release(pciirq) 572 u_int16_t *pciirq; 573 { 574 int i, bit; 575 576 for (i = 0, bit = 1; i < 16; i++, bit <<= 1) { 577 if ((*pciirq & bit) == 0) 578 (void) pciintr_icu_set_trigger(pciintr_icu_tag, 579 pciintr_icu_handle, i, IST_EDGE); 580 } 581 582 return (0); 583 } 584 585 int 586 pciintr_header_fixup(pc) 587 pci_chipset_tag_t pc; 588 { 589 PCIBIOS_PRINTV(("------------------------------------------\n")); 590 PCIBIOS_PRINTV((" device vendor product pin PIRQ IRQ stage\n")); 591 PCIBIOS_PRINTV(("------------------------------------------\n")); 592 pci_device_foreach(pc, pcibios_max_bus, pciintr_do_header_fixup, NULL); 593 PCIBIOS_PRINTV(("------------------------------------------\n")); 594 595 return (0); 596 } 597 598 void 599 pciintr_do_header_fixup(pc, tag, context) 600 pci_chipset_tag_t pc; 601 pcitag_t tag; 602 void *context; 603 { 604 struct pcibios_intr_routing *pir; 605 struct pciintr_link_map *l; 606 int pin, irq, link; 607 int bus, device, function; 608 pcireg_t intr, id; 609 610 pci_decompose_tag(pc, tag, &bus, &device, &function); 611 id = pci_conf_read(pc, tag, PCI_ID_REG); 612 613 intr = pci_conf_read(pc, tag, PCI_INTERRUPT_REG); 614 pin = PCI_INTERRUPT_PIN(intr); 615 irq = PCI_INTERRUPT_LINE(intr); 616 617 #if 0 618 if (pin == 0) { 619 /* 620 * No interrupt used. 621 */ 622 return; 623 } 624 #endif 625 626 pir = pciintr_pir_lookup(bus, device); 627 if (pir == NULL || (link = pir->linkmap[pin - 1].link) == 0) { 628 /* 629 * Interrupt not connected; no 630 * need to change. 631 */ 632 return; 633 } 634 635 l = pciintr_link_lookup(link); 636 if (l == NULL) { 637 #ifdef PCIINTR_DEBUG 638 /* 639 * No link map entry. 640 * Probably pciintr_icu_getclink() or pciintr_icu_get_intr() 641 * was failed. 642 */ 643 printf("pciintr_header_fixup: no entry for link 0x%02x " 644 "(%d:%d:%d:%c)\n", link, bus, device, function, 645 '@' + pin); 646 #endif 647 return; 648 } 649 650 #ifdef PCIBIOSVERBOSE 651 if (pcibiosverbose) { 652 printf("%03d:%02d:%d 0x%04x 0x%04x %c 0x%02x", 653 bus, device, function, PCI_VENDOR(id), PCI_PRODUCT(id), 654 '@' + pin, l->clink); 655 if (l->irq == X86_PCI_INTERRUPT_LINE_NO_CONNECTION) 656 printf(" -"); 657 else 658 printf(" %3d", l->irq); 659 printf(" %d ", l->fixup_stage); 660 } 661 #endif 662 663 /* 664 * IRQs 14 and 15 are reserved for PCI IDE interrupts; don't muck 665 * with them. 666 */ 667 if (irq == 14 || irq == 15) { 668 PCIBIOS_PRINTV((" WARNING: ignored\n")); 669 return; 670 } 671 672 if (l->irq == X86_PCI_INTERRUPT_LINE_NO_CONNECTION) { 673 /* Appropriate interrupt was not found. */ 674 if (pciintr_icu_tag == NULL && 675 irq != 0 && irq != X86_PCI_INTERRUPT_LINE_NO_CONNECTION) { 676 /* 677 * Do not print warning, 678 * if no compatible PCI ICU found, 679 * but the irq is already assigned by BIOS. 680 */ 681 PCIBIOS_PRINTV(("\n")); 682 } else { 683 PCIBIOS_PRINTV((" WARNING: missing IRQ\n")); 684 } 685 return; 686 } 687 688 if (l->irq == irq) { 689 /* don't have to reconfigure */ 690 PCIBIOS_PRINTV((" already assigned\n")); 691 return; 692 } 693 694 if (irq == 0 || irq == X86_PCI_INTERRUPT_LINE_NO_CONNECTION) { 695 PCIBIOS_PRINTV((" fixed up\n")); 696 } else { 697 /* routed by BIOS, but inconsistent */ 698 #ifdef PCIBIOS_INTR_FIXUP_FORCE 699 /* believe PCI IRQ Routing table */ 700 PCIBIOS_PRINTV((" WARNING: overriding irq %d\n", irq)); 701 #else 702 /* believe PCI Interrupt Configuration Register (default) */ 703 PCIBIOS_PRINTV((" WARNING: preserving irq %d\n", irq)); 704 return; 705 #endif 706 } 707 708 intr &= ~(PCI_INTERRUPT_LINE_MASK << PCI_INTERRUPT_LINE_SHIFT); 709 intr |= (l->irq << PCI_INTERRUPT_LINE_SHIFT); 710 pci_conf_write(pc, tag, PCI_INTERRUPT_REG, intr); 711 } 712 713 int 714 pci_intr_fixup(pc, iot, pciirq) 715 pci_chipset_tag_t pc; 716 bus_space_tag_t iot; 717 u_int16_t *pciirq; 718 { 719 const struct pciintr_icu_table *piit = NULL; 720 pcitag_t icutag; 721 pcireg_t icuid; 722 723 /* 724 * Attempt to initialize our PCI interrupt router. If 725 * the PIR Table is present in ROM, use the location 726 * specified by the PIR Table, and use the compat ID, 727 * if present. Otherwise, we have to look for the router 728 * ourselves (the PCI-ISA bridge). 729 * 730 * A number of buggy BIOS implementations leave the router 731 * entry as 000:00:0, which is typically not the correct 732 * device/function. If the router device address is set to 733 * this value, and the compatible router entry is undefined 734 * (zero is the correct value to indicate undefined), then we 735 * work on the basis it is most likely an error, and search 736 * the entire device-space of bus 0 (but obviously starting 737 * with 000:00:0, in case that really is the right one). 738 */ 739 if (pcibios_pir_header.signature != 0 && 740 (pcibios_pir_header.router_bus != 0 || 741 PIR_DEVFUNC_DEVICE(pcibios_pir_header.router_devfunc) != 0 || 742 PIR_DEVFUNC_FUNCTION(pcibios_pir_header.router_devfunc) != 0 || 743 pcibios_pir_header.compat_router != 0)) { 744 icutag = pci_make_tag(pc, pcibios_pir_header.router_bus, 745 PIR_DEVFUNC_DEVICE(pcibios_pir_header.router_devfunc), 746 PIR_DEVFUNC_FUNCTION(pcibios_pir_header.router_devfunc)); 747 icuid = pcibios_pir_header.compat_router; 748 if (icuid == 0 || 749 (piit = pciintr_icu_lookup(icuid)) == NULL) { 750 /* 751 * No compat ID, or don't know the compat ID? Read 752 * it from the configuration header. 753 */ 754 icuid = pci_conf_read(pc, icutag, PCI_ID_REG); 755 } 756 if (piit == NULL) 757 piit = pciintr_icu_lookup(icuid); 758 } else { 759 int device, maxdevs = pci_bus_maxdevs(pc, 0); 760 761 /* 762 * Search configuration space for a known interrupt 763 * router. 764 */ 765 for (device = 0; device < maxdevs; device++) { 766 const struct pci_quirkdata *qd; 767 int function, nfuncs; 768 pcireg_t bhlcr; 769 770 icutag = pci_make_tag(pc, 0, device, 0); 771 icuid = pci_conf_read(pc, icutag, PCI_ID_REG); 772 773 /* Invalid vendor ID value? */ 774 if (PCI_VENDOR(icuid) == PCI_VENDOR_INVALID) 775 continue; 776 /* XXX Not invalid, but we've done this ~forever. */ 777 if (PCI_VENDOR(icuid) == 0) 778 continue; 779 780 qd = pci_lookup_quirkdata(PCI_VENDOR(icuid), 781 PCI_PRODUCT(icuid)); 782 783 bhlcr = pci_conf_read(pc, icutag, PCI_BHLC_REG); 784 if (PCI_HDRTYPE_MULTIFN(bhlcr) || 785 (qd != NULL && 786 (qd->quirks & PCI_QUIRK_MULTIFUNCTION) != 0)) 787 nfuncs = 8; 788 else 789 nfuncs = 1; 790 791 for (function = 0; function < nfuncs; function++) { 792 icutag = pci_make_tag(pc, 0, device, function); 793 icuid = pci_conf_read(pc, icutag, PCI_ID_REG); 794 795 /* Invalid vendor ID value? */ 796 if (PCI_VENDOR(icuid) == PCI_VENDOR_INVALID) 797 continue; 798 /* Not invalid, but we've done this ~forever */ 799 if (PCI_VENDOR(icuid) == 0) 800 continue; 801 802 piit = pciintr_icu_lookup(icuid); 803 if (piit != NULL) 804 goto found; 805 } 806 } 807 808 /* 809 * Invalidate the ICU ID. If we failed to find the 810 * interrupt router (piit == NULL) we don't want to 811 * display a spurious device address below containing 812 * the product information of the last device we 813 * looked at. 814 */ 815 icuid = 0; 816 found:; 817 } 818 819 if (piit == NULL) { 820 printf("pci_intr_fixup: no compatible PCI ICU found"); 821 if (pcibios_pir_header.signature != 0 && icuid != 0) 822 printf(": ICU vendor 0x%04x product 0x%04x", 823 PCI_VENDOR(icuid), PCI_PRODUCT(icuid)); 824 printf("\n"); 825 #ifdef PCIBIOS_INTR_GUESS 826 if (pciintr_link_init()) 827 return (-1); /* non-fatal */ 828 if (pciintr_guess_irq()) 829 return (-1); /* non-fatal */ 830 if (pciintr_header_fixup(pc)) 831 return (1); /* fatal */ 832 return (0); /* success! */ 833 #else 834 return (-1); /* non-fatal */ 835 #endif 836 } 837 838 /* 839 * Initialize the PCI ICU. 840 */ 841 if ((*piit->piit_init)(pc, iot, icutag, &pciintr_icu_tag, 842 &pciintr_icu_handle) != 0) 843 return (-1); /* non-fatal */ 844 845 /* 846 * Initialize the PCI interrupt link map. 847 */ 848 if (pciintr_link_init()) 849 return (-1); /* non-fatal */ 850 851 /* 852 * Fix up the link->IRQ mappings. 853 */ 854 if (pciintr_link_fixup() != 0) 855 return (-1); /* non-fatal */ 856 857 /* 858 * Now actually program the PCI ICU with the new 859 * routing information. 860 */ 861 if (pciintr_link_route(pciirq) != 0) 862 return (1); /* fatal */ 863 864 /* 865 * Now that we've routed all of the PIRQs, rewrite the PCI 866 * configuration headers to reflect the new mapping. 867 */ 868 if (pciintr_header_fixup(pc) != 0) 869 return (1); /* fatal */ 870 871 /* 872 * Free any unused PCI IRQs for ISA devices. 873 */ 874 if (pciintr_irq_release(pciirq) != 0) 875 return (-1); /* non-fatal */ 876 877 /* 878 * All done! 879 */ 880 return (0); /* success! */ 881 } 882