1 /* $NetBSD: gscpcib.c,v 1.9 2007/12/11 12:00:55 lukem Exp $ */ 2 /* $OpenBSD: gscpcib.c,v 1.3 2004/10/05 19:02:33 grange Exp $ */ 3 /* 4 * Copyright (c) 2004 Alexander Yurchenko <grange@openbsd.org> 5 * 6 * Permission to use, copy, modify, and distribute this software for any 7 * purpose with or without fee is hereby granted, provided that the above 8 * copyright notice and this permission notice appear in all copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 /* 20 * Special driver for the National Semiconductor Geode SC1100 PCI-ISA bridge 21 * that attaches instead of pcib(4). In addition to the core pcib(4) 22 * functionality this driver provides support for the GPIO interface. 23 */ 24 25 #include <sys/cdefs.h> 26 __KERNEL_RCSID(0, "$NetBSD: gscpcib.c,v 1.9 2007/12/11 12:00:55 lukem Exp $"); 27 28 #include <sys/param.h> 29 #include <sys/systm.h> 30 #include <sys/device.h> 31 #include <sys/gpio.h> 32 #include <sys/kernel.h> 33 34 #include <machine/bus.h> 35 36 #include <dev/pci/pcireg.h> 37 #include <dev/pci/pcivar.h> 38 #include <dev/pci/pcidevs.h> 39 40 #include <dev/gpio/gpiovar.h> 41 42 #include <i386/pci/gscpcibreg.h> 43 44 struct gscpcib_softc { 45 struct device sc_dev; 46 47 /* GPIO interface */ 48 bus_space_tag_t sc_gpio_iot; 49 bus_space_handle_t sc_gpio_ioh; 50 struct gpio_chipset_tag sc_gpio_gc; 51 gpio_pin_t sc_gpio_pins[GSCGPIO_NPINS]; 52 }; 53 54 int gscpcib_match(struct device *, struct cfdata *, void *); 55 void gscpcib_attach(struct device *, struct device *, void *); 56 57 int gscpcib_gpio_pin_read(void *, int); 58 void gscpcib_gpio_pin_write(void *, int, int); 59 void gscpcib_gpio_pin_ctl(void *, int, int); 60 61 /* arch/i386/pci/pcib.c */ 62 void pcibattach(struct device *, struct device *, void *); 63 64 CFATTACH_DECL(gscpcib, sizeof(struct gscpcib_softc), 65 gscpcib_match, gscpcib_attach, NULL, NULL); 66 67 extern struct cfdriver gscpcib_cd; 68 69 int 70 gscpcib_match(struct device *parent, struct cfdata *match, 71 void *aux) 72 { 73 struct pci_attach_args *pa = aux; 74 75 if (PCI_CLASS(pa->pa_class) != PCI_CLASS_BRIDGE || 76 PCI_SUBCLASS(pa->pa_class) != PCI_SUBCLASS_BRIDGE_ISA) 77 return (0); 78 79 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_NS && 80 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_NS_SC1100_ISA) 81 return (2); /* supersede pcib(4) */ 82 83 return (0); 84 } 85 86 void 87 gscpcib_attach(struct device *parent, struct device *self, void *aux) 88 { 89 struct gscpcib_softc *sc = (struct gscpcib_softc *)self; 90 struct pci_attach_args *pa = aux; 91 struct gpiobus_attach_args gba; 92 pcireg_t gpiobase; 93 int i; 94 int gpio_present = 0; 95 96 /* Map GPIO I/O space */ 97 gpiobase = pci_conf_read(pa->pa_pc, pa->pa_tag, GSCGPIO_BASE); 98 sc->sc_gpio_iot = pa->pa_iot; 99 if (bus_space_map(sc->sc_gpio_iot, PCI_MAPREG_IO_ADDR(gpiobase), 100 GSCGPIO_SIZE, 0, &sc->sc_gpio_ioh)) { 101 printf(": failed to map GPIO I/O space"); 102 goto corepcib; 103 } 104 105 /* Initialize pins array */ 106 for (i = 0; i < GSCGPIO_NPINS; i++) { 107 sc->sc_gpio_pins[i].pin_num = i; 108 sc->sc_gpio_pins[i].pin_caps = GPIO_PIN_INPUT | 109 GPIO_PIN_OUTPUT | GPIO_PIN_OPENDRAIN | 110 GPIO_PIN_PUSHPULL | GPIO_PIN_TRISTATE | 111 GPIO_PIN_PULLUP; 112 113 /* safe defaults */ 114 sc->sc_gpio_pins[i].pin_flags = GPIO_PIN_TRISTATE; 115 sc->sc_gpio_pins[i].pin_state = GPIO_PIN_LOW; 116 gscpcib_gpio_pin_ctl(sc, i, sc->sc_gpio_pins[i].pin_flags); 117 gscpcib_gpio_pin_write(sc, i, sc->sc_gpio_pins[i].pin_state); 118 } 119 120 /* Create controller tag */ 121 sc->sc_gpio_gc.gp_cookie = sc; 122 sc->sc_gpio_gc.gp_pin_read = gscpcib_gpio_pin_read; 123 sc->sc_gpio_gc.gp_pin_write = gscpcib_gpio_pin_write; 124 sc->sc_gpio_gc.gp_pin_ctl = gscpcib_gpio_pin_ctl; 125 126 gba.gba_gc = &sc->sc_gpio_gc; 127 gba.gba_pins = sc->sc_gpio_pins; 128 gba.gba_npins = GSCGPIO_NPINS; 129 130 gpio_present = 1; 131 132 corepcib: 133 /* Provide core pcib(4) functionality */ 134 pcibattach(parent, self, aux); 135 136 /* Attach GPIO framework */ 137 if (gpio_present) 138 config_found_ia(&sc->sc_dev, "gpiobus", &gba, gpiobus_print); 139 } 140 141 static inline void 142 gscpcib_gpio_pin_select(struct gscpcib_softc *sc, int pin) 143 { 144 bus_space_write_4(sc->sc_gpio_iot, sc->sc_gpio_ioh, GSCGPIO_SEL, pin); 145 } 146 147 int 148 gscpcib_gpio_pin_read(void *arg, int pin) 149 { 150 struct gscpcib_softc *sc = arg; 151 int reg, shift; 152 uint32_t data; 153 154 reg = (pin < 32 ? GSCGPIO_GPDI0 : GSCGPIO_GPDI1); 155 shift = pin % 32; 156 data = bus_space_read_4(sc->sc_gpio_iot, sc->sc_gpio_ioh, reg); 157 158 return ((data >> shift) & 0x1); 159 } 160 161 void 162 gscpcib_gpio_pin_write(void *arg, int pin, int value) 163 { 164 struct gscpcib_softc *sc = arg; 165 int reg, shift; 166 uint32_t data; 167 168 reg = (pin < 32 ? GSCGPIO_GPDO0 : GSCGPIO_GPDO1); 169 shift = pin % 32; 170 data = bus_space_read_4(sc->sc_gpio_iot, sc->sc_gpio_ioh, reg); 171 if (value == 0) 172 data &= ~(1 << shift); 173 else if (value == 1) 174 data |= (1 << shift); 175 176 bus_space_write_4(sc->sc_gpio_iot, sc->sc_gpio_ioh, reg, data); 177 } 178 179 void 180 gscpcib_gpio_pin_ctl(void *arg, int pin, int flags) 181 { 182 struct gscpcib_softc *sc = arg; 183 uint32_t conf; 184 185 gscpcib_gpio_pin_select(sc, pin); 186 conf = bus_space_read_4(sc->sc_gpio_iot, sc->sc_gpio_ioh, 187 GSCGPIO_CONF); 188 189 conf &= ~(GSCGPIO_CONF_OUTPUTEN | GSCGPIO_CONF_PUSHPULL | 190 GSCGPIO_CONF_PULLUP); 191 if ((flags & GPIO_PIN_TRISTATE) == 0) 192 conf |= GSCGPIO_CONF_OUTPUTEN; 193 if (flags & GPIO_PIN_PUSHPULL) 194 conf |= GSCGPIO_CONF_PUSHPULL; 195 if (flags & GPIO_PIN_PULLUP) 196 conf |= GSCGPIO_CONF_PULLUP; 197 bus_space_write_4(sc->sc_gpio_iot, sc->sc_gpio_ioh, 198 GSCGPIO_CONF, conf); 199 } 200