1 /* $NetBSD: pmap.h,v 1.83 2005/08/08 05:54:07 junyoung Exp $ */ 2 3 /* 4 * 5 * Copyright (c) 1997 Charles D. Cranor and Washington University. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgment: 18 * This product includes software developed by Charles D. Cranor and 19 * Washington University. 20 * 4. The name of the author may not be used to endorse or promote products 21 * derived from this software without specific prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 24 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 25 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 26 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 27 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 28 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 29 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 30 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 32 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 33 */ 34 35 /* 36 * pmap.h: see pmap.c for the history of this pmap module. 37 */ 38 39 #ifndef _I386_PMAP_H_ 40 #define _I386_PMAP_H_ 41 42 #if defined(_KERNEL_OPT) 43 #include "opt_user_ldt.h" 44 #include "opt_largepages.h" 45 #endif 46 47 #include <machine/cpufunc.h> 48 #include <machine/pte.h> 49 #include <machine/segments.h> 50 #include <uvm/uvm_object.h> 51 52 /* 53 * see pte.h for a description of i386 MMU terminology and hardware 54 * interface. 55 * 56 * a pmap describes a processes' 4GB virtual address space. this 57 * virtual address space can be broken up into 1024 4MB regions which 58 * are described by PDEs in the PDP. the PDEs are defined as follows: 59 * 60 * (ranges are inclusive -> exclusive, just like vm_map_entry start/end) 61 * (the following assumes that KERNBASE is 0xc0000000) 62 * 63 * PDE#s VA range usage 64 * 0->766 0x0 -> 0xbfc00000 user address space 65 * 767 0xbfc00000-> recursive mapping of PDP (used for 66 * 0xc0000000 linear mapping of PTPs) 67 * 768->1023 0xc0000000-> kernel address space (constant 68 * 0xffc00000 across all pmap's/processes) 69 * 1023 0xffc00000-> "alternate" recursive PDP mapping 70 * <end> (for other pmaps) 71 * 72 * 73 * note: a recursive PDP mapping provides a way to map all the PTEs for 74 * a 4GB address space into a linear chunk of virtual memory. in other 75 * words, the PTE for page 0 is the first int mapped into the 4MB recursive 76 * area. the PTE for page 1 is the second int. the very last int in the 77 * 4MB range is the PTE that maps VA 0xfffff000 (the last page in a 4GB 78 * address). 79 * 80 * all pmap's PD's must have the same values in slots 768->1023 so that 81 * the kernel is always mapped in every process. these values are loaded 82 * into the PD at pmap creation time. 83 * 84 * at any one time only one pmap can be active on a processor. this is 85 * the pmap whose PDP is pointed to by processor register %cr3. this pmap 86 * will have all its PTEs mapped into memory at the recursive mapping 87 * point (slot #767 as show above). when the pmap code wants to find the 88 * PTE for a virtual address, all it has to do is the following: 89 * 90 * address of PTE = (767 * 4MB) + (VA / PAGE_SIZE) * sizeof(pt_entry_t) 91 * = 0xbfc00000 + (VA / 4096) * 4 92 * 93 * what happens if the pmap layer is asked to perform an operation 94 * on a pmap that is not the one which is currently active? in that 95 * case we take the PA of the PDP of non-active pmap and put it in 96 * slot 1023 of the active pmap. this causes the non-active pmap's 97 * PTEs to get mapped in the final 4MB of the 4GB address space 98 * (e.g. starting at 0xffc00000). 99 * 100 * the following figure shows the effects of the recursive PDP mapping: 101 * 102 * PDP (%cr3) 103 * +----+ 104 * | 0| -> PTP#0 that maps VA 0x0 -> 0x400000 105 * | | 106 * | | 107 * | 767| -> points back to PDP (%cr3) mapping VA 0xbfc00000 -> 0xc0000000 108 * | 768| -> first kernel PTP (maps 0xc0000000 -> 0xc0400000) 109 * | | 110 * |1023| -> points to alternate pmap's PDP (maps 0xffc00000 -> end) 111 * +----+ 112 * 113 * note that the PDE#767 VA (0xbfc00000) is defined as "PTE_BASE" 114 * note that the PDE#1023 VA (0xffc00000) is defined as "APTE_BASE" 115 * 116 * starting at VA 0xbfc00000 the current active PDP (%cr3) acts as a 117 * PTP: 118 * 119 * PTP#767 == PDP(%cr3) => maps VA 0xbfc00000 -> 0xc0000000 120 * +----+ 121 * | 0| -> maps the contents of PTP#0 at VA 0xbfc00000->0xbfc01000 122 * | | 123 * | | 124 * | 767| -> maps contents of PTP#767 (the PDP) at VA 0xbfeff000 125 * | 768| -> maps contents of first kernel PTP 126 * | | 127 * |1023| 128 * +----+ 129 * 130 * note that mapping of the PDP at PTP#767's VA (0xbfeff000) is 131 * defined as "PDP_BASE".... within that mapping there are two 132 * defines: 133 * "PDP_PDE" (0xbfeffbfc) is the VA of the PDE in the PDP 134 * which points back to itself. 135 * "APDP_PDE" (0xbfeffffc) is the VA of the PDE in the PDP which 136 * establishes the recursive mapping of the alternate pmap. 137 * to set the alternate PDP, one just has to put the correct 138 * PA info in *APDP_PDE. 139 * 140 * note that in the APTE_BASE space, the APDP appears at VA 141 * "APDP_BASE" (0xfffff000). 142 */ 143 /* XXX MP should we allocate one APDP_PDE per processor?? */ 144 145 /* 146 * the following defines identify the slots used as described above. 147 */ 148 149 #define PDSLOT_PTE ((KERNBASE/NBPD)-1) /* 767: for recursive PDP map */ 150 #define PDSLOT_KERN (KERNBASE/NBPD) /* 768: start of kernel space */ 151 #define PDSLOT_APTE ((unsigned)1023) /* 1023: alternative recursive slot */ 152 153 /* 154 * the following defines give the virtual addresses of various MMU 155 * data structures: 156 * PTE_BASE and APTE_BASE: the base VA of the linear PTE mappings 157 * PDP_BASE and APDP_BASE: the base VA of the recursive mapping of the PDP 158 * PDP_PDE and APDP_PDE: the VA of the PDE that points back to the PDP/APDP 159 */ 160 161 #define PTE_BASE ((pt_entry_t *) (PDSLOT_PTE * NBPD) ) 162 #define APTE_BASE ((pt_entry_t *) (PDSLOT_APTE * NBPD) ) 163 #define PDP_BASE ((pd_entry_t *)(((char *)PTE_BASE) + (PDSLOT_PTE * PAGE_SIZE))) 164 #define APDP_BASE ((pd_entry_t *)(((char *)APTE_BASE) + (PDSLOT_APTE * PAGE_SIZE))) 165 #define PDP_PDE (PDP_BASE + PDSLOT_PTE) 166 #define APDP_PDE (PDP_BASE + PDSLOT_APTE) 167 168 /* 169 * the follow define determines how many PTPs should be set up for the 170 * kernel by locore.S at boot time. this should be large enough to 171 * get the VM system running. once the VM system is running, the 172 * pmap module can add more PTPs to the kernel area on demand. 173 */ 174 175 #ifndef NKPTP 176 #define NKPTP 0 /* 16MB to start */ 177 #endif 178 #define NKPTP_MIN 2 /* smallest value we allow */ 179 #define NKPTP_MAX (1024 - (KERNBASE/NBPD) - 1) 180 /* largest value (-1 for APTP space) */ 181 182 /* 183 * pdei/ptei: generate index into PDP/PTP from a VA 184 */ 185 #define pdei(VA) (((VA) & PD_MASK) >> PDSHIFT) 186 #define ptei(VA) (((VA) & PT_MASK) >> PGSHIFT) 187 188 /* 189 * PTP macros: 190 * a PTP's index is the PD index of the PDE that points to it 191 * a PTP's offset is the byte-offset in the PTE space that this PTP is at 192 * a PTP's VA is the first VA mapped by that PTP 193 * 194 * note that PAGE_SIZE == number of bytes in a PTP (4096 bytes == 1024 entries) 195 * NBPD == number of bytes a PTP can map (4MB) 196 */ 197 198 #define ptp_i2o(I) ((I) * PAGE_SIZE) /* index => offset */ 199 #define ptp_o2i(O) ((O) / PAGE_SIZE) /* offset => index */ 200 #define ptp_i2v(I) ((I) * NBPD) /* index => VA */ 201 #define ptp_v2i(V) ((V) / NBPD) /* VA => index (same as pdei) */ 202 203 /* 204 * PG_AVAIL usage: we make use of the ignored bits of the PTE 205 */ 206 207 #define PG_W PG_AVAIL1 /* "wired" mapping */ 208 #define PG_PVLIST PG_AVAIL2 /* mapping has entry on pvlist */ 209 #define PG_X PG_AVAIL3 /* executable mapping */ 210 211 /* 212 * Number of PTE's per cache line. 4 byte pte, 32-byte cache line 213 * Used to avoid false sharing of cache lines. 214 */ 215 #define NPTECL 8 216 217 #ifdef _KERNEL 218 /* 219 * pmap data structures: see pmap.c for details of locking. 220 */ 221 222 struct pmap; 223 typedef struct pmap *pmap_t; 224 225 /* 226 * we maintain a list of all non-kernel pmaps 227 */ 228 229 LIST_HEAD(pmap_head, pmap); /* struct pmap_head: head of a pmap list */ 230 231 /* 232 * the pmap structure 233 * 234 * note that the pm_obj contains the simple_lock, the reference count, 235 * page list, and number of PTPs within the pmap. 236 * 237 * XXX If we ever support processor numbers higher than 31, we'll have 238 * XXX to rethink the CPU mask. 239 */ 240 241 struct pmap { 242 struct uvm_object pm_obj; /* object (lck by object lock) */ 243 #define pm_lock pm_obj.vmobjlock 244 LIST_ENTRY(pmap) pm_list; /* list (lck by pm_list lock) */ 245 pd_entry_t *pm_pdir; /* VA of PD (lck by object lock) */ 246 u_int32_t pm_pdirpa; /* PA of PD (read-only after create) */ 247 struct vm_page *pm_ptphint; /* pointer to a PTP in our pmap */ 248 struct pmap_statistics pm_stats; /* pmap stats (lck by object lock) */ 249 250 vaddr_t pm_hiexec; /* highest executable mapping */ 251 int pm_flags; /* see below */ 252 253 union descriptor *pm_ldt; /* user-set LDT */ 254 int pm_ldt_len; /* number of LDT entries */ 255 int pm_ldt_sel; /* LDT selector */ 256 u_int32_t pm_cpus; /* mask of CPUs using pmap */ 257 }; 258 259 /* pm_flags */ 260 #define PMF_USER_LDT 0x01 /* pmap has user-set LDT */ 261 262 /* 263 * for each managed physical page we maintain a list of <PMAP,VA>'s 264 * which it is mapped at. the list is headed by a pv_head structure. 265 * there is one pv_head per managed phys page (allocated at boot time). 266 * the pv_head structure points to a list of pv_entry structures (each 267 * describes one mapping). 268 */ 269 270 struct pv_entry { /* locked by its list's pvh_lock */ 271 SPLAY_ENTRY(pv_entry) pv_node; /* splay-tree node */ 272 struct pmap *pv_pmap; /* the pmap */ 273 vaddr_t pv_va; /* the virtual address */ 274 struct vm_page *pv_ptp; /* the vm_page of the PTP */ 275 }; 276 277 /* 278 * pv_entrys are dynamically allocated in chunks from a single page. 279 * we keep track of how many pv_entrys are in use for each page and 280 * we can free pv_entry pages if needed. there is one lock for the 281 * entire allocation system. 282 */ 283 284 struct pv_page_info { 285 TAILQ_ENTRY(pv_page) pvpi_list; 286 struct pv_entry *pvpi_pvfree; 287 int pvpi_nfree; 288 }; 289 290 /* 291 * number of pv_entry's in a pv_page 292 * (note: won't work on systems where NPBG isn't a constant) 293 */ 294 295 #define PVE_PER_PVPAGE ((PAGE_SIZE - sizeof(struct pv_page_info)) / \ 296 sizeof(struct pv_entry)) 297 298 /* 299 * a pv_page: where pv_entrys are allocated from 300 */ 301 302 struct pv_page { 303 struct pv_page_info pvinfo; 304 struct pv_entry pvents[PVE_PER_PVPAGE]; 305 }; 306 307 /* 308 * global kernel variables 309 */ 310 311 /* PDPpaddr: is the physical address of the kernel's PDP */ 312 extern u_long PDPpaddr; 313 314 extern struct pmap kernel_pmap_store; /* kernel pmap */ 315 extern int nkpde; /* current # of PDEs for kernel */ 316 extern int pmap_pg_g; /* do we support PG_G? */ 317 318 /* 319 * macros 320 */ 321 322 #define pmap_kernel() (&kernel_pmap_store) 323 #define pmap_resident_count(pmap) ((pmap)->pm_stats.resident_count) 324 #define pmap_wired_count(pmap) ((pmap)->pm_stats.wired_count) 325 #define pmap_update(pmap) /* nothing (yet) */ 326 327 #define pmap_clear_modify(pg) pmap_clear_attrs(pg, PG_M) 328 #define pmap_clear_reference(pg) pmap_clear_attrs(pg, PG_U) 329 #define pmap_copy(DP,SP,D,L,S) 330 #define pmap_is_modified(pg) pmap_test_attrs(pg, PG_M) 331 #define pmap_is_referenced(pg) pmap_test_attrs(pg, PG_U) 332 #define pmap_move(DP,SP,D,L,S) 333 #define pmap_phys_address(ppn) x86_ptob(ppn) 334 #define pmap_valid_entry(E) ((E) & PG_V) /* is PDE or PTE valid? */ 335 336 337 /* 338 * prototypes 339 */ 340 341 void pmap_activate(struct lwp *); 342 void pmap_bootstrap(vaddr_t); 343 boolean_t pmap_clear_attrs(struct vm_page *, int); 344 void pmap_deactivate(struct lwp *); 345 void pmap_deactivate2(struct lwp *); 346 void pmap_page_remove (struct vm_page *); 347 void pmap_remove(struct pmap *, vaddr_t, vaddr_t); 348 boolean_t pmap_test_attrs(struct vm_page *, int); 349 void pmap_write_protect(struct pmap *, vaddr_t, vaddr_t, vm_prot_t); 350 int pmap_exec_fixup(struct vm_map *, struct trapframe *, 351 struct pcb *); 352 void pmap_load(void); 353 354 vaddr_t reserve_dumppages(vaddr_t); /* XXX: not a pmap fn */ 355 356 void pmap_tlb_shootdown(pmap_t, vaddr_t, pt_entry_t, int32_t *); 357 void pmap_tlb_shootnow(int32_t); 358 void pmap_do_tlb_shootdown(struct cpu_info *); 359 360 #define PMAP_GROWKERNEL /* turn on pmap_growkernel interface */ 361 362 /* 363 * Do idle page zero'ing uncached to avoid polluting the cache. 364 */ 365 boolean_t pmap_pageidlezero(paddr_t); 366 #define PMAP_PAGEIDLEZERO(pa) pmap_pageidlezero((pa)) 367 368 /* 369 * inline functions 370 */ 371 372 /*ARGSUSED*/ 373 static __inline void 374 pmap_remove_all(struct pmap *pmap) 375 { 376 /* Nothing. */ 377 } 378 379 /* 380 * pmap_update_pg: flush one page from the TLB (or flush the whole thing 381 * if hardware doesn't support one-page flushing) 382 */ 383 384 __inline static void __attribute__((__unused__)) 385 pmap_update_pg(vaddr_t va) 386 { 387 #if defined(I386_CPU) 388 if (cpu_class == CPUCLASS_386) 389 tlbflush(); 390 else 391 #endif 392 invlpg((u_int) va); 393 } 394 395 /* 396 * pmap_update_2pg: flush two pages from the TLB 397 */ 398 399 __inline static void __attribute__((__unused__)) 400 pmap_update_2pg(vaddr_t va, vaddr_t vb) 401 { 402 #if defined(I386_CPU) 403 if (cpu_class == CPUCLASS_386) 404 tlbflush(); 405 else 406 #endif 407 { 408 invlpg((u_int) va); 409 invlpg((u_int) vb); 410 } 411 } 412 413 /* 414 * pmap_page_protect: change the protection of all recorded mappings 415 * of a managed page 416 * 417 * => this function is a frontend for pmap_page_remove/pmap_clear_attrs 418 * => we only have to worry about making the page more protected. 419 * unprotecting a page is done on-demand at fault time. 420 */ 421 422 __inline static void __attribute__((__unused__)) 423 pmap_page_protect(struct vm_page *pg, vm_prot_t prot) 424 { 425 if ((prot & VM_PROT_WRITE) == 0) { 426 if (prot & (VM_PROT_READ|VM_PROT_EXECUTE)) { 427 (void) pmap_clear_attrs(pg, PG_RW); 428 } else { 429 pmap_page_remove(pg); 430 } 431 } 432 } 433 434 /* 435 * pmap_protect: change the protection of pages in a pmap 436 * 437 * => this function is a frontend for pmap_remove/pmap_write_protect 438 * => we only have to worry about making the page more protected. 439 * unprotecting a page is done on-demand at fault time. 440 */ 441 442 __inline static void __attribute__((__unused__)) 443 pmap_protect(struct pmap *pmap, vaddr_t sva, vaddr_t eva, vm_prot_t prot) 444 { 445 if ((prot & VM_PROT_WRITE) == 0) { 446 if (prot & (VM_PROT_READ|VM_PROT_EXECUTE)) { 447 pmap_write_protect(pmap, sva, eva, prot); 448 } else { 449 pmap_remove(pmap, sva, eva); 450 } 451 } 452 } 453 454 /* 455 * various address inlines 456 * 457 * vtopte: return a pointer to the PTE mapping a VA, works only for 458 * user and PT addresses 459 * 460 * kvtopte: return a pointer to the PTE mapping a kernel VA 461 */ 462 463 #include <lib/libkern/libkern.h> 464 465 static __inline pt_entry_t * __attribute__((__unused__)) 466 vtopte(vaddr_t va) 467 { 468 469 KASSERT(va < (PDSLOT_KERN << PDSHIFT)); 470 471 return (PTE_BASE + x86_btop(va)); 472 } 473 474 static __inline pt_entry_t * __attribute__((__unused__)) 475 kvtopte(vaddr_t va) 476 { 477 478 KASSERT(va >= (PDSLOT_KERN << PDSHIFT)); 479 480 #ifdef LARGEPAGES 481 { 482 pd_entry_t *pde; 483 484 pde = PDP_BASE + pdei(va); 485 if (*pde & PG_PS) 486 return ((pt_entry_t *)pde); 487 } 488 #endif 489 490 return (PTE_BASE + x86_btop(va)); 491 } 492 493 #define pmap_cpu_has_pg_n() (cpu_class != CPUCLASS_386) 494 #define pmap_cpu_has_invlpg() (cpu_class != CPUCLASS_386) 495 496 paddr_t vtophys(vaddr_t); 497 vaddr_t pmap_map(vaddr_t, paddr_t, paddr_t, vm_prot_t); 498 499 #if defined(USER_LDT) 500 void pmap_ldt_cleanup(struct lwp *); 501 #define PMAP_FORK 502 #endif /* USER_LDT */ 503 504 /* 505 * Hooks for the pool allocator. 506 */ 507 #define POOL_VTOPHYS(va) vtophys((vaddr_t) (va)) 508 509 #endif /* _KERNEL */ 510 #endif /* _I386_PMAP_H_ */ 511