1 /* $NetBSD: pmap.h,v 1.109 2011/02/01 20:09:08 chuck Exp $ */ 2 3 /* 4 * Copyright (c) 1997 Charles D. Cranor and Washington University. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 21 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 22 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 23 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 25 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 */ 27 28 /* 29 * Copyright (c) 2001 Wasabi Systems, Inc. 30 * All rights reserved. 31 * 32 * Written by Frank van der Linden for Wasabi Systems, Inc. 33 * 34 * Redistribution and use in source and binary forms, with or without 35 * modification, are permitted provided that the following conditions 36 * are met: 37 * 1. Redistributions of source code must retain the above copyright 38 * notice, this list of conditions and the following disclaimer. 39 * 2. Redistributions in binary form must reproduce the above copyright 40 * notice, this list of conditions and the following disclaimer in the 41 * documentation and/or other materials provided with the distribution. 42 * 3. All advertising materials mentioning features or use of this software 43 * must display the following acknowledgement: 44 * This product includes software developed for the NetBSD Project by 45 * Wasabi Systems, Inc. 46 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 47 * or promote products derived from this software without specific prior 48 * written permission. 49 * 50 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 51 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 52 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 53 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 54 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 55 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 56 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 57 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 58 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 59 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 60 * POSSIBILITY OF SUCH DAMAGE. 61 */ 62 63 #ifndef _I386_PMAP_H_ 64 #define _I386_PMAP_H_ 65 66 #if defined(_KERNEL_OPT) 67 #include "opt_user_ldt.h" 68 #include "opt_xen.h" 69 #endif 70 71 #include <sys/atomic.h> 72 73 #include <i386/pte.h> 74 #include <machine/segments.h> 75 #if defined(_KERNEL) 76 #include <machine/cpufunc.h> 77 #endif 78 79 #include <uvm/uvm_object.h> 80 #ifdef XEN 81 #include <xen/xenfunc.h> 82 #include <xen/xenpmap.h> 83 #endif /* XEN */ 84 85 /* 86 * see pte.h for a description of i386 MMU terminology and hardware 87 * interface. 88 * 89 * a pmap describes a processes' 4GB virtual address space. when PAE 90 * is not in use, this virtual address space can be broken up into 1024 4MB 91 * regions which are described by PDEs in the PDP. the PDEs are defined as 92 * follows: 93 * 94 * (ranges are inclusive -> exclusive, just like vm_map_entry start/end) 95 * (the following assumes that KERNBASE is 0xc0000000) 96 * 97 * PDE#s VA range usage 98 * 0->766 0x0 -> 0xbfc00000 user address space 99 * 767 0xbfc00000-> recursive mapping of PDP (used for 100 * 0xc0000000 linear mapping of PTPs) 101 * 768->1023 0xc0000000-> kernel address space (constant 102 * 0xffc00000 across all pmap's/processes) 103 * 1023 0xffc00000-> "alternate" recursive PDP mapping 104 * <end> (for other pmaps) 105 * 106 * 107 * note: a recursive PDP mapping provides a way to map all the PTEs for 108 * a 4GB address space into a linear chunk of virtual memory. in other 109 * words, the PTE for page 0 is the first int mapped into the 4MB recursive 110 * area. the PTE for page 1 is the second int. the very last int in the 111 * 4MB range is the PTE that maps VA 0xfffff000 (the last page in a 4GB 112 * address). 113 * 114 * all pmap's PD's must have the same values in slots 768->1023 so that 115 * the kernel is always mapped in every process. these values are loaded 116 * into the PD at pmap creation time. 117 * 118 * at any one time only one pmap can be active on a processor. this is 119 * the pmap whose PDP is pointed to by processor register %cr3. this pmap 120 * will have all its PTEs mapped into memory at the recursive mapping 121 * point (slot #767 as show above). when the pmap code wants to find the 122 * PTE for a virtual address, all it has to do is the following: 123 * 124 * address of PTE = (767 * 4MB) + (VA / PAGE_SIZE) * sizeof(pt_entry_t) 125 * = 0xbfc00000 + (VA / 4096) * 4 126 * 127 * what happens if the pmap layer is asked to perform an operation 128 * on a pmap that is not the one which is currently active? in that 129 * case we take the PA of the PDP of non-active pmap and put it in 130 * slot 1023 of the active pmap. this causes the non-active pmap's 131 * PTEs to get mapped in the final 4MB of the 4GB address space 132 * (e.g. starting at 0xffc00000). 133 * 134 * the following figure shows the effects of the recursive PDP mapping: 135 * 136 * PDP (%cr3) 137 * +----+ 138 * | 0| -> PTP#0 that maps VA 0x0 -> 0x400000 139 * | | 140 * | | 141 * | 767| -> points back to PDP (%cr3) mapping VA 0xbfc00000 -> 0xc0000000 142 * | 768| -> first kernel PTP (maps 0xc0000000 -> 0xc0400000) 143 * | | 144 * |1023| -> points to alternate pmap's PDP (maps 0xffc00000 -> end) 145 * +----+ 146 * 147 * note that the PDE#767 VA (0xbfc00000) is defined as "PTE_BASE" 148 * note that the PDE#1023 VA (0xffc00000) is defined as "APTE_BASE" 149 * 150 * starting at VA 0xbfc00000 the current active PDP (%cr3) acts as a 151 * PTP: 152 * 153 * PTP#767 == PDP(%cr3) => maps VA 0xbfc00000 -> 0xc0000000 154 * +----+ 155 * | 0| -> maps the contents of PTP#0 at VA 0xbfc00000->0xbfc01000 156 * | | 157 * | | 158 * | 767| -> maps contents of PTP#767 (the PDP) at VA 0xbfeff000 159 * | 768| -> maps contents of first kernel PTP 160 * | | 161 * |1023| 162 * +----+ 163 * 164 * note that mapping of the PDP at PTP#767's VA (0xbfeff000) is 165 * defined as "PDP_BASE".... within that mapping there are two 166 * defines: 167 * "PDP_PDE" (0xbfeffbfc) is the VA of the PDE in the PDP 168 * which points back to itself. 169 * "APDP_PDE" (0xbfeffffc) is the VA of the PDE in the PDP which 170 * establishes the recursive mapping of the alternate pmap. 171 * to set the alternate PDP, one just has to put the correct 172 * PA info in *APDP_PDE. 173 * 174 * note that in the APTE_BASE space, the APDP appears at VA 175 * "APDP_BASE" (0xfffff000). 176 * 177 * - PAE support - 178 * --------------- 179 * 180 * PAE adds another layer of indirection during address translation, breaking 181 * up the translation process in 3 different levels: 182 * - L3 page directory, containing 4 * 64-bits addresses (index determined by 183 * bits [31:30] from the virtual address). This breaks up the address space 184 * in 4 1GB regions. 185 * - the PD (L2), containing 512 64-bits addresses, breaking each L3 region 186 * in 512 * 2MB regions. 187 * - the PT (L1), also containing 512 64-bits addresses (at L1, the size of 188 * the pages is still 4K). 189 * 190 * The kernel virtual space is mapped by the last entry in the L3 page, 191 * the first 3 entries mapping the user VA space. 192 * 193 * Because the L3 has only 4 entries of 1GB each, we can't use recursive 194 * mappings at this level for PDP_PDE and APDP_PDE (this would eat up 2 of 195 * the 4GB virtual space). There are also restrictions imposed by Xen on the 196 * last entry of the L3 PD (reference count to this page cannot be bigger 197 * than 1), which makes it hard to use one L3 page per pmap to switch 198 * between pmaps using %cr3. 199 * 200 * As such, each CPU gets its own L3 page that is always loaded into its %cr3 201 * (ci_pae_l3_pd in the associated cpu_info struct). We claim that the VM has 202 * only a 2-level PTP (similar to the non-PAE case). L2 PD is now 4 contiguous 203 * pages long (corresponding to the 4 entries of the L3), and the different 204 * index/slots (like PDP_PDE) are adapted accordingly. 205 * 206 * Kernel space remains in L3[3], L3[0-2] maps the user VA space. Switching 207 * between pmaps consists in modifying the first 3 entries of the CPU's L3 page. 208 * 209 * PTE_BASE and APTE_BASE will need 4 entries in the L2 PD pages to map the 210 * L2 pages recursively. 211 * 212 * In addition, for Xen, we can't recursively map L3[3] (Xen wants the ref 213 * count on this page to be exactly one), so we use a shadow PD page for 214 * the last L2 PD. The shadow page could be static too, but to make pm_pdir[] 215 * contiguous we'll allocate/copy one page per pmap. 216 */ 217 /* XXX MP should we allocate one APDP_PDE per processor?? */ 218 219 /* 220 * Mask to get rid of the sign-extended part of addresses. 221 */ 222 #define VA_SIGN_MASK 0 223 #define VA_SIGN_NEG(va) ((va) | VA_SIGN_MASK) 224 /* 225 * XXXfvdl this one's not right. 226 */ 227 #define VA_SIGN_POS(va) ((va) & ~VA_SIGN_MASK) 228 229 /* 230 * the following defines identify the slots used as described above. 231 */ 232 #ifdef PAE 233 #define L2_SLOT_PTE (KERNBASE/NBPD_L2-4) /* 1532: for recursive PDP map */ 234 #define L2_SLOT_KERN (KERNBASE/NBPD_L2) /* 1536: start of kernel space */ 235 #ifndef XEN 236 #define L2_SLOT_APTE 2044 /* 2044: alternative recursive slot */ 237 #else 238 #define L2_SLOT_APTE 1960 /* 1964-2047 reserved by Xen */ 239 #endif 240 #else /* PAE */ 241 #define L2_SLOT_PTE (KERNBASE/NBPD_L2-1) /* 767: for recursive PDP map */ 242 #define L2_SLOT_KERN (KERNBASE/NBPD_L2) /* 768: start of kernel space */ 243 #ifndef XEN 244 #define L2_SLOT_APTE 1023 /* 1023: alternative recursive slot */ 245 #else 246 #define L2_SLOT_APTE 1007 /* 1008-1023 reserved by Xen */ 247 #endif 248 #endif /* PAE */ 249 250 #define L2_SLOT_KERNBASE L2_SLOT_KERN 251 252 #define PDIR_SLOT_KERN L2_SLOT_KERN 253 #define PDIR_SLOT_PTE L2_SLOT_PTE 254 #define PDIR_SLOT_APTE L2_SLOT_APTE 255 256 /* 257 * the following defines give the virtual addresses of various MMU 258 * data structures: 259 * PTE_BASE and APTE_BASE: the base VA of the linear PTE mappings 260 * PDP_BASE and APDP_BASE: the base VA of the recursive mapping of the PDP 261 * PDP_PDE and APDP_PDE: the VA of the PDE that points back to the PDP/APDP 262 */ 263 264 #define PTE_BASE ((pt_entry_t *) (PDIR_SLOT_PTE * NBPD_L2)) 265 #define APTE_BASE ((pt_entry_t *) (VA_SIGN_NEG((PDIR_SLOT_APTE * NBPD_L2)))) 266 267 #define L1_BASE PTE_BASE 268 #define AL1_BASE APTE_BASE 269 270 #define L2_BASE ((pd_entry_t *)((char *)L1_BASE + L2_SLOT_PTE * NBPD_L1)) 271 #define AL2_BASE ((pd_entry_t *)((char *)AL1_BASE + L2_SLOT_PTE * NBPD_L1)) 272 273 #define PDP_PDE (L2_BASE + PDIR_SLOT_PTE) 274 #if defined(PAE) && defined(XEN) 275 /* 276 * when PAE is in use under Xen, we can't write APDP_PDE through the recursive 277 * mapping, because it points to the shadow PD. Use the kernel PD instead, 278 * which is static 279 */ 280 #define APDP_PDE (&pmap_kl2pd[l2tol2(PDIR_SLOT_APTE)]) 281 #define APDP_PDE_SHADOW (L2_BASE + PDIR_SLOT_APTE) 282 #else /* PAE && XEN */ 283 #define APDP_PDE (L2_BASE + PDIR_SLOT_APTE) 284 #endif /* PAE && XEN */ 285 286 #define PDP_BASE L2_BASE 287 #define APDP_BASE AL2_BASE 288 289 /* largest value (-1 for APTP space) */ 290 #define NKL2_MAX_ENTRIES (NTOPLEVEL_PDES - (KERNBASE/NBPD_L2) - 1) 291 #define NKL1_MAX_ENTRIES (unsigned long)(NKL2_MAX_ENTRIES * NPDPG) 292 293 #define NKL2_KIMG_ENTRIES 0 /* XXX unused */ 294 295 #define NKL2_START_ENTRIES 0 /* XXX computed on runtime */ 296 #define NKL1_START_ENTRIES 0 /* XXX unused */ 297 298 #define NTOPLEVEL_PDES (PAGE_SIZE * PDP_SIZE / (sizeof (pd_entry_t))) 299 300 #define NPDPG (PAGE_SIZE / sizeof (pd_entry_t)) 301 302 #define PTP_MASK_INITIALIZER { L1_FRAME, L2_FRAME } 303 #define PTP_SHIFT_INITIALIZER { L1_SHIFT, L2_SHIFT } 304 #define NKPTP_INITIALIZER { NKL1_START_ENTRIES, NKL2_START_ENTRIES } 305 #define NKPTPMAX_INITIALIZER { NKL1_MAX_ENTRIES, NKL2_MAX_ENTRIES } 306 #define NBPD_INITIALIZER { NBPD_L1, NBPD_L2 } 307 #define PDES_INITIALIZER { L2_BASE } 308 #define APDES_INITIALIZER { AL2_BASE } 309 310 #define PTP_LEVELS 2 311 312 /* 313 * PG_AVAIL usage: we make use of the ignored bits of the PTE 314 */ 315 316 #define PG_W PG_AVAIL1 /* "wired" mapping */ 317 #define PG_PVLIST PG_AVAIL2 /* mapping has entry on pvlist */ 318 #define PG_X PG_AVAIL3 /* executable mapping */ 319 320 /* 321 * Number of PTE's per cache line. 4 byte pte, 32-byte cache line 322 * Used to avoid false sharing of cache lines. 323 */ 324 #ifdef PAE 325 #define NPTECL 4 326 #else 327 #define NPTECL 8 328 #endif 329 330 #include <x86/pmap.h> 331 332 #ifndef XEN 333 #define pmap_pa2pte(a) (a) 334 #define pmap_pte2pa(a) ((a) & PG_FRAME) 335 #define pmap_pte_set(p, n) do { *(p) = (n); } while (0) 336 #define pmap_pte_flush() /* nothing */ 337 338 #ifdef PAE 339 #define pmap_pte_cas(p, o, n) atomic_cas_64((p), (o), (n)) 340 #define pmap_pte_testset(p, n) \ 341 atomic_swap_64((volatile uint64_t *)p, n) 342 #define pmap_pte_setbits(p, b) \ 343 atomic_or_64((volatile uint64_t *)p, b) 344 #define pmap_pte_clearbits(p, b) \ 345 atomic_and_64((volatile uint64_t *)p, ~(b)) 346 #else /* PAE */ 347 #define pmap_pte_cas(p, o, n) atomic_cas_32((p), (o), (n)) 348 #define pmap_pte_testset(p, n) \ 349 atomic_swap_ulong((volatile unsigned long *)p, n) 350 #define pmap_pte_setbits(p, b) \ 351 atomic_or_ulong((volatile unsigned long *)p, b) 352 #define pmap_pte_clearbits(p, b) \ 353 atomic_and_ulong((volatile unsigned long *)p, ~(b)) 354 #endif /* PAE */ 355 356 #else /* XEN */ 357 static __inline pt_entry_t 358 pmap_pa2pte(paddr_t pa) 359 { 360 return (pt_entry_t)xpmap_ptom_masked(pa); 361 } 362 363 static __inline paddr_t 364 pmap_pte2pa(pt_entry_t pte) 365 { 366 return xpmap_mtop_masked(pte & PG_FRAME); 367 } 368 static __inline void 369 pmap_pte_set(pt_entry_t *pte, pt_entry_t npte) 370 { 371 int s = splvm(); 372 xpq_queue_pte_update(xpmap_ptetomach(pte), npte); 373 splx(s); 374 } 375 376 static __inline pt_entry_t 377 pmap_pte_cas(volatile pt_entry_t *ptep, pt_entry_t o, pt_entry_t n) 378 { 379 int s = splvm(); 380 pt_entry_t opte = *ptep; 381 382 if (opte == o) { 383 xpq_queue_pte_update(xpmap_ptetomach(__UNVOLATILE(ptep)), n); 384 xpq_flush_queue(); 385 } 386 splx(s); 387 return opte; 388 } 389 390 static __inline pt_entry_t 391 pmap_pte_testset(volatile pt_entry_t *pte, pt_entry_t npte) 392 { 393 int s = splvm(); 394 pt_entry_t opte = *pte; 395 xpq_queue_pte_update(xpmap_ptetomach(__UNVOLATILE(pte)), 396 npte); 397 xpq_flush_queue(); 398 splx(s); 399 return opte; 400 } 401 402 static __inline void 403 pmap_pte_setbits(volatile pt_entry_t *pte, pt_entry_t bits) 404 { 405 int s = splvm(); 406 xpq_queue_pte_update(xpmap_ptetomach(__UNVOLATILE(pte)), (*pte) | bits); 407 xpq_flush_queue(); 408 splx(s); 409 } 410 411 static __inline void 412 pmap_pte_clearbits(volatile pt_entry_t *pte, pt_entry_t bits) 413 { 414 int s = splvm(); 415 xpq_queue_pte_update(xpmap_ptetomach(__UNVOLATILE(pte)), 416 (*pte) & ~bits); 417 xpq_flush_queue(); 418 splx(s); 419 } 420 421 static __inline void 422 pmap_pte_flush(void) 423 { 424 int s = splvm(); 425 xpq_flush_queue(); 426 splx(s); 427 } 428 429 #endif 430 431 #ifdef PAE 432 /* Address of the static kernel's L2 page */ 433 pd_entry_t *pmap_kl2pd; 434 paddr_t pmap_kl2paddr; 435 #endif 436 437 438 struct trapframe; 439 440 int pmap_exec_fixup(struct vm_map *, struct trapframe *, struct pcb *); 441 void pmap_ldt_cleanup(struct lwp *); 442 443 #include <x86/pmap_pv.h> 444 445 #define __HAVE_VM_PAGE_MD 446 #define VM_MDPAGE_INIT(pg) \ 447 memset(&(pg)->mdpage, 0, sizeof((pg)->mdpage)); \ 448 PMAP_PAGE_INIT(&(pg)->mdpage.mp_pp) 449 450 struct vm_page_md { 451 struct pmap_page mp_pp; 452 }; 453 454 #endif /* _I386_PMAP_H_ */ 455