1 /* $NetBSD: pmap.h,v 1.97 2007/11/28 16:44:46 ad Exp $ */ 2 3 /* 4 * 5 * Copyright (c) 1997 Charles D. Cranor and Washington University. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgment: 18 * This product includes software developed by Charles D. Cranor and 19 * Washington University. 20 * 4. The name of the author may not be used to endorse or promote products 21 * derived from this software without specific prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 24 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 25 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 26 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 27 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 28 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 29 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 30 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 32 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 33 */ 34 35 /* 36 * Copyright (c) 2001 Wasabi Systems, Inc. 37 * All rights reserved. 38 * 39 * Written by Frank van der Linden for Wasabi Systems, Inc. 40 * 41 * Redistribution and use in source and binary forms, with or without 42 * modification, are permitted provided that the following conditions 43 * are met: 44 * 1. Redistributions of source code must retain the above copyright 45 * notice, this list of conditions and the following disclaimer. 46 * 2. Redistributions in binary form must reproduce the above copyright 47 * notice, this list of conditions and the following disclaimer in the 48 * documentation and/or other materials provided with the distribution. 49 * 3. All advertising materials mentioning features or use of this software 50 * must display the following acknowledgement: 51 * This product includes software developed for the NetBSD Project by 52 * Wasabi Systems, Inc. 53 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 54 * or promote products derived from this software without specific prior 55 * written permission. 56 * 57 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 58 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 59 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 60 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 61 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 62 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 63 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 64 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 65 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 66 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 67 * POSSIBILITY OF SUCH DAMAGE. 68 */ 69 70 #ifndef _I386_PMAP_H_ 71 #define _I386_PMAP_H_ 72 73 #if defined(_KERNEL_OPT) 74 #include "opt_user_ldt.h" 75 #endif 76 77 #include <sys/atomic.h> 78 79 #include <machine/pte.h> 80 #include <machine/segments.h> 81 #if defined(_KERNEL) 82 #include <machine/cpufunc.h> 83 #endif 84 85 #include <uvm/uvm_object.h> 86 87 /* 88 * see pte.h for a description of i386 MMU terminology and hardware 89 * interface. 90 * 91 * a pmap describes a processes' 4GB virtual address space. this 92 * virtual address space can be broken up into 1024 4MB regions which 93 * are described by PDEs in the PDP. the PDEs are defined as follows: 94 * 95 * (ranges are inclusive -> exclusive, just like vm_map_entry start/end) 96 * (the following assumes that KERNBASE is 0xc0000000) 97 * 98 * PDE#s VA range usage 99 * 0->766 0x0 -> 0xbfc00000 user address space 100 * 767 0xbfc00000-> recursive mapping of PDP (used for 101 * 0xc0000000 linear mapping of PTPs) 102 * 768->1023 0xc0000000-> kernel address space (constant 103 * 0xffc00000 across all pmap's/processes) 104 * 1023 0xffc00000-> "alternate" recursive PDP mapping 105 * <end> (for other pmaps) 106 * 107 * 108 * note: a recursive PDP mapping provides a way to map all the PTEs for 109 * a 4GB address space into a linear chunk of virtual memory. in other 110 * words, the PTE for page 0 is the first int mapped into the 4MB recursive 111 * area. the PTE for page 1 is the second int. the very last int in the 112 * 4MB range is the PTE that maps VA 0xfffff000 (the last page in a 4GB 113 * address). 114 * 115 * all pmap's PD's must have the same values in slots 768->1023 so that 116 * the kernel is always mapped in every process. these values are loaded 117 * into the PD at pmap creation time. 118 * 119 * at any one time only one pmap can be active on a processor. this is 120 * the pmap whose PDP is pointed to by processor register %cr3. this pmap 121 * will have all its PTEs mapped into memory at the recursive mapping 122 * point (slot #767 as show above). when the pmap code wants to find the 123 * PTE for a virtual address, all it has to do is the following: 124 * 125 * address of PTE = (767 * 4MB) + (VA / PAGE_SIZE) * sizeof(pt_entry_t) 126 * = 0xbfc00000 + (VA / 4096) * 4 127 * 128 * what happens if the pmap layer is asked to perform an operation 129 * on a pmap that is not the one which is currently active? in that 130 * case we take the PA of the PDP of non-active pmap and put it in 131 * slot 1023 of the active pmap. this causes the non-active pmap's 132 * PTEs to get mapped in the final 4MB of the 4GB address space 133 * (e.g. starting at 0xffc00000). 134 * 135 * the following figure shows the effects of the recursive PDP mapping: 136 * 137 * PDP (%cr3) 138 * +----+ 139 * | 0| -> PTP#0 that maps VA 0x0 -> 0x400000 140 * | | 141 * | | 142 * | 767| -> points back to PDP (%cr3) mapping VA 0xbfc00000 -> 0xc0000000 143 * | 768| -> first kernel PTP (maps 0xc0000000 -> 0xc0400000) 144 * | | 145 * |1023| -> points to alternate pmap's PDP (maps 0xffc00000 -> end) 146 * +----+ 147 * 148 * note that the PDE#767 VA (0xbfc00000) is defined as "PTE_BASE" 149 * note that the PDE#1023 VA (0xffc00000) is defined as "APTE_BASE" 150 * 151 * starting at VA 0xbfc00000 the current active PDP (%cr3) acts as a 152 * PTP: 153 * 154 * PTP#767 == PDP(%cr3) => maps VA 0xbfc00000 -> 0xc0000000 155 * +----+ 156 * | 0| -> maps the contents of PTP#0 at VA 0xbfc00000->0xbfc01000 157 * | | 158 * | | 159 * | 767| -> maps contents of PTP#767 (the PDP) at VA 0xbfeff000 160 * | 768| -> maps contents of first kernel PTP 161 * | | 162 * |1023| 163 * +----+ 164 * 165 * note that mapping of the PDP at PTP#767's VA (0xbfeff000) is 166 * defined as "PDP_BASE".... within that mapping there are two 167 * defines: 168 * "PDP_PDE" (0xbfeffbfc) is the VA of the PDE in the PDP 169 * which points back to itself. 170 * "APDP_PDE" (0xbfeffffc) is the VA of the PDE in the PDP which 171 * establishes the recursive mapping of the alternate pmap. 172 * to set the alternate PDP, one just has to put the correct 173 * PA info in *APDP_PDE. 174 * 175 * note that in the APTE_BASE space, the APDP appears at VA 176 * "APDP_BASE" (0xfffff000). 177 */ 178 /* XXX MP should we allocate one APDP_PDE per processor?? */ 179 180 /* 181 * Mask to get rid of the sign-extended part of addresses. 182 */ 183 #define VA_SIGN_MASK 0 184 #define VA_SIGN_NEG(va) ((va) | VA_SIGN_MASK) 185 /* 186 * XXXfvdl this one's not right. 187 */ 188 #define VA_SIGN_POS(va) ((va) & ~VA_SIGN_MASK) 189 190 /* 191 * the following defines identify the slots used as described above. 192 */ 193 194 #define L2_SLOT_PTE (KERNBASE/NBPD_L2-1) /* 767: for recursive PDP map */ 195 #define L2_SLOT_KERN (KERNBASE/NBPD_L2) /* 768: start of kernel space */ 196 #define L2_SLOT_KERNBASE L2_SLOT_KERN 197 #define L2_SLOT_APTE 1023 /* 1023: alternative recursive slot */ 198 199 #define PDIR_SLOT_KERN L2_SLOT_KERN 200 #define PDIR_SLOT_PTE L2_SLOT_PTE 201 #define PDIR_SLOT_APTE L2_SLOT_APTE 202 203 /* 204 * the following defines give the virtual addresses of various MMU 205 * data structures: 206 * PTE_BASE and APTE_BASE: the base VA of the linear PTE mappings 207 * PDP_BASE and APDP_BASE: the base VA of the recursive mapping of the PDP 208 * PDP_PDE and APDP_PDE: the VA of the PDE that points back to the PDP/APDP 209 */ 210 211 #define PTE_BASE ((pt_entry_t *) (L2_SLOT_PTE * NBPD_L2)) 212 #define APTE_BASE ((pt_entry_t *) (VA_SIGN_NEG((L2_SLOT_APTE * NBPD_L2)))) 213 214 #define L1_BASE PTE_BASE 215 #define AL1_BASE APTE_BASE 216 217 #define L2_BASE ((pd_entry_t *)((char *)L1_BASE + L2_SLOT_PTE * NBPD_L1)) 218 219 #define AL2_BASE ((pd_entry_t *)((char *)AL1_BASE + L2_SLOT_PTE * NBPD_L1)) 220 221 #define PDP_PDE (L2_BASE + PDIR_SLOT_PTE) 222 #define APDP_PDE (L2_BASE + PDIR_SLOT_APTE) 223 224 #define PDP_BASE L2_BASE 225 #define APDP_BASE AL2_BASE 226 227 /* largest value (-1 for APTP space) */ 228 #define NKL2_MAX_ENTRIES (NTOPLEVEL_PDES - (KERNBASE/NBPD_L2) - 1) 229 #define NKL1_MAX_ENTRIES (unsigned long)(NKL2_MAX_ENTRIES * NPDPG) 230 231 #define NKL2_KIMG_ENTRIES 0 /* XXX unused */ 232 233 #define NKL2_START_ENTRIES 0 /* XXX computed on runtime */ 234 #define NKL1_START_ENTRIES 0 /* XXX unused */ 235 236 #define NTOPLEVEL_PDES (PAGE_SIZE / (sizeof (pd_entry_t))) 237 238 #define NPDPG (PAGE_SIZE / sizeof (pd_entry_t)) 239 240 #define PTP_MASK_INITIALIZER { L1_FRAME, L2_FRAME } 241 #define PTP_SHIFT_INITIALIZER { L1_SHIFT, L2_SHIFT } 242 #define NKPTP_INITIALIZER { NKL1_START_ENTRIES, NKL2_START_ENTRIES } 243 #define NKPTPMAX_INITIALIZER { NKL1_MAX_ENTRIES, NKL2_MAX_ENTRIES } 244 #define NBPD_INITIALIZER { NBPD_L1, NBPD_L2 } 245 #define PDES_INITIALIZER { L2_BASE } 246 #define APDES_INITIALIZER { AL2_BASE } 247 248 #define PTP_LEVELS 2 249 250 /* 251 * PG_AVAIL usage: we make use of the ignored bits of the PTE 252 */ 253 254 #define PG_W PG_AVAIL1 /* "wired" mapping */ 255 #define PG_PVLIST PG_AVAIL2 /* mapping has entry on pvlist */ 256 #define PG_X PG_AVAIL3 /* executable mapping */ 257 258 /* 259 * Number of PTE's per cache line. 4 byte pte, 32-byte cache line 260 * Used to avoid false sharing of cache lines. 261 */ 262 #define NPTECL 8 263 264 #define pmap_pa2pte(a) (a) 265 #define pmap_pte2pa(a) ((a) & PG_FRAME) 266 #define pmap_pte_set(p, n) do { *(p) = (n); } while (0) 267 #define pmap_pte_testset(p, n) \ 268 atomic_swap_ulong((volatile unsigned long *)p, n) 269 #define pmap_pte_setbits(p, b) \ 270 atomic_or_ulong((volatile unsigned long *)p, b) 271 #define pmap_pte_clearbits(p, b) \ 272 atomic_and_ulong((volatile unsigned long *)p, ~(b)) 273 #define pmap_pte_flush() /* nothing */ 274 275 #include <x86/pmap.h> 276 277 struct trapframe; 278 279 int pmap_exec_fixup(struct vm_map *, struct trapframe *, struct pcb *); 280 void pmap_ldt_cleanup(struct lwp *); 281 282 #endif /* _I386_PMAP_H_ */ 283