1 /* $NetBSD: intr.h,v 1.5 1996/05/13 06:11:28 mycroft Exp $ */ 2 3 /* 4 * Copyright (c) 1996 Charles M. Hannum. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Charles M. Hannum. 17 * 4. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #ifndef _I386_INTR_H_ 33 #define _I386_INTR_H_ 34 35 /* Interrupt priority `levels'; not mutually exclusive. */ 36 #define IPL_BIO 0 /* block I/O */ 37 #define IPL_NET 1 /* network */ 38 #define IPL_TTY 2 /* terminal */ 39 #define IPL_CLOCK 3 /* clock */ 40 #define IPL_IMP 4 /* memory allocation */ 41 #define IPL_NONE 5 /* nothing */ 42 #define IPL_HIGH 6 /* everything */ 43 44 /* Interrupt sharing types. */ 45 #define IST_NONE 0 /* none */ 46 #define IST_PULSE 1 /* pulsed */ 47 #define IST_EDGE 2 /* edge-triggered */ 48 #define IST_LEVEL 3 /* level-triggered */ 49 50 /* Soft interrupt masks. */ 51 #define SIR_CLOCK 31 52 #define SIR_CLOCKMASK ((1 << SIR_CLOCK)) 53 #define SIR_NET 30 54 #define SIR_NETMASK ((1 << SIR_NET) | SIR_CLOCKMASK) 55 #define SIR_TTY 29 56 #define SIR_TTYMASK ((1 << SIR_TTY) | SIR_CLOCKMASK) 57 #define SIR_ALLMASK (SIR_CLOCKMASK | SIR_NETMASK | SIR_TTYMASK) 58 59 #ifndef _LOCORE 60 61 volatile int cpl, ipending, astpending; 62 int imask[7]; 63 64 extern void Xspllower __P((void)); 65 66 static __inline int splraise __P((int)); 67 static __inline int spllower __P((int)); 68 static __inline void splx __P((int)); 69 static __inline void softintr __P((int)); 70 71 /* 72 * Add a mask to cpl, and return the old value of cpl. 73 */ 74 static __inline int 75 splraise(ncpl) 76 register int ncpl; 77 { 78 register int ocpl = cpl; 79 80 cpl = ocpl | ncpl; 81 return (ocpl); 82 } 83 84 /* 85 * Restore a value to cpl (unmasking interrupts). If any unmasked 86 * interrupts are pending, call Xspllower() to process them. 87 */ 88 static __inline void 89 splx(ncpl) 90 register int ncpl; 91 { 92 93 cpl = ncpl; 94 if (ipending & ~ncpl) 95 Xspllower(); 96 } 97 98 /* 99 * Same as splx(), but we return the old value of spl, for the 100 * benefit of some splsoftclock() callers. 101 */ 102 static __inline int 103 spllower(ncpl) 104 register int ncpl; 105 { 106 register int ocpl = cpl; 107 108 cpl = ncpl; 109 if (ipending & ~ncpl) 110 Xspllower(); 111 return (ocpl); 112 } 113 114 /* 115 * Hardware interrupt masks 116 */ 117 #define splbio() splraise(imask[IPL_BIO]) 118 #define splnet() splraise(imask[IPL_NET]) 119 #define spltty() splraise(imask[IPL_TTY]) 120 #define splclock() splraise(imask[IPL_CLOCK]) 121 #define splimp() splraise(imask[IPL_IMP]) 122 #define splstatclock() splclock() 123 124 /* 125 * Software interrupt masks 126 * 127 * NOTE: splsoftclock() is used by hardclock() to lower the priority from 128 * clock to softclock before it calls softclock(). 129 */ 130 #define splsoftclock() spllower(SIR_CLOCKMASK) 131 #define splsoftnet() splraise(SIR_NETMASK) 132 #define splsofttty() splraise(SIR_TTYMASK) 133 134 /* 135 * Miscellaneous 136 */ 137 #define splhigh() splraise(-1) 138 #define spl0() spllower(0) 139 140 /* 141 * Software interrupt registration 142 * 143 * We hand-code this to ensure that it's atomic. 144 */ 145 static __inline void 146 softintr(mask) 147 register int mask; 148 { 149 150 __asm __volatile("orl %0,_ipending" : : "ir" (mask)); 151 } 152 153 #define setsoftast() (astpending = 1) 154 #define setsoftclock() softintr(1 << SIR_CLOCK) 155 #define setsoftnet() softintr(1 << SIR_NET) 156 #define setsofttty() softintr(1 << SIR_TTY) 157 158 #endif /* !_LOCORE */ 159 160 #endif /* !_I386_INTR_H_ */ 161