xref: /netbsd-src/sys/arch/i386/include/intr.h (revision 4472dbe5e3bd91ef2540bada7a7ca7384627ff9b)
1 /*	$NetBSD: intr.h,v 1.13 2000/06/04 21:27:40 mycroft Exp $	*/
2 
3 /*-
4  * Copyright (c) 1998 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Charles M. Hannum.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  * 3. All advertising materials mentioning features or use of this software
19  *    must display the following acknowledgement:
20  *        This product includes software developed by the NetBSD
21  *        Foundation, Inc. and its contributors.
22  * 4. Neither the name of The NetBSD Foundation nor the names of its
23  *    contributors may be used to endorse or promote products derived
24  *    from this software without specific prior written permission.
25  *
26  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36  * POSSIBILITY OF SUCH DAMAGE.
37  */
38 
39 #ifndef _I386_INTR_H_
40 #define _I386_INTR_H_
41 
42 /* Interrupt priority `levels'. */
43 #define	IPL_NONE	9	/* nothing */
44 #define	IPL_SOFTCLOCK	8	/* timeouts */
45 #define	IPL_SOFTNET	7	/* protocol stacks */
46 #define	IPL_BIO		6	/* block I/O */
47 #define	IPL_NET		5	/* network */
48 #define	IPL_SOFTSERIAL	4	/* serial */
49 #define	IPL_TTY		3	/* terminal */
50 #define	IPL_IMP		3	/* memory allocation */
51 #define	IPL_AUDIO	2	/* audio */
52 #define	IPL_CLOCK	1	/* clock */
53 #define	IPL_HIGH	1	/* everything */
54 #define	IPL_SERIAL	0	/* serial */
55 #define	NIPL		10
56 
57 /* Interrupt sharing types. */
58 #define	IST_NONE	0	/* none */
59 #define	IST_PULSE	1	/* pulsed */
60 #define	IST_EDGE	2	/* edge-triggered */
61 #define	IST_LEVEL	3	/* level-triggered */
62 
63 /* Soft interrupt masks. */
64 #define	SIR_CLOCK	31
65 #define	SIR_NET		30
66 #define	SIR_SERIAL	29
67 
68 /* Hack for CLKF_INTR(). */
69 #define	IPL_TAGINTR	28
70 
71 #ifndef _LOCORE
72 
73 volatile int cpl, ipending, astpending;
74 int imask[NIPL];
75 
76 extern void Xspllower __P((void));
77 
78 static __inline int splraise __P((int));
79 static __inline int spllower __P((int));
80 static __inline void splx __P((int));
81 static __inline void softintr __P((int));
82 
83 /*
84  * Add a mask to cpl, and return the old value of cpl.
85  */
86 static __inline int
87 splraise(ncpl)
88 	register int ncpl;
89 {
90 	register int ocpl = cpl;
91 
92 	cpl = ocpl | ncpl;
93 	return (ocpl);
94 }
95 
96 /*
97  * Restore a value to cpl (unmasking interrupts).  If any unmasked
98  * interrupts are pending, call Xspllower() to process them.
99  */
100 static __inline void
101 splx(ncpl)
102 	register int ncpl;
103 {
104 
105 	cpl = ncpl;
106 	if (ipending & ~ncpl)
107 		Xspllower();
108 }
109 
110 /*
111  * Same as splx(), but we return the old value of spl, for the
112  * benefit of some splsoftclock() callers.
113  */
114 static __inline int
115 spllower(ncpl)
116 	register int ncpl;
117 {
118 	register int ocpl = cpl;
119 
120 	cpl = ncpl;
121 	if (ipending & ~ncpl)
122 		Xspllower();
123 	return (ocpl);
124 }
125 
126 /*
127  * Hardware interrupt masks
128  */
129 #define	splbio()	splraise(imask[IPL_BIO])
130 #define	splnet()	splraise(imask[IPL_NET])
131 #define	spltty()	splraise(imask[IPL_TTY])
132 #define	splaudio()	splraise(imask[IPL_AUDIO])
133 #define	splclock()	splraise(imask[IPL_CLOCK])
134 #define	splstatclock()	splclock()
135 #define	splserial()	splraise(imask[IPL_SERIAL])
136 
137 #define spllpt()	spltty()
138 
139 /*
140  * Software interrupt masks
141  *
142  * NOTE: splsoftclock() is used by hardclock() to lower the priority from
143  * clock to softclock before it calls softclock().
144  */
145 #define	spllowersoftclock() spllower(imask[IPL_SOFTCLOCK])
146 #define	splsoftclock()	splraise(imask[IPL_SOFTCLOCK])
147 #define	splsoftnet()	splraise(imask[IPL_SOFTNET])
148 #define	splsoftserial()	splraise(imask[IPL_SOFTSERIAL])
149 
150 /*
151  * Miscellaneous
152  */
153 #define	splimp()	splraise(imask[IPL_IMP])
154 #define	splhigh()	splraise(imask[IPL_HIGH])
155 #define	spl0()		spllower(0)
156 
157 /*
158  * Software interrupt registration
159  *
160  * We hand-code this to ensure that it's atomic.
161  */
162 static __inline void
163 softintr(mask)
164 	register int mask;
165 {
166 	__asm __volatile("orl %1, %0" : "=m"(ipending) : "ir" (1 << mask));
167 }
168 
169 #define	setsoftast()	(astpending = 1)
170 #define	setsoftclock()	softintr(SIR_CLOCK)
171 #define	setsoftnet()	softintr(SIR_NET)
172 #define	setsoftserial()	softintr(SIR_SERIAL)
173 
174 #endif /* !_LOCORE */
175 
176 #endif /* !_I386_INTR_H_ */
177