1 /* $NetBSD: cpu.h,v 1.121 2005/12/31 17:55:55 xtraeme Exp $ */ 2 3 /*- 4 * Copyright (c) 1990 The Regents of the University of California. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to Berkeley by 8 * William Jolitz. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. Neither the name of the University nor the names of its contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 * 34 * @(#)cpu.h 5.4 (Berkeley) 5/9/91 35 */ 36 37 #ifndef _I386_CPU_H_ 38 #define _I386_CPU_H_ 39 40 #ifdef _KERNEL 41 #if defined(_KERNEL_OPT) 42 #include "opt_multiprocessor.h" 43 #include "opt_math_emulate.h" 44 #include "opt_user_ldt.h" 45 #include "opt_vm86.h" 46 #endif 47 48 /* 49 * Definitions unique to i386 cpu support. 50 */ 51 #include <machine/frame.h> 52 #include <machine/segments.h> 53 #include <machine/tss.h> 54 #include <machine/intrdefs.h> 55 #include <x86/cacheinfo.h> 56 57 #include <sys/device.h> 58 #include <sys/lock.h> /* will also get LOCKDEBUG */ 59 #include <sys/cpu_data.h> 60 #include <sys/cc_microtime.h> 61 62 #include <lib/libkern/libkern.h> /* offsetof */ 63 64 struct intrsource; 65 struct pmap; 66 67 /* 68 * a bunch of this belongs in cpuvar.h; move it later.. 69 */ 70 71 struct cpu_info { 72 struct device *ci_dev; /* pointer to our device */ 73 struct cpu_info *ci_self; /* self-pointer */ 74 void *ci_tlog_base; /* Trap log base */ 75 int32_t ci_tlog_offset; /* Trap log current offset */ 76 struct cpu_info *ci_next; /* next cpu */ 77 78 /* 79 * Public members. 80 */ 81 struct lwp *ci_curlwp; /* current owner of the processor */ 82 struct simplelock ci_slock; /* lock on this data structure */ 83 cpuid_t ci_cpuid; /* our CPU ID */ 84 u_int ci_apicid; /* our APIC ID */ 85 struct cpu_data ci_data; /* MI per-cpu data */ 86 struct cc_microtime_state ci_cc;/* cc_microtime state */ 87 88 /* 89 * Private members. 90 */ 91 struct lwp *ci_fpcurlwp; /* current owner of the FPU */ 92 int ci_fpsaving; /* save in progress */ 93 94 volatile uint32_t ci_tlb_ipi_mask; 95 96 struct pmap *ci_pmap; /* current pmap */ 97 int ci_want_pmapload; /* pmap_load() is needed */ 98 int ci_tlbstate; /* one of TLBSTATE_ states. see below */ 99 #define TLBSTATE_VALID 0 /* all user tlbs are valid */ 100 #define TLBSTATE_LAZY 1 /* tlbs are valid but won't be kept uptodate */ 101 #define TLBSTATE_STALE 2 /* we might have stale user tlbs */ 102 103 struct pcb *ci_curpcb; /* VA of current HW PCB */ 104 struct pcb *ci_idle_pcb; /* VA of current PCB */ 105 int ci_idle_tss_sel; /* TSS selector of idle PCB */ 106 107 struct intrsource *ci_isources[MAX_INTR_SOURCES]; 108 uint32_t ci_ipending; 109 int ci_ilevel; 110 int ci_idepth; 111 uint32_t ci_imask[NIPL]; 112 uint32_t ci_iunmask[NIPL]; 113 114 paddr_t ci_idle_pcb_paddr; /* PA of idle PCB */ 115 uint32_t ci_flags; /* flags; see below */ 116 uint32_t ci_ipis; /* interprocessor interrupts pending */ 117 int sc_apic_version; /* local APIC version */ 118 119 int32_t ci_cpuid_level; 120 uint32_t ci_signature; /* X86 cpuid type */ 121 uint32_t ci_feature_flags;/* X86 %edx CPUID feature bits */ 122 uint32_t ci_feature2_flags;/* X86 %ecx CPUID feature bits */ 123 uint32_t ci_feature3_flags;/* X86 extended feature bits */ 124 uint32_t ci_cpu_class; /* CPU class */ 125 uint32_t ci_brand_id; /* Intel brand id */ 126 uint32_t ci_vendor[4]; /* vendor string */ 127 uint32_t ci_cpu_serial[3]; /* PIII serial number */ 128 uint64_t ci_tsc_freq; /* cpu cycles/second */ 129 130 struct cpu_functions *ci_func; /* start/stop functions */ 131 void (*cpu_setup)(struct cpu_info *); 132 /* proc-dependant init */ 133 void (*ci_info)(struct cpu_info *); 134 135 int ci_want_resched; 136 int ci_astpending; 137 struct trapframe *ci_ddb_regs; 138 139 u_int ci_cflush_lsize; /* CFLUSH insn line size */ 140 struct x86_cache_info ci_cinfo[CAI_COUNT]; 141 142 union descriptor *ci_gdt; 143 144 struct i386tss ci_doubleflt_tss; 145 struct i386tss ci_ddbipi_tss; 146 147 char *ci_doubleflt_stack; 148 char *ci_ddbipi_stack; 149 150 struct evcnt ci_ipi_events[X86_NIPI]; 151 }; 152 153 /* 154 * Processor flag notes: The "primary" CPU has certain MI-defined 155 * roles (mostly relating to hardclock handling); we distinguish 156 * betwen the processor which booted us, and the processor currently 157 * holding the "primary" role just to give us the flexibility later to 158 * change primaries should we be sufficiently twisted. 159 */ 160 161 #define CPUF_BSP 0x0001 /* CPU is the original BSP */ 162 #define CPUF_AP 0x0002 /* CPU is an AP */ 163 #define CPUF_SP 0x0004 /* CPU is only processor */ 164 #define CPUF_PRIMARY 0x0008 /* CPU is active primary processor */ 165 166 #define CPUF_APIC_CD 0x0010 /* CPU has apic configured */ 167 168 #define CPUF_PRESENT 0x1000 /* CPU is present */ 169 #define CPUF_RUNNING 0x2000 /* CPU is running */ 170 #define CPUF_PAUSE 0x4000 /* CPU is paused in DDB */ 171 #define CPUF_GO 0x8000 /* CPU should start running */ 172 173 /* 174 * We statically allocate the CPU info for the primary CPU (or, 175 * the only CPU on uniprocessors), and the primary CPU is the 176 * first CPU on the CPU info list. 177 */ 178 extern struct cpu_info cpu_info_primary; 179 extern struct cpu_info *cpu_info_list; 180 181 #define CPU_INFO_ITERATOR int 182 #define CPU_INFO_FOREACH(cii, ci) cii = 0, ci = cpu_info_list; \ 183 ci != NULL; ci = ci->ci_next 184 185 #if defined(MULTIPROCESSOR) 186 187 #define X86_MAXPROCS 32 /* because we use a bitmask */ 188 189 #define CPU_STARTUP(_ci) ((_ci)->ci_func->start(_ci)) 190 #define CPU_STOP(_ci) ((_ci)->ci_func->stop(_ci)) 191 #define CPU_START_CLEANUP(_ci) ((_ci)->ci_func->cleanup(_ci)) 192 193 static struct cpu_info *curcpu(void); 194 195 inline static struct cpu_info * __attribute__((__unused__)) 196 curcpu() 197 { 198 struct cpu_info *ci; 199 200 __asm volatile("movl %%fs:%1, %0" : 201 "=r" (ci) : 202 "m" 203 (*(struct cpu_info * const *)offsetof(struct cpu_info, ci_self))); 204 return ci; 205 } 206 207 #define cpu_number() (curcpu()->ci_cpuid) 208 209 #define CPU_IS_PRIMARY(ci) ((ci)->ci_flags & CPUF_PRIMARY) 210 211 #define aston(p) ((p)->p_md.md_astpending = 1) 212 213 extern struct cpu_info *cpu_info[X86_MAXPROCS]; 214 215 void cpu_boot_secondary_processors(void); 216 void cpu_init_idle_pcbs(void); 217 218 /* 219 * Preempt the current process if in interrupt from user mode, 220 * or after the current trap/syscall if in system mode. 221 */ 222 extern void need_resched(struct cpu_info *); 223 224 #else /* !MULTIPROCESSOR */ 225 226 #define X86_MAXPROCS 1 227 #define curcpu() (&cpu_info_primary) 228 229 /* 230 * definitions of cpu-dependent requirements 231 * referenced in generic code 232 */ 233 #define cpu_number() 0 234 #define CPU_IS_PRIMARY(ci) 1 235 236 /* 237 * Preempt the current process if in interrupt from user mode, 238 * or after the current trap/syscall if in system mode. 239 */ 240 #define need_resched(ci) \ 241 do { \ 242 struct cpu_info *__ci = (ci); \ 243 __ci->ci_want_resched = 1; \ 244 if (__ci->ci_curlwp != NULL) \ 245 aston(__ci->ci_curlwp->l_proc); \ 246 } while (/*CONSTCOND*/0) 247 248 #define aston(p) ((p)->p_md.md_astpending = 1) 249 250 #endif /* MULTIPROCESSOR */ 251 252 extern uint32_t cpus_attached; 253 254 #define curpcb curcpu()->ci_curpcb 255 #define curlwp curcpu()->ci_curlwp 256 257 /* 258 * Arguments to hardclock, softclock and statclock 259 * encapsulate the previous machine state in an opaque 260 * clockframe; for now, use generic intrframe. 261 * 262 * Note: Since spllowersoftclock() does not actually unmask the currently 263 * running (hardclock) interrupt, CLKF_BASEPRI() *must* always be 0; otherwise 264 * we could stall hardclock ticks if another interrupt takes too long. 265 */ 266 struct clockframe { 267 struct intrframe cf_if; 268 }; 269 270 #define CLKF_USERMODE(frame) USERMODE((frame)->cf_if.if_cs, (frame)->cf_if.if_eflags) 271 #define CLKF_BASEPRI(frame) (0) 272 #define CLKF_PC(frame) ((frame)->cf_if.if_eip) 273 #define CLKF_INTR(frame) (curcpu()->ci_idepth > 1) 274 275 /* 276 * This is used during profiling to integrate system time. It can safely 277 * assume that the process is resident. 278 */ 279 #define LWP_PC(l) ((l)->l_md.md_regs->tf_eip) 280 281 /* 282 * Give a profiling tick to the current process when the user profiling 283 * buffer pages are invalid. On the i386, request an ast to send us 284 * through trap(), marking the proc as needing a profiling tick. 285 */ 286 #define need_proftick(p) ((p)->p_flag |= P_OWEUPC, aston(p)) 287 288 /* 289 * Notify the current process (p) that it has a signal pending, 290 * process as soon as possible. 291 */ 292 #define signotify(p) aston(p) 293 294 /* 295 * We need a machine-independent name for this. 296 */ 297 extern void (*delay_func)(int); 298 struct timeval; 299 extern void (*microtime_func)(struct timeval *); 300 301 #define DELAY(x) (*delay_func)(x) 302 #define delay(x) (*delay_func)(x) 303 #define microtime(tv) (*microtime_func)(tv) 304 305 /* 306 * pull in #defines for kinds of processors 307 */ 308 #include <machine/cputypes.h> 309 310 struct cpu_nocpuid_nameclass { 311 int cpu_vendor; 312 const char *cpu_vendorname; 313 const char *cpu_name; 314 int cpu_class; 315 void (*cpu_setup)(struct cpu_info *); 316 void (*cpu_cacheinfo)(struct cpu_info *); 317 void (*cpu_info)(struct cpu_info *); 318 }; 319 320 321 struct cpu_cpuid_nameclass { 322 const char *cpu_id; 323 int cpu_vendor; 324 const char *cpu_vendorname; 325 struct cpu_cpuid_family { 326 int cpu_class; 327 const char *cpu_models[CPU_MAXMODEL+2]; 328 void (*cpu_setup)(struct cpu_info *); 329 void (*cpu_probe)(struct cpu_info *); 330 void (*cpu_info)(struct cpu_info *); 331 } cpu_family[CPU_MAXFAMILY - CPU_MINFAMILY + 1]; 332 }; 333 334 extern int biosbasemem; 335 extern int biosextmem; 336 extern unsigned int cpu_feature; 337 extern unsigned int cpu_feature2; 338 extern int cpu; 339 extern int cpu_class; 340 extern char cpu_brand_string[]; 341 extern const struct cpu_nocpuid_nameclass i386_nocpuid_cpus[]; 342 extern const struct cpu_cpuid_nameclass i386_cpuid_cpus[]; 343 344 extern int i386_use_fxsave; 345 extern int i386_has_sse; 346 extern int i386_has_sse2; 347 348 /* machdep.c */ 349 void dumpconf(void); 350 int cpu_maxproc(void); 351 void cpu_reset(void); 352 void i386_init_pcb_tss_ldt(struct cpu_info *); 353 void i386_proc0_tss_ldt_init(void); 354 355 /* identcpu.c */ 356 extern int tmx86_has_longrun; 357 extern u_int crusoe_longrun; 358 extern u_int crusoe_frequency; 359 extern u_int crusoe_voltage; 360 extern u_int crusoe_percentage; 361 extern u_int tmx86_set_longrun_mode(u_int); 362 void tmx86_get_longrun_status_all(void); 363 u_int tmx86_get_longrun_mode(void); 364 void identifycpu(struct cpu_info *); 365 366 /* vm_machdep.c */ 367 void cpu_proc_fork(struct proc *, struct proc *); 368 369 /* locore.s */ 370 struct region_descriptor; 371 void lgdt(struct region_descriptor *); 372 void fillw(short, void *, size_t); 373 374 struct pcb; 375 void savectx(struct pcb *); 376 void proc_trampoline(void); 377 378 /* clock.c */ 379 void initrtclock(void); 380 void startrtclock(void); 381 void i8254_delay(int); 382 void i8254_microtime(struct timeval *); 383 void i8254_initclocks(void); 384 385 /* cpu.c */ 386 387 void cpu_probe_features(struct cpu_info *); 388 389 /* npx.c */ 390 void npxsave_lwp(struct lwp *, int); 391 void npxsave_cpu(struct cpu_info *, int); 392 393 /* vm_machdep.c */ 394 int kvtop(caddr_t); 395 396 #ifdef MATH_EMULATE 397 /* math_emulate.c */ 398 int math_emulate(struct trapframe *, ksiginfo_t *); 399 #endif 400 401 #ifdef USER_LDT 402 /* sys_machdep.h */ 403 int i386_get_ldt(struct lwp *, void *, register_t *); 404 int i386_set_ldt(struct lwp *, void *, register_t *); 405 #endif 406 407 /* isa_machdep.c */ 408 void isa_defaultirq(void); 409 int isa_nmi(void); 410 411 #ifdef VM86 412 /* vm86.c */ 413 void vm86_gpfault(struct lwp *, int); 414 #endif /* VM86 */ 415 416 /* consinit.c */ 417 void kgdb_port_init(void); 418 419 /* bus_machdep.c */ 420 void x86_bus_space_init(void); 421 void x86_bus_space_mallocok(void); 422 423 #include <machine/psl.h> /* Must be after struct cpu_info declaration */ 424 425 /* est.c */ 426 void est_init(struct cpu_info *); 427 428 /* pnow_k7.c */ 429 void pnowk7_init(struct cpu_info *); 430 431 #endif /* _KERNEL */ 432 433 /* 434 * CTL_MACHDEP definitions. 435 */ 436 #define CPU_CONSDEV 1 /* dev_t: console terminal device */ 437 #define CPU_BIOSBASEMEM 2 /* int: bios-reported base mem (K) */ 438 #define CPU_BIOSEXTMEM 3 /* int: bios-reported ext. mem (K) */ 439 #define CPU_NKPDE 4 /* int: number of kernel PDEs */ 440 #define CPU_BOOTED_KERNEL 5 /* string: booted kernel name */ 441 #define CPU_DISKINFO 6 /* struct disklist *: 442 * disk geometry information */ 443 #define CPU_FPU_PRESENT 7 /* int: FPU is present */ 444 #define CPU_OSFXSR 8 /* int: OS uses FXSAVE/FXRSTOR */ 445 #define CPU_SSE 9 /* int: OS/CPU supports SSE */ 446 #define CPU_SSE2 10 /* int: OS/CPU supports SSE2 */ 447 #define CPU_TMLR_MODE 11 /* int: longrun mode 448 * 0: minimum frequency 449 * 1: economy 450 * 2: performance 451 * 3: maximum frequency 452 */ 453 #define CPU_TMLR_FREQUENCY 12 /* int: current frequency */ 454 #define CPU_TMLR_VOLTAGE 13 /* int: curret voltage */ 455 #define CPU_TMLR_PERCENTAGE 14 /* int: current clock percentage */ 456 #define CPU_MAXID 15 /* number of valid machdep ids */ 457 458 #define CTL_MACHDEP_NAMES { \ 459 { 0, 0 }, \ 460 { "console_device", CTLTYPE_STRUCT }, \ 461 { "biosbasemem", CTLTYPE_INT }, \ 462 { "biosextmem", CTLTYPE_INT }, \ 463 { "nkpde", CTLTYPE_INT }, \ 464 { "booted_kernel", CTLTYPE_STRING }, \ 465 { "diskinfo", CTLTYPE_STRUCT }, \ 466 { "fpu_present", CTLTYPE_INT }, \ 467 { "osfxsr", CTLTYPE_INT }, \ 468 { "sse", CTLTYPE_INT }, \ 469 { "sse2", CTLTYPE_INT }, \ 470 { "tm_longrun_mode", CTLTYPE_INT }, \ 471 { "tm_longrun_frequency", CTLTYPE_INT }, \ 472 { "tm_longrun_voltage", CTLTYPE_INT }, \ 473 { "tm_longrun_percentage", CTLTYPE_INT }, \ 474 } 475 476 /* 477 * Structure for CPU_DISKINFO sysctl call. 478 * XXX this should be somewhere else. 479 */ 480 #define MAX_BIOSDISKS 16 481 482 struct disklist { 483 int dl_nbiosdisks; /* number of bios disks */ 484 struct biosdisk_info { 485 int bi_dev; /* BIOS device # (0x80 ..) */ 486 int bi_cyl; /* cylinders on disk */ 487 int bi_head; /* heads per track */ 488 int bi_sec; /* sectors per track */ 489 uint64_t bi_lbasecs; /* total sec. (iff ext13) */ 490 #define BIFLAG_INVALID 0x01 491 #define BIFLAG_EXTINT13 0x02 492 int bi_flags; 493 } dl_biosdisks[MAX_BIOSDISKS]; 494 495 int dl_nnativedisks; /* number of native disks */ 496 struct nativedisk_info { 497 char ni_devname[16]; /* native device name */ 498 int ni_nmatches; /* # of matches w/ BIOS */ 499 int ni_biosmatches[MAX_BIOSDISKS]; /* indices in dl_biosdisks */ 500 } dl_nativedisks[1]; /* actually longer */ 501 }; 502 #endif /* !_I386_CPU_H_ */ 503