xref: /netbsd-src/sys/arch/hppa/spmath/float.h (revision d710132b4b8ce7f7cccaaf660cb16aa16b4077a0)
1 /*	$NetBSD: float.h,v 1.1 2002/06/05 01:04:25 fredette Exp $	*/
2 
3 /*	$OpenBSD: float.h,v 1.4 2001/03/29 03:58:18 mickey Exp $	*/
4 
5 /*
6  * Copyright 1996 1995 by Open Software Foundation, Inc.
7  *              All Rights Reserved
8  *
9  * Permission to use, copy, modify, and distribute this software and
10  * its documentation for any purpose and without fee is hereby granted,
11  * provided that the above copyright notice appears in all copies and
12  * that both the copyright notice and this permission notice appear in
13  * supporting documentation.
14  *
15  * OSF DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE
16  * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
17  * FOR A PARTICULAR PURPOSE.
18  *
19  * IN NO EVENT SHALL OSF BE LIABLE FOR ANY SPECIAL, INDIRECT, OR
20  * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
21  * LOSS OF USE, DATA OR PROFITS, WHETHER IN ACTION OF CONTRACT,
22  * NEGLIGENCE, OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION
23  * WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
24  */
25 /*
26  * pmk1.1
27  */
28 /*
29  * (c) Copyright 1986 HEWLETT-PACKARD COMPANY
30  *
31  * To anyone who acknowledges that this file is provided "AS IS"
32  * without any express or implied warranty:
33  *     permission to use, copy, modify, and distribute this file
34  * for any purpose is hereby granted without fee, provided that
35  * the above copyright notice and this notice appears in all
36  * copies, and that the name of Hewlett-Packard Company not be
37  * used in advertising or publicity pertaining to distribution
38  * of the software without specific, written prior permission.
39  * Hewlett-Packard Company makes no representations about the
40  * suitability of this software for any purpose.
41  */
42 
43 #include <machine/float.h>
44 
45 #include "../spmath/fpbits.h"
46 #include "../spmath/hppa.h"
47 
48 /*
49  * Declare the basic structures for the 3 different
50  * floating-point precisions.
51  *
52  * Single number
53  * +-------+-------+-------+-------+-------+-------+-------+-------+
54  * |s|       exp     |               mantissa                      |
55  * +-------+-------+-------+-------+-------+-------+-------+-------+
56  */
57 #define	Sall(object) (object)
58 #define	Ssign(object) Bitfield_extract( 0,  1,object)
59 #define	Ssignedsign(object) Bitfield_signed_extract( 0,  1,object)
60 #define	Sexponent(object) Bitfield_extract( 1,  8,object)
61 #define	Smantissa(object) Bitfield_mask( 9, 23,object)
62 #define	Ssignaling(object) Bitfield_extract( 9,  1,object)
63 #define	Ssignalingnan(object) Bitfield_extract( 1,  9,object)
64 #define	Shigh2mantissa(object) Bitfield_extract( 9,  2,object)
65 #define	Sexponentmantissa(object) Bitfield_mask( 1, 31,object)
66 #define	Ssignexponent(object) Bitfield_extract( 0,  9,object)
67 #define	Shidden(object) Bitfield_extract( 8,  1,object)
68 #define	Shiddenoverflow(object) Bitfield_extract( 7,  1,object)
69 #define	Shiddenhigh7mantissa(object) Bitfield_extract( 8,  8,object)
70 #define	Shiddenhigh3mantissa(object) Bitfield_extract( 8,  4,object)
71 #define	Slow(object) Bitfield_mask( 31,  1,object)
72 #define	Slow4(object) Bitfield_mask( 28,  4,object)
73 #define	Slow31(object) Bitfield_mask( 1, 31,object)
74 #define	Shigh31(object) Bitfield_extract( 0, 31,object)
75 #define	Ssignedhigh31(object) Bitfield_signed_extract( 0, 31,object)
76 #define	Shigh4(object) Bitfield_extract( 0,  4,object)
77 #define	Sbit24(object) Bitfield_extract( 24,  1,object)
78 #define	Sbit28(object) Bitfield_extract( 28,  1,object)
79 #define	Sbit29(object) Bitfield_extract( 29,  1,object)
80 #define	Sbit30(object) Bitfield_extract( 30,  1,object)
81 #define	Sbit31(object) Bitfield_mask( 31,  1,object)
82 
83 #define Deposit_ssign(object,value) Bitfield_deposit(value,0,1,object)
84 #define Deposit_sexponent(object,value) Bitfield_deposit(value,1,8,object)
85 #define Deposit_smantissa(object,value) Bitfield_deposit(value,9,23,object)
86 #define Deposit_shigh2mantissa(object,value) Bitfield_deposit(value,9,2,object)
87 #define Deposit_sexponentmantissa(object,value) \
88     Bitfield_deposit(value,1,31,object)
89 #define Deposit_ssignexponent(object,value) Bitfield_deposit(value,0,9,object)
90 #define Deposit_slow(object,value) Bitfield_deposit(value,31,1,object)
91 #define Deposit_shigh4(object,value) Bitfield_deposit(value,0,4,object)
92 
93 #define	Is_ssign(object) Bitfield_mask( 0,  1,object)
94 #define	Is_ssignaling(object) Bitfield_mask( 9,  1,object)
95 #define	Is_shidden(object) Bitfield_mask( 8,  1,object)
96 #define	Is_shiddenoverflow(object) Bitfield_mask( 7,  1,object)
97 #define	Is_slow(object) Bitfield_mask( 31,  1,object)
98 #define	Is_sbit24(object) Bitfield_mask( 24,  1,object)
99 #define	Is_sbit28(object) Bitfield_mask( 28,  1,object)
100 #define	Is_sbit29(object) Bitfield_mask( 29,  1,object)
101 #define	Is_sbit30(object) Bitfield_mask( 30,  1,object)
102 #define	Is_sbit31(object) Bitfield_mask( 31,  1,object)
103 
104 /*
105  * Double number.
106  * +-------+-------+-------+-------+-------+-------+-------+-------+
107  * |s|       exponent      |          mantissa part 1              |
108  * +-------+-------+-------+-------+-------+-------+-------+-------+
109  *
110  * +-------+-------+-------+-------+-------+-------+-------+-------+
111  * |                    mantissa part 2                            |
112  * +-------+-------+-------+-------+-------+-------+-------+-------+
113  */
114 #define Dallp1(object) (object)
115 #define Dsign(object) Bitfield_extract( 0,  1,object)
116 #define Dsignedsign(object) Bitfield_signed_extract( 0,  1,object)
117 #define Dexponent(object) Bitfield_extract( 1,  11,object)
118 #define Dmantissap1(object) Bitfield_mask( 12, 20,object)
119 #define Dsignaling(object) Bitfield_extract( 12,  1,object)
120 #define Dsignalingnan(object) Bitfield_extract( 1,  12,object)
121 #define Dhigh2mantissa(object) Bitfield_extract( 12,  2,object)
122 #define Dexponentmantissap1(object) Bitfield_mask( 1, 31,object)
123 #define Dsignexponent(object) Bitfield_extract( 0, 12,object)
124 #define Dhidden(object) Bitfield_extract( 11,  1,object)
125 #define Dhiddenoverflow(object) Bitfield_extract( 10,  1,object)
126 #define Dhiddenhigh7mantissa(object) Bitfield_extract( 11,  8,object)
127 #define Dhiddenhigh3mantissa(object) Bitfield_extract( 11,  4,object)
128 #define Dlowp1(object) Bitfield_mask( 31,  1,object)
129 #define Dlow31p1(object) Bitfield_mask( 1, 31,object)
130 #define Dhighp1(object) Bitfield_extract( 0,  1,object)
131 #define Dhigh4p1(object) Bitfield_extract( 0,  4,object)
132 #define Dhigh31p1(object) Bitfield_extract( 0, 31,object)
133 #define Dsignedhigh31p1(object) Bitfield_signed_extract( 0, 31,object)
134 #define Dbit3p1(object) Bitfield_extract( 3,  1,object)
135 
136 #define Deposit_dsign(object,value) Bitfield_deposit(value,0,1,object)
137 #define Deposit_dexponent(object,value) Bitfield_deposit(value,1,11,object)
138 #define Deposit_dmantissap1(object,value) Bitfield_deposit(value,12,20,object)
139 #define Deposit_dhigh2mantissa(object,value) Bitfield_deposit(value,12,2,object)
140 #define Deposit_dexponentmantissap1(object,value) \
141     Bitfield_deposit(value,1,31,object)
142 #define Deposit_dsignexponent(object,value) Bitfield_deposit(value,0,12,object)
143 #define Deposit_dlowp1(object,value) Bitfield_deposit(value,31,1,object)
144 #define Deposit_dhigh4p1(object,value) Bitfield_deposit(value,0,4,object)
145 
146 #define Is_dsign(object) Bitfield_mask( 0,  1,object)
147 #define Is_dsignaling(object) Bitfield_mask( 12,  1,object)
148 #define Is_dhidden(object) Bitfield_mask( 11,  1,object)
149 #define Is_dhiddenoverflow(object) Bitfield_mask( 10,  1,object)
150 #define Is_dlowp1(object) Bitfield_mask( 31,  1,object)
151 #define Is_dhighp1(object) Bitfield_mask( 0,  1,object)
152 #define Is_dbit3p1(object) Bitfield_mask( 3,  1,object)
153 
154 #define Dallp2(object) (object)
155 #define Dmantissap2(object) (object)
156 #define Dlowp2(object) Bitfield_mask( 31,  1,object)
157 #define Dlow4p2(object) Bitfield_mask( 28,  4,object)
158 #define Dlow31p2(object) Bitfield_mask( 1, 31,object)
159 #define Dhighp2(object) Bitfield_extract( 0,  1,object)
160 #define Dhigh31p2(object) Bitfield_extract( 0, 31,object)
161 #define Dbit2p2(object) Bitfield_extract( 2,  1,object)
162 #define Dbit3p2(object) Bitfield_extract( 3,  1,object)
163 #define Dbit21p2(object) Bitfield_extract( 21,  1,object)
164 #define Dbit28p2(object) Bitfield_extract( 28,  1,object)
165 #define Dbit29p2(object) Bitfield_extract( 29,  1,object)
166 #define Dbit30p2(object) Bitfield_extract( 30,  1,object)
167 #define Dbit31p2(object) Bitfield_mask( 31,  1,object)
168 
169 #define Deposit_dlowp2(object,value) Bitfield_deposit(value,31,1,object)
170 
171 #define Is_dlowp2(object) Bitfield_mask( 31,  1,object)
172 #define Is_dhighp2(object) Bitfield_mask( 0,  1,object)
173 #define Is_dbit2p2(object) Bitfield_mask( 2,  1,object)
174 #define Is_dbit3p2(object) Bitfield_mask( 3,  1,object)
175 #define Is_dbit21p2(object) Bitfield_mask( 21,  1,object)
176 #define Is_dbit28p2(object) Bitfield_mask( 28,  1,object)
177 #define Is_dbit29p2(object) Bitfield_mask( 29,  1,object)
178 #define Is_dbit30p2(object) Bitfield_mask( 30,  1,object)
179 #define Is_dbit31p2(object) Bitfield_mask( 31,  1,object)
180 
181 /*
182  * Quad number.
183  * +-------+-------+-------+-------+-------+-------+-------+-------+
184  * |s|          exponent           |      mantissa part 1          |
185  * +-------+-------+-------+-------+-------+-------+-------+-------+
186  *
187  * +-------+-------+-------+-------+-------+-------+-------+-------+
188  * |                    mantissa part 2                            |
189  * +-------+-------+-------+-------+-------+-------+-------+-------+
190  *
191  * +-------+-------+-------+-------+-------+-------+-------+-------+
192  * |                    mantissa part 3                            |
193  * +-------+-------+-------+-------+-------+-------+-------+-------+
194  *
195  * +-------+-------+-------+-------+-------+-------+-------+-------+
196  * |                    mantissa part 4                            |
197  * +-------+-------+-------+-------+-------+-------+-------+-------+
198  */
199 typedef struct
200     {
201     union
202 	{
203 	struct { unsigned qallp1; } u_qallp1;
204 /* Not needed for now...
205 	Bitfield_extract( 0,  1,u_qsign,qsign)
206 	Bitfield_signed_extract( 0,  1,u_qsignedsign,qsignedsign)
207 	Bitfield_extract( 1, 15,u_qexponent,qexponent)
208 	Bitfield_extract(16, 16,u_qmantissap1,qmantissap1)
209 	Bitfield_extract(16,  1,u_qsignaling,qsignaling)
210 	Bitfield_extract(1,  16,u_qsignalingnan,qsignalingnan)
211 	Bitfield_extract(16,  2,u_qhigh2mantissa,qhigh2mantissa)
212 	Bitfield_extract( 1, 31,u_qexponentmantissap1,qexponentmantissap1)
213 	Bitfield_extract( 0, 16,u_qsignexponent,qsignexponent)
214 	Bitfield_extract(15,  1,u_qhidden,qhidden)
215 	Bitfield_extract(14,  1,u_qhiddenoverflow,qhiddenoverflow)
216 	Bitfield_extract(15,  8,u_qhiddenhigh7mantissa,qhiddenhigh7mantissa)
217 	Bitfield_extract(15,  4,u_qhiddenhigh3mantissa,qhiddenhigh3mantissa)
218 	Bitfield_extract(31,  1,u_qlowp1,qlowp1)
219 	Bitfield_extract( 1, 31,u_qlow31p1,qlow31p1)
220 	Bitfield_extract( 0,  1,u_qhighp1,qhighp1)
221 	Bitfield_extract( 0,  4,u_qhigh4p1,qhigh4p1)
222 	Bitfield_extract( 0, 31,u_qhigh31p1,qhigh31p1)
223   */
224 	} quad_u1;
225     union
226 	{
227 	struct { unsigned qallp2; } u_qallp2;
228   /* Not needed for now...
229 	Bitfield_extract(31,  1,u_qlowp2,qlowp2)
230 	Bitfield_extract( 1, 31,u_qlow31p2,qlow31p2)
231 	Bitfield_extract( 0,  1,u_qhighp2,qhighp2)
232 	Bitfield_extract( 0, 31,u_qhigh31p2,qhigh31p2)
233    */
234 	} quad_u2;
235     union
236 	{
237 	struct { unsigned qallp3; } u_qallp3;
238   /* Not needed for now...
239 	Bitfield_extract(31,  1,u_qlowp3,qlowp3)
240 	Bitfield_extract( 1, 31,u_qlow31p3,qlow31p3)
241 	Bitfield_extract( 0,  1,u_qhighp3,qhighp3)
242 	Bitfield_extract( 0, 31,u_qhigh31p3,qhigh31p3)
243    */
244 	} quad_u3;
245     union
246 	{
247 	struct { unsigned qallp4; } u_qallp4;
248     /* Not need for now...
249 	Bitfield_extract(31,  1,u_qlowp4,qlowp4)
250 	Bitfield_extract( 1, 31,u_qlow31p4,qlow31p4)
251 	Bitfield_extract( 0,  1,u_qhighp4,qhighp4)
252 	Bitfield_extract( 0, 31,u_qhigh31p4,qhigh31p4)
253      */
254 	} quad_u4;
255     } quad_floating_point;
256 
257 /* Extension - An additional structure to hold the guard, round and
258  *             sticky bits during computations.
259  */
260 #define Extall(object) (object)
261 #define Extsign(object) Bitfield_extract( 0,  1,object)
262 #define Exthigh31(object) Bitfield_extract( 0, 31,object)
263 #define Extlow31(object) Bitfield_extract( 1, 31,object)
264 #define Extlow(object) Bitfield_extract( 31,  1,object)
265 
266 /*
267  * Declare the basic structures for the 3 different
268  * fixed-point precisions.
269  *
270  * Single number
271  * +-------+-------+-------+-------+-------+-------+-------+-------+
272  * |s|                    integer                                  |
273  * +-------+-------+-------+-------+-------+-------+-------+-------+
274  */
275 typedef int sgl_integer;
276 
277 /*
278  * Double number.
279  * +-------+-------+-------+-------+-------+-------+-------+-------+
280  * |s|                     high integer                            |
281  * +-------+-------+-------+-------+-------+-------+-------+-------+
282  *
283  * +-------+-------+-------+-------+-------+-------+-------+-------+
284  * |                       low integer                             |
285  * +-------+-------+-------+-------+-------+-------+-------+-------+
286  */
287 struct dint {
288 	int  wd0;
289 	unsigned int wd1;
290 };
291 
292 struct dblwd {
293 	unsigned int wd0;
294 	unsigned int wd1;
295 };
296 
297 /*
298  * Quad number.
299  * +-------+-------+-------+-------+-------+-------+-------+-------+
300  * |s|                  integer part1                              |
301  * +-------+-------+-------+-------+-------+-------+-------+-------+
302  *
303  * +-------+-------+-------+-------+-------+-------+-------+-------+
304  * |                    integer part 2                             |
305  * +-------+-------+-------+-------+-------+-------+-------+-------+
306  *
307  * +-------+-------+-------+-------+-------+-------+-------+-------+
308  * |                    integer part 3                             |
309  * +-------+-------+-------+-------+-------+-------+-------+-------+
310  *
311  * +-------+-------+-------+-------+-------+-------+-------+-------+
312  * |                    integer part 4                             |
313  * +-------+-------+-------+-------+-------+-------+-------+-------+
314  */
315 
316 struct quadwd {
317 	int  wd0;
318 	unsigned int wd1;
319 	unsigned int wd2;
320 	unsigned int wd3;
321 };
322 
323 typedef struct quadwd quad_integer;
324 
325 
326 /* useful typedefs */
327 typedef int sgl_floating_point;
328 typedef struct dblwd dbl_floating_point;
329 typedef struct dint dbl_integer;
330 
331 /*
332  * Define the different precisions' parameters.
333  */
334 #define SGL_BITLENGTH 32
335 #define SGL_BIAS 127
336 #define SGL_WRAP 192
337 #define SGL_INFINITY_EXPONENT (FLT_MAX_EXP+SGL_BIAS+1)
338 #define SGL_THRESHOLD 32
339 #define SGL_EXP_LENGTH 8
340 #define SGL_P 24
341 
342 #define DBL_BITLENGTH 64
343 #define DBL_BIAS 1023
344 #define DBL_WRAP 1536
345 #define DBL_INFINITY_EXPONENT (DBL_MAX_EXP+DBL_BIAS+1)
346 #define DBL_THRESHOLD 64
347 #define DBL_EXP_LENGTH 11
348 #define DBL_P 53
349 
350 #define QUAD_BITLENGTH 128
351 #define QUAD_BIAS 16383
352 #define QUAD_WRAP 24576
353 #define QUAD_INFINITY_EXPONENT (LDBL_MAX_EXP+QUAD_BIAS+1)
354 #define QUAD_P 113
355 
356 /* Boolean Values etc. */
357 #define FALSE 0
358 #define TRUE (!FALSE)
359 #define NOT !
360 #define XOR ^
361 
362 /* Declare status register equivalent to FPUs architecture.
363  *
364  *  0 1 2 3 4 5 6 7 8 910 1 2 3 4 5 6 7 8 920 1 2 3 4 5 6 7 8 930 1
365  * +-------+-------+-------+-------+-------+-------+-------+-------+
366  * |V|Z|O|U|I|C|  rsv  |  model    | version |RM |rsv|T|r|V|Z|O|U|I|
367  * +-------+-------+-------+-------+-------+-------+-------+-------+
368  */
369 #define Cbit(object) Bitfield_extract( 5, 1,object)
370 #define Tbit(object) Bitfield_extract( 25, 1,object)
371 #define Roundingmode(object) Bitfield_extract( 21, 2,object)
372 #define Invalidtrap(object) Bitfield_extract( 27, 1,object)
373 #define Divisionbyzerotrap(object) Bitfield_extract( 28, 1,object)
374 #define Overflowtrap(object) Bitfield_extract( 29, 1,object)
375 #define Underflowtrap(object) Bitfield_extract( 30, 1,object)
376 #define Inexacttrap(object) Bitfield_extract( 31, 1,object)
377 #define Invalidflag(object) Bitfield_extract( 0, 1,object)
378 #define Divisionbyzeroflag(object) Bitfield_extract( 1, 1,object)
379 #define Overflowflag(object) Bitfield_extract( 2, 1,object)
380 #define Underflowflag(object) Bitfield_extract( 3, 1,object)
381 #define Inexactflag(object) Bitfield_extract( 4, 1,object)
382 #define Allflags(object) Bitfield_extract( 0, 5,object)
383 
384 /* Definitions relevant to the status register */
385 
386 /* Rounding Modes */
387 #define ROUNDNEAREST 0
388 #define ROUNDZERO    1
389 #define ROUNDPLUS    2
390 #define ROUNDMINUS   3
391 
392 /* Exceptions */
393 #define NOEXCEPTION		0x0
394 #define INVALIDEXCEPTION	0x20
395 #define DIVISIONBYZEROEXCEPTION	0x10
396 #define OVERFLOWEXCEPTION	0x08
397 #define UNDERFLOWEXCEPTION	0x04
398 #define INEXACTEXCEPTION	0x02
399 #define UNIMPLEMENTEDEXCEPTION	0x01
400 
401 /* Declare exception registers equivalent to FPUs architecture
402  *
403  *  0 1 2 3 4 5 6 7 8 910 1 2 3 4 5 6 7 8 920 1 2 3 4 5 6 7 8 930 1
404  * +-------+-------+-------+-------+-------+-------+-------+-------+
405  * |excepttype |  r1     | r2/ext  |  operation  |parm |n| t/cond  |
406  * +-------+-------+-------+-------+-------+-------+-------+-------+
407  */
408 #define Allexception(object) (object)
409 #define Exceptiontype(object) Bitfield_extract( 0, 6,object)
410 #define Instructionfield(object) Bitfield_mask( 6,26,object)
411 #define Parmfield(object) Bitfield_extract( 23, 3,object)
412 #define Rabit(object) Bitfield_extract( 24, 1,object)
413 #define Ibit(object) Bitfield_extract( 25, 1,object)
414 
415 #define Set_exceptiontype(object,value) Bitfield_deposit(value, 0, 6,object)
416 #define Set_parmfield(object,value) Bitfield_deposit(value, 23, 3,object)
417 #define Set_exceptiontype_and_instr_field(exception,instruction,object) \
418     object = ((exception) << 26) | (instruction)
419 
420 /* Declare the condition field
421  *
422  *  0 1 2 3 4 5 6 7 8 910 1 2 3 4 5 6 7 8 920 1 2 3 4 5 6 7 8 930 1
423  * +-------+-------+-------+-------+-------+-------+-------+-------+
424  * |                                                     |G|L|E|U|X|
425  * +-------+-------+-------+-------+-------+-------+-------+-------+
426  */
427 #define Allexception(object) (object)
428 #define Greaterthanbit(object) Bitfield_extract( 27, 1,object)
429 #define Lessthanbit(object) Bitfield_extract( 28, 1,object)
430 #define Equalbit(object) Bitfield_extract( 29, 1,object)
431 #define Unorderedbit(object) Bitfield_extract( 30, 1,object)
432 #define Exceptionbit(object) Bitfield_extract( 31, 1,object)
433 
434 /* An alias name for the status register */
435 #define Fpustatus_register (*status)
436 
437 /**************************************************
438  * Status register referencing and manipulation.  *
439  **************************************************/
440 
441 /* Rounding mode */
442 #define Rounding_mode()  Roundingmode(Fpustatus_register)
443 #define Is_rounding_mode(rmode) \
444     (Roundingmode(Fpustatus_register) == rmode)
445 #define Set_rounding_mode(value) \
446     Bitfield_deposit(value,21,2,Fpustatus_register)
447 
448 /* Boolean testing of the trap enable bits */
449 #define Is_invalidtrap_enabled() Invalidtrap(Fpustatus_register)
450 #define Is_divisionbyzerotrap_enabled() Divisionbyzerotrap(Fpustatus_register)
451 #define Is_overflowtrap_enabled() Overflowtrap(Fpustatus_register)
452 #define Is_underflowtrap_enabled() Underflowtrap(Fpustatus_register)
453 #define Is_inexacttrap_enabled() Inexacttrap(Fpustatus_register)
454 
455 /* Set the indicated flags in the status register */
456 #define Set_invalidflag() Bitfield_deposit(1,0,1,Fpustatus_register)
457 #define Set_divisionbyzeroflag() Bitfield_deposit(1,1,1,Fpustatus_register)
458 #define Set_overflowflag() Bitfield_deposit(1,2,1,Fpustatus_register)
459 #define Set_underflowflag() Bitfield_deposit(1,3,1,Fpustatus_register)
460 #define Set_inexactflag() Bitfield_deposit(1,4,1,Fpustatus_register)
461 
462 #define Clear_all_flags() Bitfield_deposit(0,0,5,Fpustatus_register)
463 
464 /* Manipulate the trap and condition code bits (tbit and cbit) */
465 #define Set_tbit() Bitfield_deposit(1,25,1,Fpustatus_register)
466 #define Clear_tbit() Bitfield_deposit(0,25,1,Fpustatus_register)
467 #define Is_tbit_set() Tbit(Fpustatus_register)
468 #define Is_cbit_set() Cbit(Fpustatus_register)
469 
470 #ifdef TIMEX
471 #define Set_status_cbit(value) \
472 	Bitfield_deposit(Bitfield_extract(10,10,Fpustatus_register),11,10,Fpustatus_register); \
473 	Bitfield_deposit(Bitfield_extract(5,1,Fpustatus_register),10,1,Fpustatus_register); \
474 	Bitfield_deposit(value,5,1,Fpustatus_register)
475 #else
476 #define Set_status_cbit(value) Bitfield_deposit(value,5,1,Fpustatus_register)
477 #endif
478 
479 /*******************************
480  * Condition field referencing *
481  *******************************/
482 #define Unordered(cond) Unorderedbit(cond)
483 #define Equal(cond) Equalbit(cond)
484 #define Lessthan(cond) Lessthanbit(cond)
485 #define Greaterthan(cond) Greaterthanbit(cond)
486 #define Exception(cond) Exceptionbit(cond)
487 
488 
489 /* Defines for the extension */
490 #define Ext_isone_sign(extent) (Extsign(extent))
491 #define Ext_isnotzero(extent) \
492     (Extall(extent))
493 #define Ext_isnotzero_lower(extent) \
494     (Extlow31(extent))
495 #define Ext_leftshiftby1(extent) \
496     Extall(extent) <<= 1
497 #define Ext_negate(extent) \
498     (int )Extall(extent) = 0 - (int )Extall(extent)
499 #define Ext_setone_low(extent) Bitfield_deposit(1,31,1,extent)
500 
501