1 /* $NetBSD: wax.c,v 1.4 2021/08/07 16:18:55 thorpej Exp $ */ 2 3 /* $OpenBSD: wax.c,v 1.1 1998/11/23 03:04:10 mickey Exp $ */ 4 5 /* 6 * Copyright (c) 1998-2003 Michael Shalayeff 7 * All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 21 * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT, 22 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 23 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 24 * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 26 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 27 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 28 * THE POSSIBILITY OF SUCH DAMAGE. 29 */ 30 31 #include <sys/cdefs.h> 32 __KERNEL_RCSID(0, "$NetBSD: wax.c,v 1.4 2021/08/07 16:18:55 thorpej Exp $"); 33 34 #include <sys/param.h> 35 #include <sys/systm.h> 36 #include <sys/device.h> 37 #include <sys/reboot.h> 38 39 #include <machine/iomod.h> 40 #include <machine/autoconf.h> 41 42 #include <hppa/dev/cpudevs.h> 43 44 #include <hppa/gsc/gscbusvar.h> 45 46 #define WAX_IOMASK 0xfff00000 47 #define WAX_REGS 0xc000 48 49 struct wax_regs { 50 uint32_t wax_irr; /* int requset register */ 51 uint32_t wax_imr; /* int mask register */ 52 uint32_t wax_ipr; /* int pending register */ 53 uint32_t wax_icr; /* int control register */ 54 uint32_t wax_iar; /* int address register */ 55 }; 56 57 struct wax_softc { 58 device_t sc_dv; 59 struct hppa_interrupt_register sc_ir; 60 struct wax_regs volatile *sc_regs; 61 }; 62 63 int waxmatch(device_t, cfdata_t, void *); 64 void waxattach(device_t, device_t, void *); 65 66 67 CFATTACH_DECL_NEW(wax, sizeof(struct wax_softc), 68 waxmatch, waxattach, NULL, NULL); 69 70 static int wax_attached; 71 72 /* 73 * Before a module is matched, this fixes up its gsc_attach_args. 74 */ 75 static void wax_fix_args(void *, struct gsc_attach_args *); 76 static void 77 wax_fix_args(void *_sc, struct gsc_attach_args *ga) 78 { 79 struct wax_softc *sc = _sc; 80 hppa_hpa_t module_offset; 81 82 /* 83 * Determine this module's interrupt bit. 84 */ 85 module_offset = ga->ga_hpa - (hppa_hpa_t) sc->sc_regs; 86 ga->ga_irq = HPPACF_IRQ_UNDEF; 87 if (module_offset == 0x1000) /* hil */ 88 ga->ga_irq = 1; 89 if (module_offset == 0x2000) /* com */ 90 ga->ga_irq = 6; 91 } 92 93 int 94 waxmatch(device_t parent, cfdata_t cf, void *aux) 95 { 96 struct confargs *ca = aux; 97 98 /* there will be only one */ 99 if (wax_attached || 100 ca->ca_type.iodc_type != HPPA_TYPE_BHA || 101 ca->ca_type.iodc_sv_model != HPPA_BHA_WAX) 102 return 0; 103 104 return 1; 105 } 106 107 void 108 waxattach(device_t parent, device_t self, void *aux) 109 { 110 struct confargs *ca = aux; 111 struct wax_softc *sc = device_private(self); 112 struct gsc_attach_args ga; 113 struct cpu_info *ci = &cpus[0]; 114 bus_space_handle_t ioh; 115 int s; 116 117 ca->ca_irq = hppa_intr_allocate_bit(&ci->ci_ir, ca->ca_irq); 118 if (ca->ca_irq == HPPACF_IRQ_UNDEF) { 119 aprint_error(": can't allocate interrupt\n"); 120 return; 121 } 122 123 sc->sc_dv = self; 124 wax_attached = 1; 125 126 aprint_normal("\n"); 127 128 /* 129 * Map the WAX interrupt registers. 130 */ 131 if (bus_space_map(ca->ca_iot, ca->ca_hpa, sizeof(struct wax_regs), 132 0, &ioh)) { 133 aprint_error(": can't map interrupt registers\n"); 134 return; 135 } 136 sc->sc_regs = (struct wax_regs *)ca->ca_hpa; 137 138 /* interrupts guts */ 139 s = splhigh(); 140 sc->sc_regs->wax_iar = ci->ci_hpa | (31 - ca->ca_irq); 141 sc->sc_regs->wax_icr = 0; 142 sc->sc_regs->wax_imr = 0; 143 (void)sc->sc_regs->wax_irr; 144 splx(s); 145 146 /* Establish the interrupt register. */ 147 hppa_interrupt_register_establish(ci, &sc->sc_ir); 148 sc->sc_ir.ir_name = device_xname(self); 149 sc->sc_ir.ir_mask = &sc->sc_regs->wax_imr; 150 sc->sc_ir.ir_req = &sc->sc_regs->wax_irr; 151 152 /* Attach the GSC bus. */ 153 ga.ga_ca = *ca; /* clone from us */ 154 if (strcmp(device_xname(parent), "mainbus0") == 0) { 155 ga.ga_dp.dp_bc[0] = ga.ga_dp.dp_bc[1]; 156 ga.ga_dp.dp_bc[1] = ga.ga_dp.dp_bc[2]; 157 ga.ga_dp.dp_bc[2] = ga.ga_dp.dp_bc[3]; 158 ga.ga_dp.dp_bc[3] = ga.ga_dp.dp_bc[4]; 159 ga.ga_dp.dp_bc[4] = ga.ga_dp.dp_bc[5]; 160 ga.ga_dp.dp_bc[5] = ga.ga_dp.dp_mod; 161 ga.ga_dp.dp_mod = 0; 162 } 163 164 ga.ga_name = "gsc"; 165 ga.ga_ir = &sc->sc_ir; 166 ga.ga_fix_args = wax_fix_args; 167 ga.ga_fix_args_cookie = sc; 168 ga.ga_scsi_target = 7; /* XXX */ 169 config_found(self, &ga, gscprint, CFARGS_NONE); 170 } 171