xref: /netbsd-src/sys/arch/hpcsh/include/bus_defs.h (revision bdc22b2e01993381dcefeff2bc9b56ca75a4235c)
1 /*	$NetBSD: bus_defs.h,v 1.1 2011/07/19 15:31:44 dyoung Exp $	*/
2 
3 /*-
4  * Copyright (c) 1997, 1998, 2000, 2001, 2002 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9  * NASA Ames Research Center.
10  *
11  * Redistribution and use in source and binary forms, with or without
12  * modification, are permitted provided that the following conditions
13  * are met:
14  * 1. Redistributions of source code must retain the above copyright
15  *    notice, this list of conditions and the following disclaimer.
16  * 2. Redistributions in binary form must reproduce the above copyright
17  *    notice, this list of conditions and the following disclaimer in the
18  *    documentation and/or other materials provided with the distribution.
19  *
20  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
21  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
22  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
24  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30  * POSSIBILITY OF SUCH DAMAGE.
31  */
32 
33 /*
34  * Copyright (c) 1996 Carnegie-Mellon University.
35  * All rights reserved.
36  *
37  * Author: Chris G. Demetriou
38  *
39  * Permission to use, copy, modify and distribute this software and
40  * its documentation is hereby granted, provided that both the copyright
41  * notice and this permission notice appear in all copies of the
42  * software, derivative works or modified versions, and any portions
43  * thereof, and that both notices appear in supporting documentation.
44  *
45  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
46  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
47  * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
48  *
49  * Carnegie Mellon requests users of this software to return to
50  *
51  *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
52  *  School of Computer Science
53  *  Carnegie Mellon University
54  *  Pittsburgh PA 15213-3890
55  *
56  * any improvements or extensions that they make and grant Carnegie the
57  * rights to redistribute these changes.
58  */
59 
60 #ifndef _HPCSH_BUS_DEFS_H_
61 #define	_HPCSH_BUS_DEFS_H_
62 
63 #ifdef _KERNEL
64 /*
65  * Turn on BUS_SPACE_DEBUG if the global DEBUG option is enabled.
66  */
67 #if defined(DEBUG) && !defined(BUS_SPACE_DEBUG)
68 #define	BUS_SPACE_DEBUG
69 #endif
70 
71 #ifdef BUS_SPACE_DEBUG
72 #include <sys/systm.h> /* for printf() prototype */
73 /*
74  * Macros for checking the aligned-ness of pointers passed to bus
75  * space ops.  Strict alignment is required by the Alpha architecture,
76  * and a trap will occur if unaligned access is performed.  These
77  * may aid in the debugging of a broken device driver by displaying
78  * useful information about the problem.
79  */
80 #define	__BUS_SPACE_ALIGNED_ADDRESS(p, t)				\
81 	((((u_long)(p)) & (sizeof(t)-1)) == 0)
82 
83 #define	__BUS_SPACE_ADDRESS_SANITY(p, t, d)				\
84 ({									\
85 	if (__BUS_SPACE_ALIGNED_ADDRESS((p), t) == 0) {			\
86 		printf("%s 0x%lx not aligned to %lu bytes %s:%d\n",	\
87 		    d, (u_long)(p), (u_long)sizeof(t), __FILE__, __LINE__);	\
88 	}								\
89 	(void) 0;							\
90 })
91 
92 #define BUS_SPACE_ALIGNED_POINTER(p, t) __BUS_SPACE_ALIGNED_ADDRESS(p, t)
93 #else
94 #define	__BUS_SPACE_ADDRESS_SANITY(p, t, d)	(void) 0
95 #define BUS_SPACE_ALIGNED_POINTER(p, t) ALIGNED_POINTER(p, t)
96 #endif /* BUS_SPACE_DEBUG */
97 #endif /* _KERNEL */
98 
99 /*
100  * Addresses (in bus space).
101  */
102 typedef u_long bus_addr_t;
103 typedef u_long bus_size_t;
104 
105 /*
106  * Access methods for bus space.
107  */
108 typedef struct hpcsh_bus_space *bus_space_tag_t;
109 typedef u_long bus_space_handle_t;
110 
111 struct extent; /* forward declaration */
112 
113 struct hpcsh_bus_space {
114 	struct extent	*hbs_extent;
115 	bus_addr_t	hbs_base_addr;
116 
117 	/* cookie */
118 	void		*hbs_cookie;
119 
120 	int 		hbs_flags;
121 #define HBS_FLAGS_ALLOCATED	(1 < 0)
122 
123 	/* mapping/unmapping */
124 	int		(*hbs_map)(void *, bus_addr_t, bus_size_t,
125 			    int, bus_space_handle_t *);
126 	void		(*hbs_unmap)(void *, bus_space_handle_t,
127 			    bus_size_t);
128 	int		(*hbs_subregion)(void *, bus_space_handle_t,
129 			    bus_size_t, bus_size_t, bus_space_handle_t *);
130 
131 	/* allocation/deallocation */
132 	int		(*hbs_alloc)(void *, bus_addr_t, bus_addr_t,
133 			    bus_size_t, bus_size_t, bus_size_t, int,
134 			    bus_addr_t *, bus_space_handle_t *);
135 	void		(*hbs_free)(void *, bus_space_handle_t,
136 			    bus_size_t);
137 
138 	/* get kernel virtual address */
139 	void *		(*hbs_vaddr)(void *, bus_space_handle_t);
140 
141 	/* read (single) */
142 	uint8_t		(*hbs_r_1)(void *, bus_space_handle_t,
143 			    bus_size_t);
144 	uint16_t	(*hbs_r_2)(void *, bus_space_handle_t,
145 			    bus_size_t);
146 	uint32_t	(*hbs_r_4)(void *, bus_space_handle_t,
147 			    bus_size_t);
148 	uint64_t	(*hbs_r_8)(void *, bus_space_handle_t,
149 			    bus_size_t);
150 
151 	/* read multiple */
152 	void		(*hbs_rm_1)(void *, bus_space_handle_t,
153 			    bus_size_t, uint8_t *, bus_size_t);
154 	void		(*hbs_rm_2)(void *, bus_space_handle_t,
155 			    bus_size_t, uint16_t *, bus_size_t);
156 	void		(*hbs_rm_4)(void *, bus_space_handle_t,
157 			    bus_size_t, uint32_t *, bus_size_t);
158 	void		(*hbs_rm_8)(void *, bus_space_handle_t,
159 			    bus_size_t, uint64_t *, bus_size_t);
160 
161 	/* read region */
162 	void		(*hbs_rr_1)(void *, bus_space_handle_t,
163 			    bus_size_t, uint8_t *, bus_size_t);
164 	void		(*hbs_rr_2)(void *, bus_space_handle_t,
165 			    bus_size_t, uint16_t *, bus_size_t);
166 	void		(*hbs_rr_4)(void *, bus_space_handle_t,
167 			    bus_size_t, uint32_t *, bus_size_t);
168 	void		(*hbs_rr_8)(void *, bus_space_handle_t,
169 			    bus_size_t, uint64_t *, bus_size_t);
170 
171 	/* write (single) */
172 	void		(*hbs_w_1)(void *, bus_space_handle_t,
173 			    bus_size_t, uint8_t);
174 	void		(*hbs_w_2)(void *, bus_space_handle_t,
175 			    bus_size_t, uint16_t);
176 	void		(*hbs_w_4)(void *, bus_space_handle_t,
177 			    bus_size_t, uint32_t);
178 	void		(*hbs_w_8)(void *, bus_space_handle_t,
179 			    bus_size_t, uint64_t);
180 
181 	/* write multiple */
182 	void		(*hbs_wm_1)(void *, bus_space_handle_t,
183 			    bus_size_t, const uint8_t *, bus_size_t);
184 	void		(*hbs_wm_2)(void *, bus_space_handle_t,
185 			    bus_size_t, const uint16_t *, bus_size_t);
186 	void		(*hbs_wm_4)(void *, bus_space_handle_t,
187 			    bus_size_t, const uint32_t *, bus_size_t);
188 	void		(*hbs_wm_8)(void *, bus_space_handle_t,
189 			    bus_size_t, const uint64_t *, bus_size_t);
190 
191 	/* write region */
192 	void		(*hbs_wr_1)(void *, bus_space_handle_t,
193 			    bus_size_t, const uint8_t *, bus_size_t);
194 	void		(*hbs_wr_2)(void *, bus_space_handle_t,
195 			    bus_size_t, const uint16_t *, bus_size_t);
196 	void		(*hbs_wr_4)(void *, bus_space_handle_t,
197 			    bus_size_t, const uint32_t *, bus_size_t);
198 	void		(*hbs_wr_8)(void *, bus_space_handle_t,
199 			    bus_size_t, const uint64_t *, bus_size_t);
200 
201 	/* set multiple */
202 	void		(*hbs_sm_1)(void *, bus_space_handle_t,
203 			    bus_size_t, uint8_t, bus_size_t);
204 	void		(*hbs_sm_2)(void *, bus_space_handle_t,
205 			    bus_size_t, uint16_t, bus_size_t);
206 	void		(*hbs_sm_4)(void *, bus_space_handle_t,
207 			    bus_size_t, uint32_t, bus_size_t);
208 	void		(*hbs_sm_8)(void *, bus_space_handle_t,
209 			    bus_size_t, uint64_t, bus_size_t);
210 
211 	/* set region */
212 	void		(*hbs_sr_1)(void *, bus_space_handle_t,
213 			    bus_size_t, uint8_t, bus_size_t);
214 	void		(*hbs_sr_2)(void *, bus_space_handle_t,
215 			    bus_size_t, uint16_t, bus_size_t);
216 	void		(*hbs_sr_4)(void *, bus_space_handle_t,
217 			    bus_size_t, uint32_t, bus_size_t);
218 	void		(*hbs_sr_8)(void *, bus_space_handle_t,
219 			    bus_size_t, uint64_t, bus_size_t);
220 
221 	/* copy */
222 	void		(*hbs_c_1)(void *, bus_space_handle_t, bus_size_t,
223 			    bus_space_handle_t, bus_size_t, bus_size_t);
224 	void		(*hbs_c_2)(void *, bus_space_handle_t, bus_size_t,
225 			    bus_space_handle_t, bus_size_t, bus_size_t);
226 	void		(*hbs_c_4)(void *, bus_space_handle_t, bus_size_t,
227 			    bus_space_handle_t, bus_size_t, bus_size_t);
228 	void		(*hbs_c_8)(void *, bus_space_handle_t, bus_size_t,
229 			    bus_space_handle_t, bus_size_t, bus_size_t);
230 };
231 
232 #define	BUS_SPACE_MAP_CACHEABLE		0x01
233 #define	BUS_SPACE_MAP_LINEAR		0x02
234 #define	BUS_SPACE_MAP_PREFETCHABLE     	0x04
235 
236 #define	BUS_SPACE_BARRIER_READ	0x01
237 #define	BUS_SPACE_BARRIER_WRITE	0x02
238 
239 /*
240  * Flags used in various bus DMA methods.
241  */
242 #define	BUS_DMA_WAITOK		0x000	/* safe to sleep (pseudo-flag) */
243 #define	BUS_DMA_NOWAIT		0x001	/* not safe to sleep */
244 #define	BUS_DMA_ALLOCNOW	0x002	/* perform resource allocation now */
245 #define	BUS_DMA_COHERENT	0x004	/* map memory to not require sync */
246 #define	BUS_DMA_STREAMING	0x008	/* hint: sequential, unidirectional */
247 #define	BUS_DMA_BUS1		0x010	/* placeholders for bus functions... */
248 #define	BUS_DMA_BUS2		0x020
249 #define	BUS_DMA_BUS3		0x040
250 #define	BUS_DMA_BUS4		0x080
251 #define	BUS_DMA_READ		0x100	/* mapping is device -> memory only */
252 #define	BUS_DMA_WRITE		0x200	/* mapping is memory -> device only */
253 #define	BUS_DMA_NOCACHE		0x400	/* hint: map non-cached memory */
254 
255 /*
256  * Private flags stored in the DMA map.
257  */
258 #define	HPCSH_DMAMAP_COHERENT	0x10000	/* no cache flush necessary on sync */
259 
260 /* Forwards needed by prototypes below. */
261 struct mbuf;
262 struct uio;
263 
264 /*
265  *	Operations performed by bus_dmamap_sync().
266  */
267 #define	BUS_DMASYNC_PREREAD	0x01
268 #define	BUS_DMASYNC_POSTREAD	0x02
269 #define	BUS_DMASYNC_PREWRITE	0x04
270 #define	BUS_DMASYNC_POSTWRITE	0x08
271 
272 typedef struct hpcsh_bus_dma_tag		*bus_dma_tag_t;
273 typedef struct hpcsh_bus_dmamap		*bus_dmamap_t;
274 
275 #define BUS_DMA_TAG_VALID(t)    ((t) != (bus_dma_tag_t)0)
276 
277 /*
278  *	bus_dma_segment_t
279  *
280  *	Describes a single contiguous DMA transaction.  Values
281  *	are suitable for programming into DMA registers.
282  */
283 struct hpcsh_bus_dma_segment {
284 	bus_addr_t	ds_addr;	/* DMA address */
285 	bus_size_t	ds_len;		/* length of transfer */
286 	bus_addr_t	_ds_vaddr;	/* virtual address, 0 if invalid */
287 };
288 typedef struct hpcsh_bus_dma_segment	bus_dma_segment_t;
289 
290 /*
291  *	bus_dma_tag_t
292  *
293  *	A machine-dependent opaque type describing the implementation of
294  *	DMA for a given bus.
295  */
296 
297 struct hpcsh_bus_dma_tag {
298 	void	*_cookie;		/* cookie used in the guts */
299 
300 	bus_addr_t _wbase;		/* DMA window base */
301 	bus_addr_t _physbase;		/* physical base of the window */
302 	bus_size_t _wsize;		/* size of the window */
303 
304 	/*
305 	 * DMA mapping methods.
306 	 */
307 	int	(*_dmamap_create)(bus_dma_tag_t, bus_size_t, int,
308 		    bus_size_t, bus_size_t, int, bus_dmamap_t *);
309 	void	(*_dmamap_destroy)(bus_dma_tag_t, bus_dmamap_t);
310 	int	(*_dmamap_load)(bus_dma_tag_t, bus_dmamap_t, void *,
311 		    bus_size_t, struct proc *, int);
312 	int	(*_dmamap_load_mbuf)(bus_dma_tag_t, bus_dmamap_t,
313 		    struct mbuf *, int);
314 	int	(*_dmamap_load_uio)(bus_dma_tag_t, bus_dmamap_t,
315 		    struct uio *, int);
316 	int	(*_dmamap_load_raw)(bus_dma_tag_t, bus_dmamap_t,
317 		    bus_dma_segment_t *, int, bus_size_t, int);
318 	void	(*_dmamap_unload)(bus_dma_tag_t, bus_dmamap_t);
319 	void	(*_dmamap_sync)(bus_dma_tag_t, bus_dmamap_t,
320 		    bus_addr_t, bus_size_t, int);
321 
322 	/*
323 	 * DMA memory utility functions.
324 	 */
325 	int	(*_dmamem_alloc)(bus_dma_tag_t, bus_size_t, bus_size_t,
326 		    bus_size_t, bus_dma_segment_t *, int, int *, int);
327 	void	(*_dmamem_free)(bus_dma_tag_t,
328 		    bus_dma_segment_t *, int);
329 	int	(*_dmamem_map)(bus_dma_tag_t, bus_dma_segment_t *,
330 		    int, size_t, void **, int);
331 	void	(*_dmamem_unmap)(bus_dma_tag_t, void *, size_t);
332 	paddr_t	(*_dmamem_mmap)(bus_dma_tag_t, bus_dma_segment_t *,
333 		    int, off_t, int, int);
334 };
335 
336 /*
337  *	bus_dmamap_t
338  *
339  *	Describes a DMA mapping.
340  */
341 struct hpcsh_bus_dmamap {
342 	/*
343 	 * PRIVATE MEMBERS: not for use my machine-independent code.
344 	 */
345 	bus_size_t	_dm_size;	/* largest DMA transfer mappable */
346 	int		_dm_segcnt;	/* number of segs this map can map */
347 	bus_size_t	_dm_maxmaxsegsz; /* fixed largest possible segment */
348 	bus_size_t	_dm_boundary;	/* don't cross this */
349 	int		_dm_flags;	/* misc. flags */
350 	struct vmspace	*_dm_vmspace;	/* vmspace that owns the mapping */
351 
352 	/*
353 	 * Private cookie to be used by the DMA back-end.
354 	 */
355 	void		*_dm_cookie;
356 
357 	/*
358 	 * PUBLIC MEMBERS: these are used by machine-independent code.
359 	 */
360 	bus_size_t	dm_maxsegsz;	/* largest possible segment */
361 	bus_size_t	dm_mapsize;	/* size of the mapping */
362 	int		dm_nsegs;	/* # valid segments in mapping */
363 	bus_dma_segment_t dm_segs[1];	/* segments; variable length */
364 };
365 
366 #endif /* _HPCSH_BUS_DEFS_H_ */
367