1 /* $NetBSD: hd6446xintc.c,v 1.4 2005/12/18 21:20:48 uwe Exp $ */ 2 3 /*- 4 * Copyright (c) 2002 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by UCHIYAMA Yasushi. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #include <sys/cdefs.h> 40 __KERNEL_RCSID(0, "$NetBSD: hd6446xintc.c,v 1.4 2005/12/18 21:20:48 uwe Exp $"); 41 42 #include <sys/param.h> 43 #include <sys/systm.h> 44 45 #include <sh3/devreg.h> 46 #include <hpcsh/dev/hd6446x/hd6446xintcreg.h> 47 #include <hpcsh/dev/hd6446x/hd6446xintcvar.h> 48 49 struct hd6446x_intrhand hd6446x_intrhand[_HD6446X_INTR_N]; 50 uint16_t hd6446x_imask[_IPL_N]; 51 uint16_t hd6446x_ienable; 52 53 static void hd6446x_intr_priority_update(void); 54 55 56 void 57 hd6446x_intr_init(void) 58 { 59 60 /* Initialize interrupt priority masks. */ 61 hd6446x_intr_priority_update(); 62 } 63 64 void * 65 hd6446x_intr_establish(int irq, int mode, int level, 66 int (*func)(void *), void *arg) 67 { 68 struct hd6446x_intrhand *hh = &hd6446x_intrhand[ffs(irq) - 1]; 69 uint16_t r; 70 int s; 71 72 s = splhigh(); 73 74 /* Register interrupt handler */ 75 hh->hh_func = func; 76 hh->hh_arg = arg; 77 hh->hh_ipl = level << 4; 78 hh->hh_imask = irq; 79 hd6446x_ienable |= hh->hh_imask; 80 81 /* Update interrupt priority masks. */ 82 hd6446x_intr_priority_update(); 83 84 /* Enable interrupt */ 85 r = _reg_read_2(HD6446X_NIMR); 86 r &= ~hh->hh_imask; 87 _reg_write_2(HD6446X_NIMR, r); 88 89 splx(s); 90 91 return (hh); 92 } 93 94 void 95 hd6446x_intr_disestablish(void *handle) 96 { 97 struct hd6446x_intrhand *hh = handle; 98 uint16_t r; 99 int s; 100 101 s = splhigh(); 102 103 /* Disable interrupt */ 104 r = _reg_read_2(HD6446X_NIMR); 105 r |= hh->hh_imask; 106 _reg_write_2(HD6446X_NIMR, r); 107 108 /* Update interrupt priority masks */ 109 hd6446x_ienable &= ~hh->hh_imask; 110 memset(hh, 0, sizeof(*hh)); 111 hd6446x_intr_priority_update(); 112 113 splx(s); 114 } 115 116 void 117 hd6446x_intr_priority(int irq, int level) 118 { 119 struct hd6446x_intrhand *hh = &hd6446x_intrhand[ffs(irq) - 1]; 120 int s; 121 122 KDASSERT(hh->hh_func != NULL); 123 s = splhigh(); 124 hh->hh_ipl = level << 4; 125 hd6446x_intr_priority_update(); 126 splx(s); 127 } 128 129 static void 130 hd6446x_intr_priority_update(void) 131 { 132 struct hd6446x_intrhand *hh; 133 int irq, ipl; 134 uint16_t mask; 135 136 /* I assume interrupt level is splhigh */ 137 for (ipl = 0; ipl < _IPL_N; ipl++) { 138 hh = hd6446x_intrhand; 139 mask = 0; 140 for (irq = 0; irq < _HD6446X_INTR_N; irq++, hh++) { 141 if (hh->hh_func == NULL) 142 continue; 143 if (hh->hh_ipl == (ipl << 4)) 144 mask |= 1 << irq; 145 } 146 hd6446x_imask[ipl] = mask | ~hd6446x_ienable; 147 } 148 149 for (ipl = 1; ipl < _IPL_N; ipl++) 150 hd6446x_imask[ipl] |= hd6446x_imask[ipl - 1]; 151 } 152