1 /* $NetBSD: vrecu.c,v 1.1 2003/05/01 07:02:06 igy Exp $ */ 2 3 /* 4 * Copyright (c) 2002 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Naoto Shimazaki of YOKOGAWA Electric Corporation. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #include <sys/param.h> 40 #include <sys/device.h> 41 #include <sys/malloc.h> 42 #include <sys/queue.h> 43 #include <sys/systm.h> 44 45 #include <machine/bus.h> 46 #include <machine/intr.h> 47 48 #include <hpcmips/vr/vrcpudef.h> 49 #include <hpcmips/vr/vripif.h> 50 #include <hpcmips/vr/vr4181ecureg.h> 51 52 #include <dev/isa/isareg.h> 53 #include <dev/isa/isavar.h> 54 #include <dev/pcmcia/pcmciareg.h> 55 #include <dev/pcmcia/pcmciavar.h> 56 #include <dev/pcmcia/pcmciachip.h> 57 58 #include <dev/ic/i82365reg.h> 59 #include <dev/ic/i82365var.h> 60 #include <dev/isa/i82365_isavar.h> 61 62 static int pcic_vrip_match(struct device *, struct cfdata *, void *); 63 static void pcic_vrip_attach(struct device *, struct device *, void *); 64 static void *pcic_vrip_chip_intr_establish(pcmcia_chipset_handle_t, 65 struct pcmcia_function *, int, 66 int (*)(void *), void *); 67 static void pcic_vrip_chip_intr_disestablish(pcmcia_chipset_handle_t, void *); 68 static int pcic_vrip_intr(void *); 69 70 struct pcic_vrip_softc { 71 struct pcic_softc sc_pcic; /* real pcic softc */ 72 u_int16_t sc_intr_mask; 73 u_int16_t sc_intr_valid; 74 struct intrhand { 75 int (*ih_fun)(void *); 76 void *ih_arg; 77 } sc_intrhand[ECU_MAX_INTR]; 78 }; 79 80 CFATTACH_DECL(pcic_vrip, sizeof(struct pcic_vrip_softc), 81 pcic_vrip_match, pcic_vrip_attach, NULL, NULL); 82 83 static struct pcmcia_chip_functions pcic_vrip_functions = { 84 .mem_alloc = pcic_chip_mem_alloc, 85 .mem_free = pcic_chip_mem_free, 86 .mem_map = pcic_chip_mem_map, 87 .mem_unmap = pcic_chip_mem_unmap, 88 89 .io_alloc = pcic_chip_io_alloc, 90 .io_free = pcic_chip_io_free, 91 .io_map = pcic_chip_io_map, 92 .io_unmap = pcic_chip_io_unmap, 93 94 .intr_establish = pcic_vrip_chip_intr_establish, 95 .intr_disestablish = pcic_vrip_chip_intr_disestablish, 96 97 .socket_enable = pcic_chip_socket_enable, 98 .socket_disable = pcic_chip_socket_disable, 99 }; 100 101 102 static int 103 pcic_vrip_match(struct device *parent, struct cfdata *match, void *aux) 104 { 105 return 1; 106 } 107 108 static void 109 pcic_vrip_attach(struct device *parent, struct device *self, void *aux) 110 { 111 struct pcic_softc *sc = (void *) self; 112 struct pcic_vrip_softc *vsc = (void *) self; 113 struct vrip_attach_args *va = aux; 114 bus_space_handle_t ioh; 115 bus_space_handle_t memh; 116 int i; 117 118 vsc->sc_intr_valid = PCIC_INTR_IRQ_VALIDMASK; 119 vsc->sc_intr_mask = 0xffff; 120 for (i = 0; i < ECU_MAX_INTR; i++) 121 vsc->sc_intrhand[i].ih_fun = NULL; 122 123 if ((sc->ih = vrip_intr_establish(va->va_vc, va->va_unit, 0, 124 IPL_NET, pcic_vrip_intr, sc)) 125 == NULL) { 126 printf("%s: can't establish interrupt", sc->dev.dv_xname); 127 } 128 129 /* Map i/o space. */ 130 if (bus_space_map(va->va_iot, va->va_addr, ECU_SIZE, 0, &ioh)) { 131 printf(": can't map pcic register space\n"); 132 return; 133 } 134 135 /* init CFG_REG_1 */ 136 bus_space_write_2(va->va_iot, ioh, ECU_CFG_REG_1_W, 0x0001); 137 138 /* mask all interrupt */ 139 bus_space_write_2(va->va_iot, ioh, ECU_INTMSK_REG_W, 140 vsc->sc_intr_mask); 141 142 /* Map mem space. */ 143 #if 1 144 if (bus_space_map(va->va_iot, VR_ISA_MEM_BASE, 0x4000, 0, &memh)) 145 panic("pcic_pci_attach: can't map mem space"); 146 147 sc->membase = VR_ISA_MEM_BASE; 148 sc->subregionmask = (1 << (0x4000 / PCIC_MEM_PAGESIZE)) - 1; 149 150 sc->iobase = VR_ISA_PORT_BASE + 0x400; 151 sc->iosize = 0xbff; 152 #else 153 if (bus_space_map(va->va_iot, VR_ISA_MEM_BASE, 0x70000, 0, &memh)) 154 panic("pcic_pci_attach: can't map mem space"); 155 156 sc->membase = VR_ISA_MEM_BASE; 157 sc->subregionmask = (1 << (0x70000 / PCIC_MEM_PAGESIZE)) - 1; 158 159 sc->iobase = VR_ISA_PORT_BASE; 160 sc->iosize = 0x10000; 161 #endif 162 163 sc->pct = &pcic_vrip_functions; 164 165 sc->iot = va->va_iot; 166 sc->ioh = ioh; 167 sc->memt = va->va_iot; 168 sc->memh = memh; 169 170 printf("\n"); 171 172 sc->irq = ISACF_IRQ_DEFAULT; 173 174 pcic_attach(sc); 175 pcic_attach_sockets(sc); 176 pcic_attach_sockets_finish(sc); 177 } 178 179 static void * 180 pcic_vrip_chip_intr_establish(pcmcia_chipset_handle_t pch, 181 struct pcmcia_function *pf, 182 int ipl, 183 int (*ih_fun)(void *), 184 void *ih_arg) 185 { 186 struct pcic_handle *h; 187 struct pcic_softc *sc; 188 struct pcic_vrip_softc *vsc; 189 struct intrhand *ih; 190 191 int irq; 192 int r; 193 194 195 /* 196 * XXXXXXXXXXXXXXXXXXXXXXXXXXXX 197 * XXXXXXXXXXXXXXXXXXXXXXXXXXXX 198 * XXXXXXXXXXXXXXXXXXXXXXXXXXXX 199 */ 200 irq = 11; 201 /* 202 * XXXXXXXXXXXXXXXXXXXXXXXXXXXX 203 * XXXXXXXXXXXXXXXXXXXXXXXXXXXX 204 * XXXXXXXXXXXXXXXXXXXXXXXXXXXX 205 */ 206 207 208 h = (struct pcic_handle *) pch; 209 sc = (struct pcic_softc *) h->ph_parent; 210 vsc = (struct pcic_vrip_softc *) h->ph_parent; 211 212 213 ih = &vsc->sc_intrhand[irq]; 214 if (ih->ih_fun) /* cannot share ecu interrupt */ 215 return NULL; 216 ih->ih_fun = ih_fun; 217 ih->ih_arg = ih_arg; 218 219 h->ih_irq = irq; 220 if (h->flags & PCIC_FLAG_ENABLED) { 221 r = pcic_read(h, PCIC_INTR); 222 r &= ~(PCIC_INTR_IRQ_MASK | PCIC_INTR_ENABLE); 223 r |= irq; 224 pcic_write(h, PCIC_INTR, r); 225 } 226 227 vsc->sc_intr_mask &= ~(1 << irq); 228 bus_space_write_2(sc->iot, sc->ioh, ECU_INTMSK_REG_W, 229 vsc->sc_intr_mask); 230 231 return ih; 232 } 233 234 static void 235 pcic_vrip_chip_intr_disestablish(pcmcia_chipset_handle_t pch, void *arg) 236 { 237 struct pcic_handle *h; 238 struct pcic_softc *sc; 239 struct pcic_vrip_softc *vsc; 240 struct intrhand *ih = arg; 241 242 int s; 243 int r; 244 245 h = (struct pcic_handle *) pch; 246 sc = (struct pcic_softc *) h->ph_parent; 247 vsc = (struct pcic_vrip_softc *) h->ph_parent; 248 249 if (ih != &vsc->sc_intrhand[h->ih_irq]) 250 panic("pcic_vrip_chip_intr_disestablish: bad handler"); 251 252 s = splhigh(); 253 254 vsc->sc_intr_mask |= 1 << h->ih_irq; 255 bus_space_write_2(sc->iot, sc->ioh, ECU_INTMSK_REG_W, 256 vsc->sc_intr_mask); 257 258 h->ih_irq = 0; 259 if (h->flags & PCIC_FLAG_ENABLED) { 260 r = pcic_read(h, PCIC_INTR); 261 r &= ~(PCIC_INTR_IRQ_MASK | PCIC_INTR_ENABLE); 262 pcic_write(h, PCIC_INTR, r); 263 } 264 265 ih->ih_fun = NULL; 266 ih->ih_arg = NULL; 267 268 splx(s); 269 } 270 271 /* 272 * interrupt handler 273 */ 274 static int 275 pcic_vrip_intr(void *arg) 276 { 277 struct pcic_softc *sc = arg; 278 struct pcic_vrip_softc *vsc = arg; 279 int i; 280 u_int16_t r; 281 282 r = bus_space_read_2(sc->iot, sc->ioh, ECU_INTSTAT_REG_W) 283 & ~vsc->sc_intr_mask; 284 285 for (i = 0; i < ECU_MAX_INTR; i++) { 286 struct intrhand *ih = &vsc->sc_intrhand[i]; 287 if (ih->ih_fun && (r & (1 << i))) 288 ih->ih_fun(ih->ih_arg); 289 } 290 return 1; 291 } 292