1 /* $NetBSD: vrc4172pci.c,v 1.16 2012/10/27 17:17:55 chs Exp $ */ 2 3 /*- 4 * Copyright (c) 2002 TAKEMURA Shin 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. Neither the name of the project nor the names of its contributors 16 * may be used to endorse or promote products derived from this software 17 * without specific prior written permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 22 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 23 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 29 * SUCH DAMAGE. 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: vrc4172pci.c,v 1.16 2012/10/27 17:17:55 chs Exp $"); 34 35 #include <sys/param.h> 36 #include <sys/systm.h> 37 #include <sys/device.h> 38 39 #include <machine/bus.h> 40 #include <machine/bus_space_hpcmips.h> 41 #include <machine/bus_dma_hpcmips.h> 42 #include <machine/config_hook.h> 43 #include <machine/platid.h> 44 #include <machine/platid_mask.h> 45 46 #include <dev/pci/pcivar.h> 47 #include <dev/pci/pcidevs.h> 48 #include <dev/pci/pciidereg.h> 49 50 #include <hpcmips/vr/icureg.h> 51 #include <hpcmips/vr/vripif.h> 52 #include <hpcmips/vr/vrc4172pcireg.h> 53 54 #include "pci.h" 55 #include "opt_vrc4172pci.h" 56 57 #ifdef DEBUG 58 #define DPRINTF(args) printf args 59 #else 60 #define DPRINTF(args) while (0) {} 61 #endif 62 63 struct vrc4172pci_softc { 64 device_t sc_dev; 65 66 bus_space_tag_t sc_iot; 67 bus_space_handle_t sc_ioh; 68 69 struct hpcmips_pci_chipset sc_pc; 70 #ifdef VRC4172PCI_MCR700_SUPPORT 71 pcireg_t sc_fake_baseaddr; 72 hpcio_chip_t sc_iochip; 73 #if 0 74 hpcio_intr_handle_t sc_ih; 75 #endif 76 #endif /* VRC4172PCI_MCR700_SUPPORT */ 77 }; 78 79 static int vrc4172pci_match(device_t, cfdata_t, void *); 80 static void vrc4172pci_attach(device_t, device_t, void *); 81 static void vrc4172pci_attach_hook(device_t, device_t, 82 struct pcibus_attach_args *); 83 static int vrc4172pci_bus_maxdevs(pci_chipset_tag_t, int); 84 static int vrc4172pci_bus_devorder(pci_chipset_tag_t, int, uint8_t *, int); 85 static pcitag_t vrc4172pci_make_tag(pci_chipset_tag_t, int, int, int); 86 static void vrc4172pci_decompose_tag(pci_chipset_tag_t, pcitag_t, int *, 87 int *, int *); 88 static pcireg_t vrc4172pci_conf_read(pci_chipset_tag_t, pcitag_t, int); 89 static void vrc4172pci_conf_write(pci_chipset_tag_t, pcitag_t, int, 90 pcireg_t); 91 static int vrc4172pci_intr_map(const struct pci_attach_args *, 92 pci_intr_handle_t *); 93 static const char *vrc4172pci_intr_string(pci_chipset_tag_t,pci_intr_handle_t); 94 static const struct evcnt *vrc4172pci_intr_evcnt(pci_chipset_tag_t, 95 pci_intr_handle_t); 96 static void *vrc4172pci_intr_establish(pci_chipset_tag_t, 97 pci_intr_handle_t, int, int (*)(void *), void *); 98 static void vrc4172pci_intr_disestablish(pci_chipset_tag_t, void *); 99 #ifdef VRC4172PCI_MCR700_SUPPORT 100 #if 0 101 static int vrc4172pci_mcr700_intr(void *arg); 102 #endif 103 #endif 104 105 CFATTACH_DECL_NEW(vrc4172pci, sizeof(struct vrc4172pci_softc), 106 vrc4172pci_match, vrc4172pci_attach, NULL, NULL); 107 108 static inline void 109 vrc4172pci_write(struct vrc4172pci_softc *sc, int offset, u_int32_t val) 110 { 111 112 bus_space_write_4(sc->sc_iot, sc->sc_ioh, offset, val); 113 } 114 115 static inline u_int32_t 116 vrc4172pci_read(struct vrc4172pci_softc *sc, int offset) 117 { 118 u_int32_t res; 119 120 if (bus_space_peek(sc->sc_iot, sc->sc_ioh, offset, 4, &res) < 0) { 121 res = 0xffffffff; 122 } 123 124 return (res); 125 } 126 127 static int 128 vrc4172pci_match(device_t parent, cfdata_t match, void *aux) 129 { 130 131 return (1); 132 } 133 134 static void 135 vrc4172pci_attach(device_t parent, device_t self, void *aux) 136 { 137 struct vrc4172pci_softc *sc = device_private(self); 138 pci_chipset_tag_t pc = &sc->sc_pc; 139 struct vrip_attach_args *va = aux; 140 #if NPCI > 0 141 struct pcibus_attach_args pba; 142 #endif 143 144 sc->sc_dev = self; 145 sc->sc_iot = va->va_iot; 146 if (bus_space_map(sc->sc_iot, va->va_addr, va->va_size, 0, 147 &sc->sc_ioh)) { 148 printf(": couldn't map io space\n"); 149 return; 150 } 151 printf("\n"); 152 153 #ifdef VRC4172PCI_MCR700_SUPPORT 154 if (platid_match(&platid, &platid_mask_MACH_NEC_MCR_700) || 155 platid_match(&platid, &platid_mask_MACH_NEC_MCR_700A) || 156 platid_match(&platid, &platid_mask_MACH_NEC_MCR_730) || 157 platid_match(&platid, &platid_mask_MACH_NEC_MCR_730A)) { 158 /* power USB controller on MC-R700 */ 159 sc->sc_iochip = va->va_gpio_chips[VRIP_IOCHIP_VRGIU]; 160 hpcio_portwrite(sc->sc_iochip, 45, 1); 161 sc->sc_fake_baseaddr = 0x0afe0000; 162 #if 0 163 sc->sc_ih = hpcio_intr_establish(sc->sc_iochip, 1, 164 HPCIO_INTR_EDGE|HPCIO_INTR_HOLD, 165 vrc4172pci_mcr700_intr, sc); 166 #endif 167 } 168 #endif /* VRC4172PCI_MCR700_SUPPORT */ 169 170 pc->pc_dev = sc->sc_dev; 171 pc->pc_attach_hook = vrc4172pci_attach_hook; 172 pc->pc_bus_maxdevs = vrc4172pci_bus_maxdevs; 173 pc->pc_bus_devorder = vrc4172pci_bus_devorder; 174 pc->pc_make_tag = vrc4172pci_make_tag; 175 pc->pc_decompose_tag = vrc4172pci_decompose_tag; 176 pc->pc_conf_read = vrc4172pci_conf_read; 177 pc->pc_conf_write = vrc4172pci_conf_write; 178 pc->pc_intr_map = vrc4172pci_intr_map; 179 pc->pc_intr_string = vrc4172pci_intr_string; 180 pc->pc_intr_evcnt = vrc4172pci_intr_evcnt; 181 pc->pc_intr_establish = vrc4172pci_intr_establish; 182 pc->pc_intr_disestablish = vrc4172pci_intr_disestablish; 183 184 #if 0 185 { 186 int i; 187 188 for (i = 0; i < 2; i++) 189 printf("%s: ID_REG(0, 0, %d) = 0x%08x\n", 190 device_xname(self), i, 191 pci_conf_read(pc, pci_make_tag(pc, 0, 0, i), 192 PCI_ID_REG)); 193 } 194 #endif 195 196 #if NPCI > 0 197 memset(&pba, 0, sizeof(pba)); 198 pba.pba_iot = sc->sc_iot; 199 pba.pba_memt = sc->sc_iot; 200 pba.pba_dmat = &hpcmips_default_bus_dma_tag.bdt; 201 pba.pba_dmat64 = NULL; 202 pba.pba_bus = 0; 203 pba.pba_bridgetag = NULL; 204 pba.pba_flags = PCI_FLAGS_IO_OKAY | PCI_FLAGS_MEM_OKAY | 205 PCI_FLAGS_MRL_OKAY; 206 pba.pba_pc = pc; 207 208 config_found_ia(self, "pcibus", &pba, pcibusprint); 209 #endif 210 } 211 212 void 213 vrc4172pci_attach_hook(device_t parent, device_t self, 214 struct pcibus_attach_args *pba) 215 { 216 217 return; 218 } 219 220 int 221 vrc4172pci_bus_maxdevs(pci_chipset_tag_t pc, int busno) 222 { 223 224 return (1); /* Vrc4172 has only one device */ 225 } 226 227 int 228 vrc4172pci_bus_devorder(pci_chipset_tag_t pc, int busno, uint8_t *devs, 229 int maxdevs) 230 { 231 if (maxdevs <= 0) 232 return 0; 233 devs[0] = 0; 234 return 1; 235 } 236 237 pcitag_t 238 vrc4172pci_make_tag(pci_chipset_tag_t pc, int bus, int device, int function) 239 { 240 241 return ((bus << 16) | (device << 11) | (function << 8)); 242 } 243 244 void 245 vrc4172pci_decompose_tag(pci_chipset_tag_t pc, pcitag_t tag, int *bp, int *dp, 246 int *fp) 247 { 248 249 if (bp != NULL) 250 *bp = (tag >> 16) & 0xff; 251 if (dp != NULL) 252 *dp = (tag >> 11) & 0x1f; 253 if (fp != NULL) 254 *fp = (tag >> 8) & 0x07; 255 } 256 257 pcireg_t 258 vrc4172pci_conf_read(pci_chipset_tag_t pc, pcitag_t tag, int reg) 259 { 260 struct vrc4172pci_softc *sc = device_private(pc->pc_dev); 261 u_int32_t val; 262 263 #ifdef VRC4172PCI_MCR700_SUPPORT 264 if (sc->sc_fake_baseaddr != 0 && 265 tag == vrc4172pci_make_tag(pc, 0, 0, 1) && 266 reg == PCI_MAPREG_START) { 267 val = sc->sc_fake_baseaddr; 268 goto out; 269 } 270 #endif /* VRC4172PCI_MCR700_SUPPORT */ 271 272 tag |= VRC4172PCI_CONFADDR_CONFIGEN; 273 274 vrc4172pci_write(sc, VRC4172PCI_CONFAREG, tag | reg); 275 val = vrc4172pci_read(sc, VRC4172PCI_CONFDREG); 276 277 #ifdef VRC4172PCI_MCR700_SUPPORT 278 out: 279 #endif 280 DPRINTF(("%s: conf_read: tag = 0x%08x, reg = 0x%x, val = 0x%08x\n", 281 device_xname(sc->sc_dev), (u_int32_t)tag, reg, val)); 282 283 return (val); 284 } 285 286 void 287 vrc4172pci_conf_write(pci_chipset_tag_t pc, pcitag_t tag, int reg, 288 pcireg_t data) 289 { 290 struct vrc4172pci_softc *sc = device_private(pc->pc_dev); 291 292 DPRINTF(("%s: conf_write: tag = 0x%08x, reg = 0x%x, val = 0x%08x\n", 293 device_xname(sc->sc_dev), (u_int32_t)tag, reg, (u_int32_t)data)); 294 295 #ifdef VRC4172PCI_MCR700_SUPPORT 296 if (sc->sc_fake_baseaddr != 0 && 297 tag == vrc4172pci_make_tag(pc, 0, 0, 1) && 298 reg == PCI_MAPREG_START) { 299 sc->sc_fake_baseaddr = (data & 0xfffff000); 300 return; 301 } 302 #endif /* VRC4172PCI_MCR700_SUPPORT */ 303 304 tag |= VRC4172PCI_CONFADDR_CONFIGEN; 305 306 vrc4172pci_write(sc, VRC4172PCI_CONFAREG, tag | reg); 307 vrc4172pci_write(sc, VRC4172PCI_CONFDREG, data); 308 } 309 310 int 311 vrc4172pci_intr_map(const struct pci_attach_args *pa, pci_intr_handle_t *ihp) 312 { 313 pci_chipset_tag_t pc = pa->pa_pc; 314 pcitag_t intrtag = pa->pa_intrtag; 315 int bus, dev, func; 316 317 pci_decompose_tag(pc, intrtag, &bus, &dev, &func); 318 DPRINTF(("%s(%d, %d, %d): line = %d, pin = %d\n", device_xname(pc->pc_dev), 319 bus, dev, func, pa->pa_intrline, pa->pa_intrpin)); 320 321 *ihp = CONFIG_HOOK_PCIINTR_ID(bus, dev, func); 322 323 return (0); 324 } 325 326 const char * 327 vrc4172pci_intr_string(pci_chipset_tag_t pc, pci_intr_handle_t ih) 328 { 329 static char irqstr[sizeof("pciintr") + 16]; 330 331 snprintf(irqstr, sizeof(irqstr), "pciintr %d:%d:%d", 332 CONFIG_HOOK_PCIINTR_BUS((int)ih), 333 CONFIG_HOOK_PCIINTR_DEVICE((int)ih), 334 CONFIG_HOOK_PCIINTR_FUNCTION((int)ih)); 335 336 return (irqstr); 337 } 338 339 const struct evcnt * 340 vrc4172pci_intr_evcnt(pci_chipset_tag_t pc, pci_intr_handle_t ih) 341 { 342 343 return (NULL); 344 } 345 346 void * 347 vrc4172pci_intr_establish(pci_chipset_tag_t pc, pci_intr_handle_t ih, 348 int level, int (*func)(void *), void *arg) 349 { 350 351 if (ih == -1) 352 return (NULL); 353 DPRINTF(("vrc4172pci_intr_establish: %lx\n", ih)); 354 355 return (config_hook(CONFIG_HOOK_PCIINTR, ih, CONFIG_HOOK_EXCLUSIVE, 356 (int (*)(void *, int, long, void *))func, arg)); 357 } 358 359 void 360 vrc4172pci_intr_disestablish(pci_chipset_tag_t pc, void *cookie) 361 { 362 363 DPRINTF(("vrc4172pci_intr_disestablish: %p\n", cookie)); 364 config_unhook(cookie); 365 } 366 367 #ifdef VRC4172PCI_MCR700_SUPPORT 368 #if 0 369 int 370 vrc4172pci_mcr700_intr(void *arg) 371 { 372 struct vrc4172pci_softc *sc = arg; 373 374 hpcio_intr_clear(sc->sc_iochip, sc->sc_ih); 375 printf("USB port %s\n", hpcio_portread(sc->sc_iochip, 1) ? "ON" : "OFF"); 376 hpcio_portwrite(sc->sc_iochip, 45, hpcio_portread(sc->sc_iochip, 1)); 377 378 return (0); 379 } 380 #endif 381 #endif /* VRC4172PCI_MCR700_SUPPORT */ 382