1 /* $NetBSD: vr.c,v 1.55 2010/01/21 01:23:15 pooka Exp $ */ 2 3 /*- 4 * Copyright (c) 1999-2002 5 * Shin Takemura and PocketBSD Project. All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. All advertising materials mentioning features or use of this software 16 * must display the following acknowledgement: 17 * This product includes software developed by the PocketBSD project 18 * and its contributors. 19 * 4. Neither the name of the project nor the names of its contributors 20 * may be used to endorse or promote products derived from this software 21 * without specific prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 24 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 26 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 27 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 29 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 33 * SUCH DAMAGE. 34 * 35 */ 36 37 #include <sys/cdefs.h> 38 __KERNEL_RCSID(0, "$NetBSD: vr.c,v 1.55 2010/01/21 01:23:15 pooka Exp $"); 39 40 #include "opt_vr41xx.h" 41 #include "opt_tx39xx.h" 42 #include "opt_kgdb.h" 43 44 #include <sys/param.h> 45 #include <sys/systm.h> 46 #include <sys/reboot.h> 47 #include <sys/device.h> 48 #include <sys/bus.h> 49 50 #include <uvm/uvm_extern.h> 51 52 #include <machine/sysconf.h> 53 #include <machine/bootinfo.h> 54 #include <machine/bus_space_hpcmips.h> 55 #include <machine/platid.h> 56 #include <machine/platid_mask.h> 57 58 #include <dev/hpc/hpckbdvar.h> 59 60 #include <hpcmips/vr/vr.h> 61 #include <hpcmips/vr/vr_asm.h> 62 #include <hpcmips/vr/vrcpudef.h> 63 #include <hpcmips/vr/vripreg.h> 64 #include <hpcmips/vr/rtcreg.h> 65 66 #include <mips/cache.h> 67 68 #include "vrip_common.h" 69 #if NVRIP_COMMON > 0 70 #include <hpcmips/vr/vripvar.h> 71 #endif 72 73 #include "vrbcu.h" 74 #if NVRBCU > 0 75 #include <hpcmips/vr/bcuvar.h> 76 #endif 77 78 #include "vrdsu.h" 79 #if NVRDSU > 0 80 #include <hpcmips/vr/vrdsuvar.h> 81 #endif 82 83 #include "com.h" 84 #include "com_vrip.h" 85 #include "com_hpcio.h" 86 #if NCOM > 0 87 #include <sys/termios.h> 88 #include <sys/ttydefaults.h> 89 #include <dev/ic/comreg.h> 90 #include <dev/ic/comvar.h> 91 #if NCOM_VRIP > 0 92 #include <hpcmips/vr/siureg.h> 93 #include <hpcmips/vr/com_vripvar.h> 94 #endif 95 #if NCOM_HPCIO > 0 96 #include <hpcmips/dev/com_hpciovar.h> 97 #endif 98 #ifndef CONSPEED 99 #define CONSPEED TTYDEF_SPEED 100 #endif 101 #endif 102 103 #include "hpcfb.h" 104 #include "vrkiu.h" 105 #if (NVRKIU > 0) || (NHPCFB > 0) 106 #include <dev/wscons/wsdisplayvar.h> 107 #include <dev/rasops/rasops.h> 108 #endif 109 110 #if NHPCFB > 0 111 #include <dev/hpc/hpcfbvar.h> 112 #endif 113 114 #if NVRKIU > 0 115 #include <arch/hpcmips/vr/vrkiureg.h> 116 #include <arch/hpcmips/vr/vrkiuvar.h> 117 #endif 118 119 #ifdef DEBUG 120 #define STATIC 121 #else 122 #define STATIC static 123 #endif 124 125 /* 126 * This is a mask of bits to clear in the SR when we go to a 127 * given interrupt priority level. 128 */ 129 const u_int32_t __ipl_sr_bits_vr[_IPL_N] = { 130 0, /* IPL_NONE */ 131 132 MIPS_SOFT_INT_MASK_0, /* IPL_SOFTCLOCK */ 133 134 MIPS_SOFT_INT_MASK_0| 135 MIPS_SOFT_INT_MASK_1, /* IPL_SOFTNET */ 136 137 MIPS_SOFT_INT_MASK_0| 138 MIPS_SOFT_INT_MASK_1| 139 MIPS_INT_MASK_0, /* IPL_VM */ 140 141 MIPS_SOFT_INT_MASK_0| 142 MIPS_SOFT_INT_MASK_1| 143 MIPS_INT_MASK_0| 144 MIPS_INT_MASK_1, /* IPL_SCHED */ 145 }; 146 147 #if defined(VR41XX) && defined(TX39XX) 148 #define VR_INTR vr_intr 149 #else 150 #define VR_INTR cpu_intr /* locore_mips3 directly call this */ 151 #endif 152 153 void vr_init(void); 154 void VR_INTR(u_int32_t, u_int32_t, u_int32_t, u_int32_t); 155 extern void vr_idle(void); 156 STATIC void vr_cons_init(void); 157 STATIC void vr_fb_init(void **); 158 STATIC void vr_mem_init(paddr_t); 159 STATIC void vr_find_dram(paddr_t, paddr_t); 160 STATIC void vr_reboot(int, char *); 161 162 /* 163 * CPU interrupt dispatch table (HwInt[0:3]) 164 */ 165 STATIC int vr_null_handler(void *, u_int32_t, u_int32_t); 166 STATIC int (*vr_intr_handler[4])(void *, u_int32_t, u_int32_t) = 167 { 168 vr_null_handler, 169 vr_null_handler, 170 vr_null_handler, 171 vr_null_handler 172 }; 173 STATIC void *vr_intr_arg[4]; 174 175 #if NCOM > 0 176 /* 177 * machine dependent serial console info 178 */ 179 static struct vr_com_platdep { 180 platid_mask_t *platidmask; 181 int (*attach)(bus_space_tag_t, int, int, int, tcflag_t, int); 182 int addr; 183 int freq; 184 } platdep_com_table[] = { 185 #if NCOM_HPCIO > 0 186 { 187 &platid_mask_MACH_NEC_MCR_SIGMARION2, 188 com_hpcio_cndb_attach, /* attach proc */ 189 0x0b600000, /* base address */ 190 COM_FREQ, /* frequency */ 191 }, 192 #endif 193 #if NCOM_VRIP > 0 194 #ifdef VR4102 195 { 196 &platid_mask_CPU_MIPS_VR_4102, 197 com_vrip_cndb_attach, /* attach proc */ 198 VR4102_SIU_ADDR, /* base address */ 199 VRCOM_FREQ, /* frequency */ 200 }, 201 #endif /* VR4102 */ 202 #ifdef VR4111 203 { 204 &platid_mask_CPU_MIPS_VR_4111, 205 com_vrip_cndb_attach, /* attach proc */ 206 VR4102_SIU_ADDR, /* base address */ 207 VRCOM_FREQ, /* frequency */ 208 }, 209 #endif /* VR4111 */ 210 #ifdef VR4121 211 { 212 &platid_mask_CPU_MIPS_VR_4121, 213 com_vrip_cndb_attach, /* attach proc */ 214 VR4102_SIU_ADDR, /* base address */ 215 VRCOM_FREQ, /* frequency */ 216 }, 217 #endif /* VR4121 */ 218 #ifdef VR4122 219 { 220 &platid_mask_CPU_MIPS_VR_4122, 221 com_vrip_cndb_attach, /* attach proc */ 222 VR4122_SIU_ADDR, /* base address */ 223 VRCOM_FREQ, /* frequency */ 224 }, 225 #endif /* VR4122 */ 226 #ifdef VR4131 227 { 228 &platid_mask_CPU_MIPS_VR_4122, 229 com_vrip_cndb_attach, /* attach proc */ 230 VR4122_SIU_ADDR, /* base address */ 231 VRCOM_FREQ, /* frequency */ 232 }, 233 #endif /* VR4131 */ 234 #ifdef SINGLE_VRIP_BASE 235 { 236 &platid_wild, 237 com_vrip_cndb_attach, /* attach proc */ 238 VRIP_SIU_ADDR, /* base address */ 239 VRCOM_FREQ, /* frequency */ 240 }, 241 #endif /* SINGLE_VRIP_BASE */ 242 #else /* NCOM_VRIP > 0 */ 243 /* dummy */ 244 { 245 &platid_wild, 246 NULL, /* attach proc */ 247 0, /* base address */ 248 0, /* frequency */ 249 }, 250 #endif /* NCOM_VRIP > 0 */ 251 }; 252 #endif /* NCOM > 0 */ 253 254 #if NVRKIU > 0 255 /* 256 * machine dependent keyboard info 257 */ 258 static struct vr_kiu_platdep { 259 platid_mask_t *platidmask; 260 int addr; 261 } platdep_kiu_table[] = { 262 #ifdef VR4102 263 { 264 &platid_mask_CPU_MIPS_VR_4102, 265 VR4102_KIU_ADDR, /* base address */ 266 }, 267 #endif /* VR4102 */ 268 #ifdef VR4111 269 { 270 &platid_mask_CPU_MIPS_VR_4111, 271 VR4102_KIU_ADDR, /* base address */ 272 }, 273 #endif /* VR4111 */ 274 #ifdef VR4121 275 { 276 &platid_mask_CPU_MIPS_VR_4121, 277 VR4102_KIU_ADDR, /* base address */ 278 }, 279 #endif /* VR4121 */ 280 { 281 &platid_wild, 282 #ifdef SINGLE_VRIP_BASE 283 VRIP_KIU_ADDR, /* base address */ 284 #else 285 VRIP_NO_ADDR, /* base address */ 286 #endif /* SINGLE_VRIP_BASE */ 287 }, 288 }; 289 #endif /* NVRKIU > 0 */ 290 291 void 292 vr_init(void) 293 { 294 /* 295 * Platform Specific Function Hooks 296 */ 297 platform.cpu_idle = vr_idle; 298 platform.cpu_intr = VR_INTR; 299 platform.cons_init = vr_cons_init; 300 platform.fb_init = vr_fb_init; 301 platform.mem_init = vr_mem_init; 302 platform.reboot = vr_reboot; 303 304 #if NVRBCU > 0 305 sprintf(hpcmips_cpuname, "NEC %s rev%d.%d %d.%03dMHz", 306 vrbcu_vrip_getcpuname(), 307 vrbcu_vrip_getcpumajor(), 308 vrbcu_vrip_getcpuminor(), 309 vrbcu_vrip_getcpuclock() / 1000000, 310 (vrbcu_vrip_getcpuclock() % 1000000) / 1000); 311 #else 312 sprintf(hpcmips_cpuname, "NEC VR41xx"); 313 #endif 314 } 315 316 void 317 vr_mem_init(paddr_t kernend) 318 { 319 320 mem_clusters[0].start = 0; 321 mem_clusters[0].size = kernend; 322 mem_cluster_cnt = 1; 323 324 vr_find_dram(kernend, 0x02000000); 325 vr_find_dram(0x02000000, 0x04000000); 326 vr_find_dram(0x04000000, 0x06000000); 327 vr_find_dram(0x06000000, 0x08000000); 328 } 329 330 void 331 vr_find_dram(paddr_t addr, paddr_t end) 332 { 333 int n; 334 char *page; 335 #ifdef NARLY_MEMORY_PROBE 336 int x, i; 337 #endif 338 339 #ifdef VR_FIND_DRAMLIM 340 if (VR_FIND_DRAMLIM < end) 341 end = VR_FIND_DRAMLIM; 342 #endif /* VR_FIND_DRAMLIM */ 343 n = mem_cluster_cnt; 344 for (; addr < end; addr += PAGE_SIZE) { 345 346 page = (char *)MIPS_PHYS_TO_KSEG1(addr); 347 if (badaddr(page, 4)) 348 goto bad; 349 350 /* stop memory probing at first memory image */ 351 if (memcmp(page, (void *)MIPS_PHYS_TO_KSEG0(0), 128) == 0) 352 return; 353 354 *(volatile int *)(page+0) = 0xa5a5a5a5; 355 *(volatile int *)(page+4) = 0x5a5a5a5a; 356 wbflush(); 357 if (*(volatile int *)(page+0) != 0xa5a5a5a5) 358 goto bad; 359 360 *(volatile int *)(page+0) = 0x5a5a5a5a; 361 *(volatile int *)(page+4) = 0xa5a5a5a5; 362 wbflush(); 363 if (*(volatile int *)(page+0) != 0x5a5a5a5a) 364 goto bad; 365 366 #ifdef NARLY_MEMORY_PROBE 367 x = random(); 368 for (i = 0; i < PAGE_SIZE; i += 4) 369 *(volatile int *)(page+i) = (x ^ i); 370 wbflush(); 371 for (i = 0; i < PAGE_SIZE; i += 4) 372 if (*(volatile int *)(page+i) != (x ^ i)) 373 goto bad; 374 375 x = random(); 376 for (i = 0; i < PAGE_SIZE; i += 4) 377 *(volatile int *)(page+i) = (x ^ i); 378 wbflush(); 379 for (i = 0; i < PAGE_SIZE; i += 4) 380 if (*(volatile int *)(page+i) != (x ^ i)) 381 goto bad; 382 #endif /* NARLY_MEMORY_PROBE */ 383 384 if (!mem_clusters[n].size) 385 mem_clusters[n].start = addr; 386 mem_clusters[n].size += PAGE_SIZE; 387 continue; 388 389 bad: 390 if (mem_clusters[n].size) 391 ++n; 392 continue; 393 } 394 if (mem_clusters[n].size) 395 ++n; 396 mem_cluster_cnt = n; 397 } 398 399 void 400 vr_fb_init(void **kernend) 401 { 402 /* Nothing to do */ 403 } 404 405 void 406 vr_cons_init(void) 407 { 408 #if NCOM > 0 || NHPCFB > 0 || NVRKIU > 0 409 bus_space_tag_t iot = hpcmips_system_bus_space(); 410 #endif 411 #if NCOM > 0 412 static struct vr_com_platdep *com_info; 413 #endif 414 #if NVRKIU > 0 415 static struct vr_kiu_platdep *kiu_info; 416 #endif 417 418 #if NCOM > 0 419 com_info = platid_search(&platid, platdep_com_table, 420 sizeof(platdep_com_table)/sizeof(*platdep_com_table), 421 sizeof(*platdep_com_table)); 422 #ifdef KGDB 423 if (com_info->attach != NULL) { 424 /* if KGDB is defined, always use the serial port for KGDB */ 425 if ((*com_info->attach)(iot, com_info->addr, 9600, 426 com_info->freq, 427 (TTYDEF_CFLAG & ~(CSIZE | PARENB)) | CS8, 1)) { 428 printf("%s(%d): can't init kgdb's serial port", 429 __FILE__, __LINE__); 430 } 431 } 432 #else /* KGDB */ 433 if (com_info->attach != NULL && (bootinfo->bi_cnuse&BI_CNUSE_SERIAL)) { 434 /* Serial console */ 435 if ((*com_info->attach)(iot, com_info->addr, CONSPEED, 436 com_info->freq, 437 (TTYDEF_CFLAG & ~(CSIZE | PARENB)) | CS8, 0)) { 438 printf("%s(%d): can't init serial console", 439 __FILE__, __LINE__); 440 } else { 441 return; 442 } 443 } 444 #endif /* KGDB */ 445 #endif /* NCOM > 0 */ 446 447 #if NHPCFB > 0 448 if (hpcfb_cnattach(NULL)) { 449 printf("%s(%d): can't init fb console", __FILE__, __LINE__); 450 } else { 451 goto find_keyboard; 452 } 453 find_keyboard: 454 #endif /* NHPCFB > 0 */ 455 456 #if NVRKIU > 0 457 kiu_info = platid_search(&platid, platdep_kiu_table, 458 sizeof(platdep_kiu_table)/sizeof(*platdep_kiu_table), 459 sizeof(*platdep_kiu_table)); 460 if (kiu_info->addr != VRIP_NO_ADDR) { 461 if (vrkiu_cnattach(iot, kiu_info->addr)) { 462 printf("%s(%d): can't init vrkiu as console", 463 __FILE__, __LINE__); 464 } else { 465 return; 466 } 467 } 468 #endif /* NVRKIU > 0 */ 469 } 470 471 extern char vr_hibernate[]; 472 extern char evr_hibernate[]; 473 474 void 475 vr_reboot(int howto, char *bootstr) 476 { 477 /* 478 * power down 479 */ 480 if ((howto & RB_POWERDOWN) == RB_POWERDOWN) { 481 printf("fake powerdown\n"); 482 /* 483 * copy vr_hibernate() to top of physical memory. 484 */ 485 memcpy((void *)MIPS_KSEG0_START, vr_hibernate, 486 evr_hibernate - (char *)vr_hibernate); 487 /* sync I&D cache */ 488 mips_dcache_wbinv_all(); 489 mips_icache_sync_all(); 490 /* 491 * call vr_hibernate() at MIPS_KSEG0_START. 492 */ 493 ((void (*)(void *,int))MIPS_KSEG0_START)( 494 (void *)MIPS_KSEG0_START, ptoa(physmem)); 495 /* not reach */ 496 vr_reboot(howto&~RB_HALT, bootstr); 497 } 498 /* 499 * halt 500 */ 501 if (howto & RB_HALT) { 502 #if NVRIP_COMMON > 0 503 _spllower(~MIPS_INT_MASK_0); 504 vrip_intr_suspend(); 505 #else 506 splhigh(); 507 #endif 508 __asm(".set noreorder"); 509 __asm(".word " ___STRING(VR_OPCODE_SUSPEND)); 510 __asm("nop"); 511 __asm("nop"); 512 __asm("nop"); 513 __asm("nop"); 514 __asm("nop"); 515 __asm(".set reorder"); 516 #if NVRIP_COMMON > 0 517 vrip_intr_resume(); 518 #endif 519 } 520 /* 521 * reset 522 */ 523 #if NVRDSU 524 vrdsu_reset(); 525 #else 526 printf("%s(%d): There is no DSU.", __FILE__, __LINE__); 527 #endif 528 } 529 530 /* 531 * Handle interrupts. 532 */ 533 void 534 VR_INTR(u_int32_t status, u_int32_t cause, u_int32_t pc, u_int32_t ipending) 535 { 536 struct cpu_info *ci; 537 538 ci = curcpu(); 539 ci->ci_idepth++; 540 uvmexp.intrs++; 541 542 /* Deal with unneded compare interrupts occasionally so that we can 543 * keep spllowersoftclock. */ 544 if (ipending & MIPS_INT_MASK_5) { 545 mips3_cp0_compare_write(0); 546 } 547 548 if (ipending & MIPS_INT_MASK_1) { 549 _splset(MIPS_SR_INT_IE); /* for spllowersoftclock */ 550 /* Remove the lower priority pending bits from status so that 551 * spllowersoftclock will not happen if other interrupts are 552 * pending. */ 553 (*vr_intr_handler[1])(vr_intr_arg[1], pc, status & ~(ipending 554 & (MIPS_INT_MASK_0|MIPS_SOFT_INT_MASK_0|MIPS_SOFT_INT_MASK_1))); 555 } 556 557 if (ipending & MIPS_INT_MASK_0) { 558 _splset(MIPS_INT_MASK_1|MIPS_SR_INT_IE); 559 (*vr_intr_handler[0])(vr_intr_arg[0], pc, status); 560 } 561 ci->ci_idepth--; 562 563 #ifdef __HAVE_FAST_SOFTINTS 564 if (ipending & MIPS_SOFT_INT_MASK_1) { 565 _splset(MIPS_INT_MASK_1|MIPS_INT_MASK_0|MIPS_SR_INT_IE); 566 softintr(MIPS_SOFT_INT_MASK_1); 567 } 568 569 if (ipending & MIPS_SOFT_INT_MASK_0) { 570 _splset(MIPS_SOFT_INT_MASK_1|MIPS_INT_MASK_1|MIPS_INT_MASK_0| 571 MIPS_SR_INT_IE); 572 softintr(MIPS_SOFT_INT_MASK_0); 573 } 574 #endif 575 } 576 577 void * 578 vr_intr_establish(int line, int (*ih_fun)(void *, u_int32_t, u_int32_t), 579 void *ih_arg) 580 { 581 582 KDASSERT(vr_intr_handler[line] == vr_null_handler); 583 584 vr_intr_handler[line] = ih_fun; 585 vr_intr_arg[line] = ih_arg; 586 587 return ((void *)line); 588 } 589 590 void 591 vr_intr_disestablish(void *ih) 592 { 593 int line = (int)ih; 594 595 vr_intr_handler[line] = vr_null_handler; 596 vr_intr_arg[line] = NULL; 597 } 598 599 int 600 vr_null_handler(void *arg, u_int32_t pc, u_int32_t status) 601 { 602 603 printf("vr_null_handler\n"); 604 605 return (0); 606 } 607 608 /* 609 int x4181 = VR4181; 610 int x4101 = VR4101; 611 int x4102 = VR4102; 612 int x4111 = VR4111; 613 int x4121 = VR4121; 614 int x4122 = VR4122; 615 int xo4181 = ONLY_VR4181; 616 int xo4101 = ONLY_VR4101; 617 int xo4102 = ONLY_VR4102; 618 int xo4111_4121 = ONLY_VR4111_4121; 619 int g4101=VRGROUP_4101; 620 int g4102=VRGROUP_4102; 621 int g4181=VRGROUP_4181; 622 int g4102_4121=VRGROUP_4102_4121; 623 int g4111_4121=VRGROUP_4111_4121; 624 int g4102_4122=VRGROUP_4102_4122; 625 int g4111_4122=VRGROUP_4111_4122; 626 int single_vrip_base=SINGLE_VRIP_BASE; 627 int vrip_base_addr=VRIP_BASE_ADDR; 628 */ 629