xref: /netbsd-src/sys/arch/hpcmips/vr/vr.c (revision 3b01aba77a7a698587faaae455bbfe740923c1f5)
1 /*	$NetBSD: vr.c,v 1.26 2001/06/11 06:11:01 enami Exp $	*/
2 
3 /*-
4  * Copyright (c) 1999
5  *         Shin Takemura and PocketBSD Project. All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  * 3. All advertising materials mentioning features or use of this software
16  *    must display the following acknowledgement:
17  *	This product includes software developed by the PocketBSD project
18  *	and its contributors.
19  * 4. Neither the name of the project nor the names of its contributors
20  *    may be used to endorse or promote products derived from this software
21  *    without specific prior written permission.
22  *
23  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
24  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
25  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
26  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
27  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
28  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
29  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
30  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
31  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
32  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33  * SUCH DAMAGE.
34  *
35  */
36 #include "opt_kgdb.h"
37 
38 #include <sys/param.h>
39 #include <sys/types.h>
40 #include <sys/systm.h>
41 #include <sys/device.h>
42 #include <sys/reboot.h>
43 #include <sys/kcore.h>
44 
45 #include <machine/cpu.h>
46 #include <machine/intr.h>
47 #include <machine/reg.h>
48 #include <machine/psl.h>
49 #include <machine/locore.h>
50 #include <machine/sysconf.h>
51 #include <machine/bus.h>
52 #include <machine/autoconf.h>
53 
54 #include <mips/mips_param.h>		/* hokey spl()s */
55 #include <mips/mips/mips_mcclock.h>	/* mcclock CPUspeed estimation */
56 
57 #include <dev/hpc/hpckbdvar.h>
58 
59 #include "opt_vr41xx.h"
60 #include <hpcmips/vr/vr.h>
61 #include <hpcmips/vr/vr_asm.h>
62 #include <hpcmips/vr/vrcpudef.h>
63 #include <hpcmips/vr/vripreg.h>
64 #include <hpcmips/vr/rtcreg.h>
65 #include <hpcmips/hpcmips/machdep.h>	/* cpu_name */
66 #include <machine/bootinfo.h>
67 
68 #include "vrip.h"
69 #if NVRIP > 0
70 #include <hpcmips/vr/vripvar.h>
71 #endif
72 
73 #include "vrbcu.h"
74 #if NVRBCU > 0
75 #include <hpcmips/vr/bcuvar.h>
76 #endif
77 
78 #include "vrdsu.h"
79 #if NVRDSU > 0
80 #include <hpcmips/vr/vrdsuvar.h>
81 #endif
82 
83 #include "com.h"
84 #if NCOM > 0
85 #include <sys/termios.h>
86 #include <sys/ttydefaults.h>
87 #include <dev/ic/comreg.h>
88 #include <dev/ic/comvar.h>
89 #include <hpcmips/vr/siureg.h>
90 #include <hpcmips/vr/com_vripvar.h>
91 #ifndef CONSPEED
92 #define CONSPEED TTYDEF_SPEED
93 #endif
94 #endif
95 
96 #include "hpcfb.h"
97 #include "vrkiu.h"
98 #if (NVRKIU > 0) || (NHPCFB > 0)
99 #include <dev/wscons/wsdisplayvar.h>
100 #include <dev/rasops/rasops.h>
101 #endif
102 
103 #if NHPCFB > 0
104 #include <dev/hpc/hpcfbvar.h>
105 #endif
106 
107 #if NVRKIU > 0
108 #include <arch/hpcmips/vr/vrkiureg.h>
109 #include <arch/hpcmips/vr/vrkiuvar.h>
110 #endif
111 
112 void	vr_init __P((void));
113 void	vr_os_init __P((void));
114 void	vr_bus_reset __P((void));
115 int	vr_intr __P((u_int32_t, u_int32_t, u_int32_t, u_int32_t));
116 void	vr_cons_init __P((void));
117 void	vr_device_register __P((struct device *, void *));
118 void    vr_fb_init __P((caddr_t*));
119 void    vr_mem_init __P((paddr_t));
120 void	vr_find_dram __P((paddr_t, paddr_t));
121 void	vr_reboot __P((int howto, char *bootstr));
122 
123 extern unsigned nullclkread __P((void));
124 extern unsigned (*clkread) __P((void));
125 
126 /*
127  * CPU interrupt dispatch table (HwInt[0:3])
128  */
129 int null_handler __P((void*, u_int32_t, u_int32_t));
130 static int (*intr_handler[4]) __P((void*, u_int32_t, u_int32_t)) =
131 {
132 	null_handler,
133 	null_handler,
134 	null_handler,
135 	null_handler
136 };
137 static void *intr_arg[4];
138 
139 extern phys_ram_seg_t mem_clusters[];
140 extern int mem_cluster_cnt;
141 
142 void
143 vr_init()
144 {
145 	/*
146 	 * Platform Information.
147 	 */
148 
149 	/*
150 	 * Platform Specific Function Hooks
151 	 */
152 	platform.os_init = vr_os_init;
153 	platform.iointr = vr_intr;
154 	platform.bus_reset = vr_bus_reset;
155 	platform.cons_init = vr_cons_init;
156 	platform.device_register = vr_device_register;
157 	platform.fb_init = vr_fb_init;
158 	platform.mem_init = vr_mem_init;
159 	platform.reboot = vr_reboot;
160 
161 #if NVRBCU > 0
162 	sprintf(cpu_name, "NEC %s rev%d.%d %d.%03dMHz",
163 		vrbcu_vrip_getcpuname(),
164 		vrbcu_vrip_getcpumajor(),
165 		vrbcu_vrip_getcpuminor(),
166 		vrbcu_vrip_getcpuclock() / 1000000,
167 		(vrbcu_vrip_getcpuclock() % 1000000) / 1000);
168 #else
169 	sprintf(cpu_name, "NEC VR41xx");
170 #endif
171 }
172 
173 void
174 vr_mem_init(kernend)
175 	paddr_t kernend;
176 {
177 
178 	mem_clusters[0].start = 0;
179 	mem_clusters[0].size = kernend;
180 	mem_cluster_cnt = 1;
181 
182 	vr_find_dram(kernend, 0x02000000);
183 	vr_find_dram(0x02000000, 0x04000000);
184 	vr_find_dram(0x04000000, 0x06000000);
185 	vr_find_dram(0x06000000, 0x08000000);
186 
187 	/* Clear currently unused D-RAM area (For reboot Windows CE clearly)*/
188 	memset((void *)(KERNBASE + 0x400), 0, KERNTEXTOFF - (KERNBASE + 0x800));
189 }
190 
191 void
192 vr_find_dram(addr, end)
193 	paddr_t addr, end;
194 {
195 	int n;
196 	caddr_t page;
197 #ifdef NARLY_MEMORY_PROBE
198 	int x, i;
199 #endif
200 
201 #ifdef VR_FIND_DRAMLIM
202 	if (VR_FIND_DRAMLIM < end)
203 		end = VR_FIND_DRAMLIM;
204 #endif
205 	n = mem_cluster_cnt;
206 	for (; addr < end; addr += NBPG) {
207 
208 		page = (void *)MIPS_PHYS_TO_KSEG1(addr);
209 		if (badaddr(page, 4))
210 			goto bad;
211 
212 		/* stop memory probing at first memory image */
213 		if (bcmp(page, (void *)MIPS_PHYS_TO_KSEG0(0), 128) == 0)
214 			return;
215 
216 		*(volatile int *)(page+0) = 0xa5a5a5a5;
217 		*(volatile int *)(page+4) = 0x5a5a5a5a;
218 		wbflush();
219 		if (*(volatile int *)(page+0) != 0xa5a5a5a5)
220 			goto bad;
221 
222 		*(volatile int *)(page+0) = 0x5a5a5a5a;
223 		*(volatile int *)(page+4) = 0xa5a5a5a5;
224 		wbflush();
225 		if (*(volatile int *)(page+0) != 0x5a5a5a5a)
226 			goto bad;
227 
228 #ifdef NARLY_MEMORY_PROBE
229 		x = random();
230 		for (i = 0; i < NBPG; i += 4)
231 			*(volatile int *)(page+i) = (x ^ i);
232 		wbflush();
233 		for (i = 0; i < NBPG; i += 4)
234 			if (*(volatile int *)(page+i) != (x ^ i))
235 				goto bad;
236 
237 		x = random();
238 		for (i = 0; i < NBPG; i += 4)
239 			*(volatile int *)(page+i) = (x ^ i);
240 		wbflush();
241 		for (i = 0; i < NBPG; i += 4)
242 			if (*(volatile int *)(page+i) != (x ^ i))
243 				goto bad;
244 #endif
245 
246 		if (!mem_clusters[n].size)
247 			mem_clusters[n].start = addr;
248 		mem_clusters[n].size += NBPG;
249 		continue;
250 
251 	bad:
252 		if (mem_clusters[n].size)
253 			++n;
254 		continue;
255 	}
256 	if (mem_clusters[n].size)
257 		++n;
258 	mem_cluster_cnt = n;
259 }
260 
261 void
262 vr_fb_init(kernend)
263 	caddr_t *kernend;
264 {
265 	/* Nothing to do */
266 }
267 
268 void
269 vr_os_init()
270 {
271 	/*
272 	 * Set up interrupt handling and I/O addresses.
273 	 */
274 
275 	splvec.splbio = MIPS_SPL0;
276 	splvec.splnet = MIPS_SPL0;
277 	splvec.spltty = MIPS_SPL0;
278 	splvec.splvm = MIPS_SPL0;
279 	splvec.splclock = MIPS_SPL_0_1;
280 	splvec.splstatclock = MIPS_SPL_0_1;
281 
282 	/* no high resolution timer circuit; possibly never called */
283 	clkread = nullclkread;
284 
285 #ifdef NOT_YET
286 	mcclock_addr = (volatile struct chiptime *)
287 		MIPS_PHYS_TO_KSEG1(Vr_SYS_CLOCK);
288 	mc_cpuspeed(mcclock_addr, MIPS_INT_MASK_1);
289 #else
290 	printf("%s(%d): cpuspeed estimation is notimplemented\n",
291 	       __FILE__, __LINE__);
292 #endif
293 #ifdef HPCMIPS_L1CACHE_DISABLE
294 	cpuspeed = 1;	/* XXX, CPU is very very slow because L1 cache is */
295 	/* disabled. */
296 #endif /*  HPCMIPS_L1CAHCE_DISABLE */
297 }
298 
299 
300 /*
301  * Initalize the memory system and I/O buses.
302  */
303 void
304 vr_bus_reset()
305 {
306 	printf("%s(%d): vr_bus_reset() not implemented.\n",
307 	       __FILE__, __LINE__);
308 }
309 
310 void
311 vr_cons_init()
312 {
313 #if NCOM > 0 || NHPCFB > 0 || NVRKIU > 0
314 	extern bus_space_tag_t system_bus_iot;
315 	extern bus_space_tag_t mb_bus_space_init __P((void));
316 
317 	/*
318 	 * At this time, system_bus_iot is not initialized yet.
319 	 * Just initialize it here.
320 	 */
321 	mb_bus_space_init();
322 #endif
323 
324 #if NCOM > 0
325 #ifdef KGDB
326 	/* if KGDB is defined, always use the serial port for KGDB */
327 	if (com_vrip_cndb_attach(system_bus_iot, VRIP_SIU_ADDR, 9600,
328 	    VRCOM_FREQ, (TTYDEF_CFLAG & ~(CSIZE | PARENB)) | CS8, 1)) {
329 		printf("%s(%d): can't init kgdb's serial port",
330 		    __FILE__, __LINE__);
331 	}
332 #else
333 	if (bootinfo->bi_cnuse & BI_CNUSE_SERIAL) {
334 		/* Serial console */
335 		if (com_vrip_cndb_attach(system_bus_iot,
336 		    VRIP_SIU_ADDR, CONSPEED, VRCOM_FREQ,
337 		    (TTYDEF_CFLAG & ~(CSIZE | PARENB)) | CS8, 0)) {
338 			printf("%s(%d): can't init serial console",
339 			    __FILE__, __LINE__);
340 		} else {
341 			return;
342 		}
343 	}
344 #endif
345 #endif
346 
347 #if NHPCFB > 0
348 	if (hpcfb_cnattach(NULL)) {
349 		printf("%s(%d): can't init fb console", __FILE__, __LINE__);
350 	} else {
351 		goto find_keyboard;
352 	}
353  find_keyboard:
354 #endif
355 
356 #if NVRKIU > 0 && VRIP_KIU_ADDR != VRIP_NO_ADDR
357 	if (vrkiu_cnattach(system_bus_iot, VRIP_KIU_ADDR)) {
358 		printf("%s(%d): can't init vrkiu as console",
359 		       __FILE__, __LINE__);
360 	} else {
361 		return;
362 	}
363 #endif
364 }
365 
366 void
367 vr_device_register(dev, aux)
368 	struct device *dev;
369 	void *aux;
370 {
371 	printf("%s(%d): vr_device_register() not implemented.\n",
372 	       __FILE__, __LINE__);
373 	panic("abort");
374 }
375 
376 void
377 vr_reboot(howto, bootstr)
378 	int howto;
379 	char *bootstr;
380 {
381 	/*
382 	 * power down
383 	 */
384 	if ((howto & RB_POWERDOWN) == RB_POWERDOWN) {
385 		printf("fake powerdown\n");
386 		__asm(__CONCAT(".word	",___STRING(VR_OPCODE_HIBERNATE)));
387 		__asm("nop");
388 		__asm("nop");
389 		__asm("nop");
390 		__asm("nop");
391 		__asm("nop");
392 		__asm(".set reorder");
393 		/* not reach */
394 		vr_reboot(howto&~RB_HALT, bootstr);
395 	}
396 	/*
397 	 * halt
398 	 */
399 	if (howto & RB_HALT) {
400 #if NVRIP > 0
401 		_spllower(~MIPS_INT_MASK_0);
402 		vrip_intr_suspend();
403 #else
404 		splhigh();
405 #endif
406 		__asm(".set noreorder");
407 		__asm(__CONCAT(".word	",___STRING(VR_OPCODE_SUSPEND)));
408 		__asm("nop");
409 		__asm("nop");
410 		__asm("nop");
411 		__asm("nop");
412 		__asm("nop");
413 		__asm(".set reorder");
414 #if NVRIP > 0
415 		vrip_intr_resume();
416 #endif
417 	}
418 	/*
419 	 * reset
420 	 */
421 #if NVRDSU
422 	vrdsu_reset();
423 #else
424 	printf("%s(%d): There is no DSU.", __FILE__, __LINE__);
425 #endif
426 }
427 
428 void *
429 vr_intr_establish(line, ih_fun, ih_arg)
430 	int line;
431 	int (*ih_fun) __P((void*, u_int32_t, u_int32_t));
432 	void *ih_arg;
433 {
434 	if (intr_handler[line] != null_handler) {
435 		panic("vr_intr_establish: can't establish duplicated intr handler.");
436 	}
437 	intr_handler[line] = ih_fun;
438 	intr_arg[line] = ih_arg;
439 
440 	return (void*)line;
441 }
442 
443 
444 void
445 vr_intr_disestablish(ih)
446 	void *ih;
447 {
448 	int line = (int)ih;
449 	intr_handler[line] = null_handler;
450 	intr_arg[line] = NULL;
451 }
452 
453 int
454 null_handler(arg, pc, statusReg)
455 	void *arg;
456 	u_int32_t pc;
457 	u_int32_t statusReg;
458 {
459 	printf("null_handler\n");
460 	return 0;
461 }
462 
463 /*
464  * Handle interrupts.
465  */
466 int
467 vr_intr(status, cause, pc, ipending)
468 	u_int32_t status, cause, pc, ipending;
469 {
470 	int hwintr;
471 
472 	hwintr = (ffs(ipending >> 10) -1) & 0x3;
473 	(*intr_handler[hwintr])(intr_arg[hwintr], pc, status);
474 
475 	return (MIPS_SR_INT_IE | (status & ~cause & MIPS_HARD_INT_MASK));
476 }
477 
478 
479 /*
480 int x4181 = VR4181;
481 int x4101 = VR4101;
482 int x4102 = VR4102;
483 int x4111 = VR4111;
484 int x4121 = VR4121;
485 int x4122 = VR4122;
486 int xo4181 = ONLY_VR4181;
487 int xo4101 = ONLY_VR4101;
488 int xo4102 = ONLY_VR4102;
489 int xo4111_4121 = ONLY_VR4111_4121;
490 int g4101=VRGROUP_4101;
491 int g4102=VRGROUP_4102;
492 int g4181=VRGROUP_4181;
493 int g4102_4121=VRGROUP_4102_4121;
494 int g4111_4121=VRGROUP_4111_4121;
495 int g4102_4122=VRGROUP_4102_4122;
496 int g4111_4122=VRGROUP_4111_4122;
497 int single_vrip_base=SINGLE_VRIP_BASE;
498 int vrip_base_addr=VRIP_BASE_ADDR;
499 */
500