1 /* $NetBSD: txcom.c,v 1.28 2006/03/07 23:19:05 he Exp $ */ 2 3 /*- 4 * Copyright (c) 1999, 2000, 2004 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by UCHIYAMA Yasushi. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #include <sys/cdefs.h> 40 __KERNEL_RCSID(0, "$NetBSD: txcom.c,v 1.28 2006/03/07 23:19:05 he Exp $"); 41 42 #include "opt_tx39uart_debug.h" 43 44 #include <sys/param.h> 45 #include <sys/systm.h> 46 #include <sys/kernel.h> 47 #include <sys/device.h> 48 #include <sys/malloc.h> 49 50 #include <sys/proc.h> /* tsleep/wakeup */ 51 52 #include <sys/ioctl.h> 53 #include <sys/select.h> 54 #include <sys/file.h> 55 56 #include <sys/tty.h> 57 #include <sys/conf.h> 58 #include <dev/cons.h> /* consdev */ 59 60 #include <machine/bus.h> 61 #include <machine/config_hook.h> 62 63 #include <hpcmips/tx/tx39var.h> 64 #include <hpcmips/tx/tx39icureg.h> 65 #include <hpcmips/tx/tx39uartvar.h> 66 #include <hpcmips/tx/tx39uartreg.h> 67 68 #include <hpcmips/tx/tx39irvar.h> 69 70 #include <hpcmips/tx/tx39clockreg.h> /* XXX */ 71 72 /* 73 * UARTA channel has DTR, DSR, RTS, CTS lines. and they wired to MFIO/IO port. 74 */ 75 #define IS_COM0(s) ((s) == 0) 76 #define IS_COM1(s) ((s) == 1) 77 #define ON ((void *)1) 78 #define OFF ((void *)0) 79 80 #ifdef TX39UART_DEBUG 81 #define DPRINTF_ENABLE 82 #define DPRINTF_DEBUG tx39uart_debug 83 #endif 84 #include <machine/debug.h> 85 86 #define TXCOM_HW_CONSOLE 0x40 87 #define TXCOM_RING_SIZE 256 /* must be a power of two! */ 88 #define TXCOM_RING_MASK (TXCOM_RING_SIZE - 1) 89 90 struct txcom_chip { 91 tx_chipset_tag_t sc_tc; 92 int sc_slot; /* UARTA or UARTB */ 93 int sc_cflag; 94 int sc_speed; 95 int sc_swflags; 96 int sc_hwflags; 97 98 int sc_dcd; 99 int sc_msr_cts; 100 int sc_tx_stopped; 101 }; 102 103 struct txcom_softc { 104 struct device sc_dev; 105 struct tty *sc_tty; 106 struct txcom_chip *sc_chip; 107 108 struct callout sc_txsoft_ch; 109 struct callout sc_rxsoft_ch; 110 111 u_int8_t *sc_tba; /* transmit buffer address */ 112 int sc_tbc; /* transmit byte count */ 113 int sc_heldtbc; 114 u_int8_t *sc_rbuf; /* receive buffer address */ 115 int sc_rbput; /* receive byte count */ 116 int sc_rbget; 117 }; 118 119 extern struct cfdriver txcom_cd; 120 121 int txcom_match(struct device *, struct cfdata *, void *); 122 void txcom_attach(struct device *, struct device *, void *); 123 int txcom_print(void*, const char *); 124 125 int txcom_txintr(void *); 126 int txcom_rxintr(void *); 127 int txcom_frameerr_intr(void *); 128 int txcom_parityerr_intr(void *); 129 int txcom_break_intr(void *); 130 131 void txcom_rxsoft(void *); 132 void txcom_txsoft(void *); 133 134 int txcom_stsoft(void *); 135 int txcom_stsoft2(void *); 136 int txcom_stsoft3(void *); 137 int txcom_stsoft4(void *); 138 139 140 void txcom_shutdown(struct txcom_softc *); 141 void txcom_break(struct txcom_softc *, int); 142 void txcom_modem(struct txcom_softc *, int); 143 void txcomstart(struct tty *); 144 int txcomparam(struct tty *, struct termios *); 145 146 void txcom_reset (struct txcom_chip *); 147 int txcom_enable (struct txcom_chip *, boolean_t); 148 void txcom_disable (struct txcom_chip *); 149 void txcom_setmode (struct txcom_chip *); 150 void txcom_setbaudrate(struct txcom_chip *); 151 int txcom_cngetc (dev_t); 152 void txcom_cnputc (dev_t, int); 153 void txcom_cnpollc (dev_t, int); 154 155 int txcom_dcd_hook(void *, int, long, void *); 156 int txcom_cts_hook(void *, int, long, void *); 157 158 159 inline int __txcom_txbufready(struct txcom_chip *, int); 160 const char *__txcom_slotname(int); 161 162 #ifdef TX39UARTDEBUG 163 void txcom_dump(struct txcom_chip *); 164 #endif 165 166 struct consdev txcomcons = { 167 NULL, NULL, txcom_cngetc, txcom_cnputc, txcom_cnpollc, NULL, NULL, 168 NULL, NODEV, CN_NORMAL 169 }; 170 171 /* Serial console */ 172 struct txcom_chip txcom_chip; 173 174 CFATTACH_DECL(txcom, sizeof(struct txcom_softc), 175 txcom_match, txcom_attach, NULL, NULL); 176 177 dev_type_open(txcomopen); 178 dev_type_close(txcomclose); 179 dev_type_read(txcomread); 180 dev_type_write(txcomwrite); 181 dev_type_ioctl(txcomioctl); 182 dev_type_stop(txcomstop); 183 dev_type_tty(txcomtty); 184 dev_type_poll(txcompoll); 185 186 const struct cdevsw txcom_cdevsw = { 187 txcomopen, txcomclose, txcomread, txcomwrite, txcomioctl, 188 txcomstop, txcomtty, txcompoll, nommap, ttykqfilter, D_TTY 189 }; 190 191 int 192 txcom_match(parent, cf, aux) 193 struct device *parent; 194 struct cfdata *cf; 195 void *aux; 196 { 197 /* if the autoconfiguration got this far, there's a slot here */ 198 return 1; 199 } 200 201 void 202 txcom_attach(struct device *parent, struct device *self, void *aux) 203 { 204 struct tx39uart_attach_args *ua = aux; 205 struct txcom_softc *sc = (void*)self; 206 tx_chipset_tag_t tc; 207 struct tty *tp; 208 struct txcom_chip *chip; 209 int slot, console; 210 211 /* Check this slot used as serial console */ 212 console = (ua->ua_slot == txcom_chip.sc_slot) && 213 (txcom_chip.sc_hwflags & TXCOM_HW_CONSOLE); 214 215 if (console) { 216 sc->sc_chip = &txcom_chip; 217 } else { 218 if (!(sc->sc_chip = malloc(sizeof(struct txcom_chip), 219 M_DEVBUF, M_WAITOK))) { 220 printf(": can't allocate chip\n"); 221 return; 222 } 223 memset(sc->sc_chip, 0, sizeof(struct txcom_chip)); 224 } 225 226 chip = sc->sc_chip; 227 tc = chip->sc_tc = ua->ua_tc; 228 slot = chip->sc_slot = ua->ua_slot; 229 230 #ifdef TX39UARTDEBUG 231 txcom_dump(chip); 232 #endif 233 if (!console) 234 txcom_reset(chip); 235 236 if (!(sc->sc_rbuf = malloc(TXCOM_RING_SIZE, M_DEVBUF, M_WAITOK))) { 237 printf(": can't allocate buffer.\n"); 238 return; 239 } 240 memset(sc->sc_rbuf, 0, TXCOM_RING_SIZE); 241 242 tp = ttymalloc(); 243 tp->t_oproc = txcomstart; 244 tp->t_param = txcomparam; 245 tp->t_hwiflow = NULL; 246 sc->sc_tty = tp; 247 tty_attach(tp); 248 249 if (ISSET(chip->sc_hwflags, TXCOM_HW_CONSOLE)) { 250 int maj; 251 /* locate the major number */ 252 maj = cdevsw_lookup_major(&txcom_cdevsw); 253 254 cn_tab->cn_dev = makedev(maj, sc->sc_dev.dv_unit); 255 256 printf(": console"); 257 } 258 259 printf("\n"); 260 261 /* 262 * Enable interrupt 263 */ 264 #define TXCOMINTR(i, s) MAKEINTR(2, TX39_INTRSTATUS2_UART##i##INT(s)) 265 266 tx_intr_establish(tc, TXCOMINTR(RX, slot), IST_EDGE, IPL_TTY, 267 txcom_rxintr, sc); 268 tx_intr_establish(tc, TXCOMINTR(TX, slot), IST_EDGE, IPL_TTY, 269 txcom_txintr, sc); 270 tx_intr_establish(tc, TXCOMINTR(RXOVERRUN, slot), IST_EDGE, IPL_TTY, 271 txcom_rxintr, sc); 272 tx_intr_establish(tc, TXCOMINTR(TXOVERRUN, slot), IST_EDGE, IPL_TTY, 273 txcom_txintr, sc); 274 tx_intr_establish(tc, TXCOMINTR(FRAMEERR, slot), IST_EDGE, IPL_TTY, 275 txcom_frameerr_intr, sc); 276 tx_intr_establish(tc, TXCOMINTR(PARITYERR, slot), IST_EDGE, IPL_TTY, 277 txcom_parityerr_intr, sc); 278 tx_intr_establish(tc, TXCOMINTR(BREAK, slot), IST_EDGE, IPL_TTY, 279 txcom_break_intr, sc); 280 281 /* 282 * UARTA has external signal line. (its wiring is platform dependent) 283 */ 284 if (IS_COM0(slot)) { 285 /* install DCD, CTS hooks. */ 286 config_hook(CONFIG_HOOK_EVENT, CONFIG_HOOK_COM0_DCD, 287 CONFIG_HOOK_EXCLUSIVE, txcom_dcd_hook, sc); 288 config_hook(CONFIG_HOOK_EVENT, CONFIG_HOOK_COM0_CTS, 289 CONFIG_HOOK_EXCLUSIVE, txcom_cts_hook, sc); 290 } 291 292 /* 293 * UARTB can connect IR module 294 */ 295 if (IS_COM1(slot)) { 296 struct txcom_attach_args tca; 297 tca.tca_tc = tc; 298 tca.tca_parent = self; 299 config_found(self, &tca, txcom_print); 300 } 301 } 302 303 int 304 txcom_print(void *aux, const char *pnp) 305 { 306 return pnp ? QUIET : UNCONF; 307 } 308 309 void 310 txcom_reset(struct txcom_chip *chip) 311 { 312 tx_chipset_tag_t tc; 313 int slot, ofs; 314 txreg_t reg; 315 316 tc = chip->sc_tc; 317 slot = chip->sc_slot; 318 ofs = TX39_UARTCTRL1_REG(slot); 319 320 /* Supply clock */ 321 reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG); 322 reg |= (slot ? TX39_CLOCK_ENUARTBCLK : TX39_CLOCK_ENUARTACLK); 323 tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg); 324 325 /* reset UART module */ 326 tx_conf_write(tc, ofs, 0); 327 } 328 329 int 330 txcom_enable(struct txcom_chip *chip, boolean_t console) 331 { 332 tx_chipset_tag_t tc; 333 txreg_t reg; 334 int slot, ofs, timeout; 335 336 tc = chip->sc_tc; 337 slot = chip->sc_slot; 338 ofs = TX39_UARTCTRL1_REG(slot); 339 340 /* 341 * External power supply (if any) 342 * When serial console, Windows CE already powered on it. 343 */ 344 if (!console) { 345 config_hook_call(CONFIG_HOOK_POWERCONTROL, 346 CONFIG_HOOK_POWERCONTROL_COM0, PWCTL_ON); 347 delay(3); 348 } 349 350 /* Supply clock */ 351 reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG); 352 reg |= (slot ? TX39_CLOCK_ENUARTBCLK : TX39_CLOCK_ENUARTACLK); 353 tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg); 354 355 /* 356 * XXX Disable DMA (DMA not coded yet) 357 */ 358 reg = tx_conf_read(tc, ofs); 359 reg &= ~(TX39_UARTCTRL1_ENDMARX | TX39_UARTCTRL1_ENDMATX); 360 tx_conf_write(tc, ofs, reg); 361 362 /* enable */ 363 reg = tx_conf_read(tc, ofs); 364 reg |= TX39_UARTCTRL1_ENUART; 365 reg &= ~TX39_UARTCTRL1_ENBREAHALT; 366 tx_conf_write(tc, ofs, reg); 367 368 timeout = 100000; 369 370 while(!(tx_conf_read(tc, ofs) & TX39_UARTCTRL1_UARTON) && 371 --timeout > 0) 372 ; 373 374 if (timeout == 0 && !cold) { 375 printf("%s never power up\n", __txcom_slotname(slot)); 376 return 1; 377 } 378 379 return 0; 380 } 381 382 void 383 txcom_disable(struct txcom_chip *chip) 384 { 385 tx_chipset_tag_t tc; 386 txreg_t reg; 387 int slot; 388 389 tc = chip->sc_tc; 390 slot = chip->sc_slot; 391 392 reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot)); 393 /* DMA */ 394 reg &= ~(TX39_UARTCTRL1_ENDMARX | TX39_UARTCTRL1_ENDMATX); 395 396 /* disable module */ 397 reg &= ~TX39_UARTCTRL1_ENUART; 398 tx_conf_write(tc, TX39_UARTCTRL1_REG(slot), reg); 399 400 /* Clock */ 401 reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG); 402 reg &= ~(slot ? TX39_CLOCK_ENUARTBCLK : TX39_CLOCK_ENUARTACLK); 403 tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg); 404 405 } 406 407 inline int 408 __txcom_txbufready(struct txcom_chip *chip, int retry) 409 { 410 tx_chipset_tag_t tc = chip->sc_tc; 411 int ofs = TX39_UARTCTRL1_REG(chip->sc_slot); 412 413 do { 414 if (tx_conf_read(tc, ofs) & TX39_UARTCTRL1_EMPTY) 415 return 1; 416 } while(--retry != 0); 417 418 return 0; 419 } 420 421 void 422 txcom_pulse_mode(struct device *dev) 423 { 424 struct txcom_softc *sc = (void*)dev; 425 struct txcom_chip *chip = sc->sc_chip; 426 tx_chipset_tag_t tc = chip->sc_tc; 427 int ofs; 428 txreg_t reg; 429 430 ofs = TX39_UARTCTRL1_REG(chip->sc_slot); 431 432 reg = tx_conf_read(tc, ofs); 433 /* WindowsCE use this setting */ 434 reg |= TX39_UARTCTRL1_PULSEOPT1; 435 reg &= ~TX39_UARTCTRL1_PULSEOPT2; 436 reg |= TX39_UARTCTRL1_DTINVERT; 437 438 tx_conf_write(tc, ofs, reg); 439 } 440 441 /* 442 * console 443 */ 444 int 445 txcom_cngetc(dev_t dev) 446 { 447 tx_chipset_tag_t tc; 448 int ofs, c, s; 449 450 s = spltty(); 451 452 tc = txcom_chip.sc_tc; 453 ofs = TX39_UARTCTRL1_REG(txcom_chip.sc_slot); 454 455 while(!(TX39_UARTCTRL1_RXHOLDFULL & tx_conf_read(tc, ofs))) 456 ; 457 458 c = TX39_UARTRXHOLD_RXDATA( 459 tx_conf_read(tc, TX39_UARTRXHOLD_REG(txcom_chip.sc_slot))); 460 461 if (c == '\r') 462 c = '\n'; 463 464 splx(s); 465 466 return c; 467 } 468 469 void 470 txcom_cnputc(dev_t dev, int c) 471 { 472 struct txcom_chip *chip = &txcom_chip; 473 tx_chipset_tag_t tc = chip->sc_tc; 474 int s; 475 476 s = spltty(); 477 478 /* Wait for transmitter to empty */ 479 __txcom_txbufready(chip, -1); 480 481 tx_conf_write(tc, TX39_UARTTXHOLD_REG(chip->sc_slot), 482 (c & TX39_UARTTXHOLD_TXDATA_MASK)); 483 484 __txcom_txbufready(chip, -1); 485 486 splx(s); 487 } 488 489 void 490 txcom_cnpollc(dev_t dev, int on) 491 { 492 } 493 494 void 495 txcom_setmode(struct txcom_chip *chip) 496 { 497 tcflag_t cflag = chip->sc_cflag; 498 int ofs = TX39_UARTCTRL1_REG(chip->sc_slot); 499 txreg_t reg; 500 501 reg = tx_conf_read(chip->sc_tc, ofs); 502 reg &= ~TX39_UARTCTRL1_ENUART; 503 tx_conf_write(chip->sc_tc, ofs, reg); 504 505 switch (ISSET(cflag, CSIZE)) { 506 default: 507 printf("txcom_setmode: CS7, CS8 only. use CS7"); 508 /* FALL THROUGH */ 509 case CS7: 510 reg |= TX39_UARTCTRL1_BIT7; 511 break; 512 case CS8: 513 reg &= ~TX39_UARTCTRL1_BIT7; 514 break; 515 } 516 517 if (ISSET(cflag, PARENB)) { 518 reg |= TX39_UARTCTRL1_ENPARITY; 519 if (ISSET(cflag, PARODD)) { 520 reg &= ~TX39_UARTCTRL1_EVENPARITY; 521 } else { 522 reg |= TX39_UARTCTRL1_EVENPARITY; 523 } 524 } else { 525 reg &= ~TX39_UARTCTRL1_ENPARITY; 526 } 527 528 if (ISSET(cflag, CSTOPB)) 529 reg |= TX39_UARTCTRL1_TWOSTOP; 530 else 531 reg &= ~TX39_UARTCTRL1_TWOSTOP; 532 533 reg |= TX39_UARTCTRL1_ENUART; 534 tx_conf_write(chip->sc_tc, ofs, reg); 535 } 536 537 void 538 txcom_setbaudrate(struct txcom_chip *chip) 539 { 540 int baudrate; 541 int ofs = TX39_UARTCTRL1_REG(chip->sc_slot); 542 txreg_t reg, reg1; 543 544 if (chip->sc_speed == 0) 545 return; 546 547 if (!cold) 548 DPRINTF("%d\n", chip->sc_speed); 549 550 reg1 = tx_conf_read(chip->sc_tc, ofs); 551 reg1 &= ~TX39_UARTCTRL1_ENUART; 552 tx_conf_write(chip->sc_tc, ofs, reg1); 553 554 baudrate = TX39_UARTCLOCKHZ / (chip->sc_speed * 16) - 1; 555 reg = TX39_UARTCTRL2_BAUDRATE_SET(0, baudrate); 556 557 tx_conf_write(chip->sc_tc, TX39_UARTCTRL2_REG(chip->sc_slot), reg); 558 559 reg1 |= TX39_UARTCTRL1_ENUART; 560 tx_conf_write(chip->sc_tc, ofs, reg1); 561 } 562 563 int 564 txcom_cnattach(int slot, int speed, int cflag) 565 { 566 cn_tab = &txcomcons; 567 568 txcom_chip.sc_tc = tx_conf_get_tag(); 569 txcom_chip.sc_slot = slot; 570 txcom_chip.sc_cflag = cflag; 571 txcom_chip.sc_speed = speed; 572 txcom_chip.sc_hwflags |= TXCOM_HW_CONSOLE; 573 #if notyet 574 txcom_reset(&txcom_chip); 575 #endif 576 txcom_setmode(&txcom_chip); 577 txcom_setbaudrate(&txcom_chip); 578 579 if (txcom_enable(&txcom_chip, TRUE) != 0) 580 return 1; 581 582 return 0; 583 } 584 585 /* 586 * tty 587 */ 588 void 589 txcom_break(struct txcom_softc *sc, int on) 590 { 591 struct txcom_chip *chip = sc->sc_chip; 592 593 tx_conf_write(chip->sc_tc, TX39_UARTTXHOLD_REG(chip->sc_slot), 594 on ? TX39_UARTTXHOLD_BREAK : 0); 595 } 596 597 void 598 txcom_modem(struct txcom_softc *sc, int on) 599 { 600 struct txcom_chip *chip = sc->sc_chip; 601 tx_chipset_tag_t tc = chip->sc_tc; 602 int slot = chip->sc_slot; 603 txreg_t reg; 604 605 /* assert DTR */ 606 if (IS_COM0(slot)) { 607 config_hook_call(CONFIG_HOOK_SET, 608 CONFIG_HOOK_COM0_DTR, 609 (void *)on); 610 } 611 612 reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot)); 613 reg &= ~TX39_UARTCTRL1_ENUART; 614 tx_conf_write(tc, TX39_UARTCTRL1_REG(slot), reg); 615 616 if (on) { 617 reg &= ~TX39_UARTCTRL1_DISTXD; 618 } else { 619 reg |= TX39_UARTCTRL1_DISTXD; /* low UARTTXD */ 620 } 621 622 reg |= TX39_UARTCTRL1_ENUART; 623 tx_conf_write(tc, TX39_UARTCTRL1_REG(slot), reg); 624 } 625 626 void 627 txcom_shutdown(struct txcom_softc *sc) 628 { 629 struct tty *tp = sc->sc_tty; 630 int s = spltty(); 631 632 /* Clear any break condition set with TIOCSBRK. */ 633 txcom_break(sc, 0); 634 635 /* 636 * Hang up if necessary. Wait a bit, so the other side has time to 637 * notice even if we immediately open the port again. 638 */ 639 if (ISSET(tp->t_cflag, HUPCL)) { 640 txcom_modem(sc, 0); 641 (void) tsleep(sc, TTIPRI, ttclos, hz); 642 } 643 644 645 /* Turn off interrupts if not the console. */ 646 if (!ISSET(sc->sc_chip->sc_hwflags, TXCOM_HW_CONSOLE)) { 647 txcom_disable(sc->sc_chip); 648 } 649 650 splx(s); 651 } 652 653 const char * 654 __txcom_slotname(int slot) 655 { 656 static const char *slotname[] = {"UARTA", "UARTB", "unknown"}; 657 658 if (slot != 0 && slot != 1) 659 return slotname[2]; 660 661 return slotname[slot]; 662 } 663 664 int 665 txcom_frameerr_intr(void *arg) 666 { 667 struct txcom_softc *sc = arg; 668 669 printf("%s frame error\n", __txcom_slotname(sc->sc_chip->sc_slot)); 670 671 return 0; 672 } 673 674 int 675 txcom_parityerr_intr(void *arg) 676 { 677 struct txcom_softc *sc = arg; 678 679 printf("%s parity error\n", __txcom_slotname(sc->sc_chip->sc_slot)); 680 681 return 0; 682 } 683 684 int 685 txcom_break_intr(void *arg) 686 { 687 struct txcom_softc *sc = arg; 688 689 printf("%s break\n", __txcom_slotname(sc->sc_chip->sc_slot)); 690 691 return 0; 692 } 693 694 int 695 txcom_rxintr(void *arg) 696 { 697 struct txcom_softc *sc = arg; 698 struct txcom_chip *chip = sc->sc_chip; 699 u_int8_t c; 700 701 c = TX39_UARTRXHOLD_RXDATA( 702 tx_conf_read(chip->sc_tc, 703 TX39_UARTRXHOLD_REG(chip->sc_slot))); 704 705 sc->sc_rbuf[sc->sc_rbput] = c; 706 sc->sc_rbput = (sc->sc_rbput + 1) % TXCOM_RING_MASK; 707 708 callout_reset(&sc->sc_rxsoft_ch, 1, txcom_rxsoft, sc); 709 710 return 0; 711 } 712 713 void 714 txcom_rxsoft(void *arg) 715 { 716 struct txcom_softc *sc = arg; 717 struct tty *tp = sc->sc_tty; 718 int (*rint)(int, struct tty *); 719 int code; 720 int s, end, get; 721 722 rint = tp->t_linesw->l_rint; 723 724 s = spltty(); 725 end = sc->sc_rbput; 726 get = sc->sc_rbget; 727 728 while (get != end) { 729 code = sc->sc_rbuf[get]; 730 731 if ((*rint)(code, tp) == -1) { 732 /* 733 * The line discipline's buffer is out of space. 734 */ 735 } 736 get = (get + 1) % TXCOM_RING_MASK; 737 } 738 sc->sc_rbget = get; 739 740 splx(s); 741 } 742 743 int 744 txcom_txintr(void *arg) 745 { 746 struct txcom_softc *sc = arg; 747 struct txcom_chip *chip = sc->sc_chip; 748 tx_chipset_tag_t tc = chip->sc_tc; 749 750 if (sc->sc_tbc > 0) { 751 tx_conf_write(tc, TX39_UARTTXHOLD_REG(chip->sc_slot), 752 (*sc->sc_tba & 753 TX39_UARTTXHOLD_TXDATA_MASK)); 754 sc->sc_tbc--; 755 sc->sc_tba++; 756 } else { 757 callout_reset(&sc->sc_rxsoft_ch, 1, txcom_txsoft, sc); 758 } 759 760 return 0; 761 } 762 763 void 764 txcom_txsoft(void *arg) 765 { 766 struct txcom_softc *sc = arg; 767 struct tty *tp = sc->sc_tty; 768 int s = spltty(); 769 770 CLR(tp->t_state, TS_BUSY); 771 if (ISSET(tp->t_state, TS_FLUSH)) { 772 CLR(tp->t_state, TS_FLUSH); 773 } else { 774 ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf)); 775 } 776 777 (*tp->t_linesw->l_start)(tp); 778 779 splx(s); 780 } 781 782 int 783 txcomopen(dev_t dev, int flag, int mode, struct lwp *l) 784 { 785 struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)]; 786 struct txcom_chip *chip; 787 struct tty *tp; 788 int s, err = ENXIO; 789 ; 790 791 if (!sc) 792 return err; 793 794 chip = sc->sc_chip; 795 tp = sc->sc_tty; 796 797 if (ISSET(tp->t_state, TS_ISOPEN) && 798 ISSET(tp->t_state, TS_XCLUDE) && 799 suser(l->l_proc->p_ucred, &l->l_proc->p_acflag) != 0) 800 return (EBUSY); 801 802 s = spltty(); 803 804 if (txcom_enable(sc->sc_chip, FALSE)) { 805 splx(s); 806 goto out; 807 } 808 /* 809 * Do the following iff this is a first open. 810 */ 811 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 812 struct termios t; 813 814 tp->t_dev = dev; 815 816 t.c_ispeed = 0; 817 if (ISSET(chip->sc_hwflags, TXCOM_HW_CONSOLE)) { 818 t.c_ospeed = chip->sc_speed; 819 t.c_cflag = chip->sc_cflag; 820 } else { 821 t.c_ospeed = TTYDEF_SPEED; 822 t.c_cflag = TTYDEF_CFLAG; 823 } 824 825 if (ISSET(chip->sc_swflags, TIOCFLAG_CLOCAL)) 826 SET(t.c_cflag, CLOCAL); 827 if (ISSET(chip->sc_swflags, TIOCFLAG_CRTSCTS)) 828 SET(t.c_cflag, CRTSCTS); 829 if (ISSET(chip->sc_swflags, TIOCFLAG_MDMBUF)) 830 SET(t.c_cflag, MDMBUF); 831 832 /* Make sure txcomparam() will do something. */ 833 tp->t_ospeed = 0; 834 txcomparam(tp, &t); 835 836 tp->t_iflag = TTYDEF_IFLAG; 837 tp->t_oflag = TTYDEF_OFLAG; 838 tp->t_lflag = TTYDEF_LFLAG; 839 840 ttychars(tp); 841 ttsetwater(tp); 842 843 /* 844 * Turn on DTR. We must always do this, even if carrier is not 845 * present, because otherwise we'd have to use TIOCSDTR 846 * immediately after setting CLOCAL, which applications do not 847 * expect. We always assert DTR while the device is open 848 * unless explicitly requested to deassert it. 849 */ 850 txcom_modem(sc, 1); 851 852 /* Clear the input ring, and unblock. */ 853 sc->sc_rbget = sc->sc_rbput = 0; 854 } 855 856 splx(s); 857 #define TXCOMDIALOUT(x) (minor(x) & 0x80000) 858 if ((err = ttyopen(tp, TXCOMDIALOUT(dev), ISSET(flag, O_NONBLOCK)))) { 859 DPRINTF("ttyopen failed\n"); 860 goto out; 861 } 862 if ((err = (*tp->t_linesw->l_open)(dev, tp))) { 863 DPRINTF("line dicipline open failed\n"); 864 goto out; 865 } 866 867 return err; 868 869 out: 870 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 871 /* 872 * We failed to open the device, and nobody else had it opened. 873 * Clean up the state as appropriate. 874 */ 875 txcom_shutdown(sc); 876 } 877 878 return err; 879 880 } 881 882 int 883 txcomclose(dev_t dev, int flag, int mode, struct lwp *l) 884 { 885 struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)]; 886 struct tty *tp = sc->sc_tty; 887 888 /* XXX This is for cons.c. */ 889 if (!ISSET(tp->t_state, TS_ISOPEN)) 890 return 0; 891 892 (*tp->t_linesw->l_close)(tp, flag); 893 ttyclose(tp); 894 895 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 896 /* 897 * Although we got a last close, the device may still be in 898 * use; e.g. if this was the dialout node, and there are still 899 * processes waiting for carrier on the non-dialout node. 900 */ 901 txcom_shutdown(sc); 902 } 903 904 return 0; 905 } 906 907 int 908 txcomread(dev_t dev, struct uio *uio, int flag) 909 { 910 struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)]; 911 struct tty *tp = sc->sc_tty; 912 913 return ((*tp->t_linesw->l_read)(tp, uio, flag)); 914 } 915 916 int 917 txcomwrite(dev_t dev, struct uio *uio, int flag) 918 { 919 struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)]; 920 struct tty *tp = sc->sc_tty; 921 922 return ((*tp->t_linesw->l_write)(tp, uio, flag)); 923 } 924 925 int 926 txcompoll(dev_t dev, int events, struct lwp *l) 927 { 928 struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)]; 929 struct tty *tp = sc->sc_tty; 930 931 return ((*tp->t_linesw->l_poll)(tp, events, l)); 932 } 933 934 struct tty * 935 txcomtty(dev_t dev) 936 { 937 struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)]; 938 939 return sc->sc_tty; 940 } 941 942 int 943 txcomioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct lwp *l) 944 { 945 struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)]; 946 struct tty *tp = sc->sc_tty; 947 int s, err; 948 949 err = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, l); 950 if (err != EPASSTHROUGH) { 951 return err; 952 } 953 954 err = ttioctl(tp, cmd, data, flag, l); 955 if (err != EPASSTHROUGH) { 956 return err; 957 } 958 959 err = 0; 960 961 s = spltty(); 962 963 switch (cmd) { 964 default: 965 err = EPASSTHROUGH; 966 break; 967 968 case TIOCSBRK: 969 txcom_break(sc, 1); 970 break; 971 972 case TIOCCBRK: 973 txcom_break(sc, 0); 974 break; 975 976 case TIOCSDTR: 977 txcom_modem(sc, 1); 978 break; 979 980 case TIOCCDTR: 981 txcom_modem(sc, 0); 982 break; 983 984 case TIOCGFLAGS: 985 *(int *)data = sc->sc_chip->sc_swflags; 986 break; 987 988 case TIOCSFLAGS: 989 err = suser(l->l_proc->p_ucred, &l->l_proc->p_acflag); 990 if (err) { 991 break; 992 } 993 sc->sc_chip->sc_swflags = *(int *)data; 994 break; 995 996 } 997 998 splx(s); 999 1000 return err; 1001 } 1002 1003 void 1004 txcomstop(struct tty *tp, int flag) 1005 { 1006 struct txcom_softc *sc = txcom_cd.cd_devs[minor(tp->t_dev)]; 1007 int s; 1008 1009 s = spltty(); 1010 1011 if (ISSET(tp->t_state, TS_BUSY)) { 1012 /* Stop transmitting at the next chunk. */ 1013 sc->sc_tbc = 0; 1014 sc->sc_heldtbc = 0; 1015 if (!ISSET(tp->t_state, TS_TTSTOP)) 1016 SET(tp->t_state, TS_FLUSH); 1017 } 1018 1019 splx(s); 1020 } 1021 1022 void 1023 txcomstart(struct tty *tp) 1024 { 1025 struct txcom_softc *sc = txcom_cd.cd_devs[minor(tp->t_dev)]; 1026 struct txcom_chip *chip = sc->sc_chip; 1027 tx_chipset_tag_t tc = chip->sc_tc; 1028 int slot = chip->sc_slot; 1029 int s; 1030 1031 s = spltty(); 1032 1033 if (!__txcom_txbufready(chip, 0) || 1034 ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP)) 1035 goto out; 1036 1037 if (tp->t_outq.c_cc <= tp->t_lowat) { 1038 if (ISSET(tp->t_state, TS_ASLEEP)) { 1039 CLR(tp->t_state, TS_ASLEEP); 1040 wakeup(&tp->t_outq); 1041 } 1042 selwakeup(&tp->t_wsel); 1043 if (tp->t_outq.c_cc == 0) 1044 goto out; 1045 } 1046 1047 sc->sc_tba = tp->t_outq.c_cf; 1048 sc->sc_tbc = ndqb(&tp->t_outq, 0); 1049 SET(tp->t_state, TS_BUSY); 1050 1051 /* Output the first character of the contiguous buffer. */ 1052 tx_conf_write(tc, TX39_UARTTXHOLD_REG(slot), 1053 (*sc->sc_tba & TX39_UARTTXHOLD_TXDATA_MASK)); 1054 1055 sc->sc_tbc--; 1056 sc->sc_tba++; 1057 1058 out: 1059 splx(s); 1060 } 1061 1062 /* 1063 * Set TXcom tty parameters from termios. 1064 */ 1065 int 1066 txcomparam(struct tty *tp, struct termios *t) 1067 { 1068 struct txcom_softc *sc = txcom_cd.cd_devs[minor(tp->t_dev)]; 1069 struct txcom_chip *chip; 1070 int ospeed; 1071 int s; 1072 1073 if (!sc) 1074 return ENXIO; 1075 1076 ospeed = t->c_ospeed; 1077 1078 /* Check requested parameters. */ 1079 if (ospeed < 0) { 1080 return EINVAL; 1081 } 1082 if (t->c_ispeed && t->c_ispeed != ospeed) { 1083 return EINVAL; 1084 } 1085 1086 s = spltty(); 1087 chip = sc->sc_chip; 1088 /* 1089 * For the console, always force CLOCAL and !HUPCL, so that the port 1090 * is always active. 1091 */ 1092 if (ISSET(chip->sc_swflags, TIOCFLAG_SOFTCAR) || 1093 ISSET(chip->sc_hwflags, TXCOM_HW_CONSOLE)) { 1094 SET(t->c_cflag, CLOCAL); 1095 CLR(t->c_cflag, HUPCL); 1096 } 1097 splx(s); 1098 1099 /* 1100 * If we're not in a mode that assumes a connection is present, then 1101 * ignore carrier changes. 1102 */ 1103 if (ISSET(t->c_cflag, CLOCAL | MDMBUF)) 1104 chip->sc_dcd = 0; 1105 else 1106 chip->sc_dcd = 1; 1107 1108 /* 1109 * Only whack the UART when params change. 1110 * Some callers need to clear tp->t_ospeed 1111 * to make sure initialization gets done. 1112 */ 1113 if (tp->t_ospeed == ospeed && tp->t_cflag == t->c_cflag) { 1114 return 0; 1115 } 1116 1117 s = spltty(); 1118 chip = sc->sc_chip; 1119 chip->sc_speed = ospeed; 1120 chip->sc_cflag = t->c_cflag; 1121 1122 txcom_setmode(chip); 1123 txcom_setbaudrate(chip); 1124 1125 /* And copy to tty. */ 1126 tp->t_ispeed = 0; 1127 tp->t_ospeed = chip->sc_speed; 1128 tp->t_cflag = chip->sc_cflag; 1129 1130 /* 1131 * Update the tty layer's idea of the carrier bit, in case we changed 1132 * CLOCAL or MDMBUF. We don't hang up here; we only do that by 1133 * explicit request. 1134 */ 1135 (void) (*tp->t_linesw->l_modem)(tp, chip->sc_dcd); 1136 1137 /* 1138 * If hardware flow control is disabled, unblock any hard flow 1139 * control state. 1140 */ 1141 if (!ISSET(chip->sc_cflag, CHWFLOW)) { 1142 txcomstart(tp); 1143 } 1144 1145 splx(s); 1146 1147 return 0; 1148 } 1149 1150 int 1151 txcom_dcd_hook(void *arg, int type, long id, void *msg) 1152 { 1153 struct txcom_softc *sc = arg; 1154 struct tty *tp = sc->sc_tty; 1155 struct txcom_chip *chip = sc->sc_chip; 1156 int modem = !(int)msg; /* p-edge 1, n-edge 0 */ 1157 1158 DPRINTF("DCD %s\n", modem ? "ON" : "OFF"); 1159 1160 if (modem && chip->sc_dcd) 1161 (void) (*tp->t_linesw->l_modem)(tp, chip->sc_dcd); 1162 1163 return 0; 1164 } 1165 1166 int 1167 txcom_cts_hook(void *arg, int type, long id, void *msg) 1168 { 1169 struct txcom_softc *sc = arg; 1170 struct tty *tp = sc->sc_tty; 1171 struct txcom_chip *chip = sc->sc_chip; 1172 int clear = !(int)msg; /* p-edge 1, n-edge 0 */ 1173 1174 DPRINTF("CTS %s\n", clear ? "ON" : "OFF"); 1175 1176 if (chip->sc_msr_cts) { 1177 if (!clear) { 1178 chip->sc_tx_stopped = 1; 1179 } else { 1180 chip->sc_tx_stopped = 0; 1181 (*tp->t_linesw->l_start)(tp); 1182 } 1183 } 1184 1185 return 0; 1186 } 1187 1188 #ifdef TX39UARTDEBUG 1189 void 1190 txcom_dump(struct txcom_chip *chip) 1191 { 1192 tx_chipset_tag_t tc = chip->sc_tc; 1193 int slot = chip->sc_slot; 1194 txreg_t reg; 1195 1196 reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot)); 1197 #define ISSETPRINT(r, m) \ 1198 dbg_bitmask_print(r, TX39_UARTCTRL1_##m, #m) 1199 ISSETPRINT(reg, UARTON); 1200 ISSETPRINT(reg, EMPTY); 1201 ISSETPRINT(reg, PRXHOLDFULL); 1202 ISSETPRINT(reg, RXHOLDFULL); 1203 ISSETPRINT(reg, ENDMARX); 1204 ISSETPRINT(reg, ENDMATX); 1205 ISSETPRINT(reg, TESTMODE); 1206 ISSETPRINT(reg, ENBREAHALT); 1207 ISSETPRINT(reg, ENDMATEST); 1208 ISSETPRINT(reg, ENDMALOOP); 1209 ISSETPRINT(reg, PULSEOPT2); 1210 ISSETPRINT(reg, PULSEOPT1); 1211 ISSETPRINT(reg, DTINVERT); 1212 ISSETPRINT(reg, DISTXD); 1213 ISSETPRINT(reg, TWOSTOP); 1214 ISSETPRINT(reg, LOOPBACK); 1215 ISSETPRINT(reg, BIT7); 1216 ISSETPRINT(reg, EVENPARITY); 1217 ISSETPRINT(reg, ENPARITY); 1218 ISSETPRINT(reg, ENUART); 1219 } 1220 #endif /* TX39UARTDEBUG */ 1221