xref: /netbsd-src/sys/arch/hpcmips/tx/txcom.c (revision 95d875fb90b1458e4f1de6950286ddcd6644bc61)
1 /*	$NetBSD: txcom.c,v 1.3 1999/12/26 17:05:28 uch Exp $ */
2 
3 /*
4  * Copyright (c) 1999, by UCHIYAMA Yasushi
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. The name of the developer may NOT be used to endorse or promote products
13  *    derived from this software without specific prior written permission.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25  * SUCH DAMAGE.
26  *
27  */
28 #include "opt_tx39_debug.h"
29 #include "opt_tx39uartdebug.h"
30 
31 #include <sys/param.h>
32 #include <sys/systm.h>
33 #include <sys/kernel.h>
34 #include <sys/device.h>
35 #include <sys/malloc.h>
36 
37 #include <sys/proc.h> /* tsleep/wakeup */
38 
39 #include <sys/ioctl.h>
40 #include <sys/select.h>
41 #include <sys/file.h>
42 
43 #include <sys/tty.h>
44 #include <sys/conf.h>
45 #include <dev/cons.h> /* consdev */
46 
47 #include <machine/bus.h>
48 
49 #include <hpcmips/tx/tx39var.h>
50 #include <hpcmips/tx/tx39icureg.h>
51 #include <hpcmips/tx/tx39uartvar.h>
52 #include <hpcmips/tx/tx39uartreg.h>
53 
54 #include <hpcmips/tx/tx39clockreg.h> /* XXX */
55 
56 #define SET(t, f)	(t) |= (f)
57 #define CLR(t, f)	(t) &= ~(f)
58 #define ISSET(t, f)	((t) & (f))
59 
60 #ifdef TX39UARTDEBUG
61 #define	DPRINTF(arg) printf arg
62 #else
63 #define	DPRINTF(arg)
64 #endif
65 
66 #define TXCOM_HW_CONSOLE	0x40
67 #define	TXCOM_RING_SIZE		256 /* must be a power of two! */
68 #define TXCOM_RING_MASK		(TXCOM_RING_SIZE - 1)
69 
70 struct txcom_chip {
71 	tx_chipset_tag_t sc_tc;
72 	int sc_slot;	/* UARTA or UARTB */
73 	int sc_cflag;
74 	int sc_speed;
75 	int sc_swflags;
76 	int sc_hwflags;
77 };
78 
79 struct txcom_softc {
80 	struct	device		sc_dev;
81 	struct tty		*sc_tty;
82 	struct txcom_chip	*sc_chip;
83 
84  	u_int8_t	*sc_tba;	/* transmit buffer address */
85  	int		sc_tbc;		/* transmit byte count */
86 	int		sc_heldtbc;
87 	u_int8_t	*sc_rbuf;	/* receive buffer address */
88 	int		sc_rbput;	/* receive byte count */
89 	int		sc_rbget;
90 };
91 
92 extern struct cfdriver txcom_cd;
93 
94 int	txcom_match	__P((struct device*, struct cfdata*, void*));
95 void	txcom_attach	__P((struct device*, struct device*, void*));
96 
97 int	txcom_txintr		__P((void*));
98 int	txcom_rxintr		__P((void*));
99 int	txcom_overrun_intr	__P((void*));
100 int	txcom_frameerr_intr	__P((void*));
101 int	txcom_parityerr_intr	__P((void*));
102 int	txcom_break_intr	__P((void*));
103 
104 void	txcom_rxsoft	__P((void*));
105 void	txcom_txsoft	__P((void*));
106 
107 void	txcom_shutdown	__P((struct txcom_softc*));
108 void	txcom_break	__P((struct txcom_softc*, int));
109 void	txcom_modem	__P((struct txcom_softc*, int));
110 void	txcomstart	__P((struct tty*));
111 int	txcomparam	__P((struct tty*, struct termios*));
112 
113 int	txcom_enable		__P((struct txcom_chip*));
114 void	txcom_disable		__P((struct txcom_chip*));
115 void	txcom_setmode		__P((struct txcom_chip*));
116 void	txcom_setbaudrate	__P((struct txcom_chip*));
117 int	txcom_cngetc		__P((dev_t));
118 void	txcom_cnputc		__P((dev_t, int));
119 void	txcom_cnpollc		__P((dev_t, int));
120 
121 __inline int	__txcom_txbufready __P((struct txcom_chip*, int));
122 __inline const char *__txcom_slotname __P((int));
123 
124 cdev_decl(txcom);
125 
126 struct consdev txcomcons = {
127 	NULL, NULL, txcom_cngetc, txcom_cnputc, txcom_cnpollc,
128 	NODEV, CN_NORMAL
129 };
130 
131 /* Serial console */
132 struct txcom_chip txcom_chip;
133 
134 struct cfattach txcom_ca = {
135 	sizeof(struct txcom_softc), txcom_match, txcom_attach
136 };
137 
138 int
139 txcom_match(parent, cf, aux)
140 	struct device *parent;
141 	struct cfdata *cf;
142 	void *aux;
143 {
144 	/* if the autoconfiguration got this far, there's a slot here */
145 	return 1;
146 }
147 
148 void
149 txcom_attach(parent, self, aux)
150 	struct device *parent;
151 	struct device *self;
152 	void *aux;
153 {
154 	struct tx39uart_attach_args *ua = aux;
155 	struct txcom_softc *sc = (void*)self;
156 	tx_chipset_tag_t tc;
157 	struct tty *tp;
158 	struct txcom_chip *chip;
159 	int slot;
160 
161 	/* Check this slot used as serial console */
162 	if (ua->ua_slot == txcom_chip.sc_slot &&
163 	    (txcom_chip.sc_hwflags & TXCOM_HW_CONSOLE)) {
164 		sc->sc_chip = &txcom_chip;
165 	} else {
166 		if (!(sc->sc_chip = malloc(sizeof(struct txcom_chip),
167 					   M_DEVBUF, M_WAITOK))) {
168 			printf(": can't allocate chip\n");
169 			return;
170 		}
171 		memset(sc->sc_chip, 0, sizeof(struct txcom_chip));
172 	}
173 
174 	chip = sc->sc_chip;
175 	tc = chip->sc_tc = ua->ua_tc;
176 	slot = chip->sc_slot = ua->ua_slot;
177 
178 	if (!(sc->sc_rbuf = malloc(TXCOM_RING_SIZE, M_DEVBUF, M_WAITOK))) {
179 		printf(": can't allocate buffer.\n");
180 		return;
181 	}
182 	memset(sc->sc_rbuf, 0, TXCOM_RING_SIZE);
183 
184 	tp = ttymalloc();
185 	tp->t_oproc = txcomstart;
186 	tp->t_param = txcomparam;
187 	tp->t_hwiflow = NULL;
188 	sc->sc_tty = tp;
189 	tty_attach(tp);
190 
191 	if (ISSET(chip->sc_hwflags, TXCOM_HW_CONSOLE)) {
192 		int maj;
193 		/* locate the major number */
194 		for (maj = 0; maj < nchrdev; maj++)
195 			if (cdevsw[maj].d_open == txcomopen)
196 				break;
197 
198 		cn_tab->cn_dev = makedev(maj, sc->sc_dev.dv_unit);
199 
200 		printf(": console");
201 	}
202 
203 	printf("\n");
204 
205 	/*
206 	 * Enable interrupt
207 	 */
208 #define TXCOMINTR(i, s) MAKEINTR(2, TX39_INTRSTATUS2_UART##i##INT(s))
209 
210 	tx_intr_establish(tc, TXCOMINTR(RX, slot), IST_EDGE, IPL_TTY,
211 			  txcom_rxintr, sc);
212 	tx_intr_establish(tc, TXCOMINTR(TX, slot), IST_EDGE, IPL_TTY,
213 			  txcom_txintr, sc);
214 	tx_intr_establish(tc, TXCOMINTR(RXOVERRUN, slot), IST_EDGE, IPL_TTY,
215 			  txcom_overrun_intr, sc);
216 	tx_intr_establish(tc, TXCOMINTR(TXOVERRUN, slot), IST_EDGE, IPL_TTY,
217 			  txcom_overrun_intr, sc);
218 	tx_intr_establish(tc, TXCOMINTR(FRAMEERR, slot), IST_EDGE, IPL_TTY,
219 			  txcom_frameerr_intr, sc);
220 	tx_intr_establish(tc, TXCOMINTR(PARITYERR, slot), IST_EDGE, IPL_TTY,
221 			  txcom_parityerr_intr, sc);
222 	tx_intr_establish(tc, TXCOMINTR(BREAK, slot), IST_EDGE, IPL_TTY,
223 			  txcom_break_intr, sc);
224 }
225 
226 int
227 txcom_enable(chip)
228 	struct txcom_chip *chip;
229 {
230 	tx_chipset_tag_t tc;
231 
232 	txreg_t reg;
233 	int slot, ofs, timeout;
234 
235 	tc = chip->sc_tc;
236 	slot = chip->sc_slot;
237 	ofs = TX39_UARTCTRL1_REG(slot);
238 
239 	/* Power on */
240 	reg = tx_conf_read(tc, ofs);
241 	reg |= TX39_UARTCTRL1_ENUART;
242 	reg &= ~TX39_UARTCTRL1_ENBREAHALT;
243 	tx_conf_write(tc, ofs, reg);
244 
245 	timeout = 100;
246 
247 	while(!(tx_conf_read(tc, ofs) & TX39_UARTCTRL1_UARTON) &&
248 	      --timeout > 0)
249 		;
250 
251 	if (timeout == 0) {
252 		printf("UART%c never power up\n", "AB"[chip->sc_slot]);
253 		return 1;
254 	}
255 
256 	/*
257 	 * XXX Disable DMA (DMA not coded yet)
258 	 */
259 	reg &= ~(TX39_UARTCTRL1_ENDMARX | TX39_UARTCTRL1_ENDMATX);
260 	tx_conf_write(tc, ofs, reg);
261 
262 	/* Supply clock XXX should call clock module routine. */
263 	reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG);
264 	reg |= (slot ? TX39_CLOCK_ENUARTBCLK : TX39_CLOCK_ENUARTACLK);
265 	tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg);
266 
267 	return 0;
268 }
269 
270 void
271 txcom_disable(chip)
272 	struct txcom_chip *chip;
273 {
274 	tx_chipset_tag_t tc;
275 	txreg_t reg;
276 	int slot;
277 
278 	tc = chip->sc_tc;
279 	slot = chip->sc_slot;
280 
281 	reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot));
282 	/* DMA */
283 	reg &= ~(TX39_UARTCTRL1_ENDMARX | TX39_UARTCTRL1_ENDMATX);
284 
285 	/* Power */
286 	reg &= ~TX39_UARTCTRL1_ENUART;
287 	tx_conf_write(tc, TX39_UARTCTRL1_REG(slot), reg);
288 
289 	/* Clock */
290 	reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG);
291 	reg &= ~(slot ? TX39_CLOCK_ENUARTBCLK : TX39_CLOCK_ENUARTACLK);
292 	tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg);
293 
294 }
295 
296 __inline int
297 __txcom_txbufready(chip, retry)
298 	struct txcom_chip *chip;
299 	int retry;
300 {
301 	tx_chipset_tag_t tc = chip->sc_tc;
302 	int ofs = TX39_UARTCTRL1_REG(chip->sc_slot);
303 
304 	do {
305 		if (tx_conf_read(tc, ofs) & TX39_UARTCTRL1_EMPTY)
306 			return 1;
307 	} while(--retry != 0);
308 
309 	return 0;
310 }
311 
312 /*
313  * console
314  */
315 int
316 txcom_cngetc(dev)
317 	dev_t dev;
318 {
319 	tx_chipset_tag_t tc;
320 	int ofs, c, s;
321 
322 	s = spltty();
323 
324 	tc = txcom_chip.sc_tc;
325 	ofs = TX39_UARTCTRL1_REG(txcom_chip.sc_slot);
326 
327 	while(!(TX39_UARTCTRL1_RXHOLDFULL & tx_conf_read(tc, ofs)))
328 		;
329 
330 	c = TX39_UARTRXHOLD_RXDATA(
331 		tx_conf_read(tc, TX39_UARTRXHOLD_REG(txcom_chip.sc_slot)));
332 
333 	if (c == '\r')
334 		c = '\n';
335 
336 	splx(s);
337 
338 	return c;
339 }
340 
341 void
342 txcom_cnputc(dev, c)
343 	dev_t dev;
344 	int c;
345 {
346 	struct txcom_chip *chip = &txcom_chip;
347 	tx_chipset_tag_t tc = chip->sc_tc;
348 	int s;
349 
350 	s = spltty();
351 
352 	/* Wait for transmitter to empty */
353 	__txcom_txbufready(chip, -1);
354 
355 	tx_conf_write(tc, TX39_UARTTXHOLD_REG(chip->sc_slot),
356 		      (c & TX39_UARTTXHOLD_TXDATA_MASK));
357 
358 	__txcom_txbufready(chip, -1);
359 
360 	splx(s);
361 }
362 
363 void
364 txcom_cnpollc(dev, on)
365 	dev_t dev;
366 	int on;
367 {
368 }
369 
370 void
371 txcom_setmode(chip)
372 	struct txcom_chip *chip;
373 {
374 	tcflag_t cflag = chip->sc_cflag;
375 	int ofs = TX39_UARTCTRL1_REG(chip->sc_slot);
376 	txreg_t reg;
377 
378 	reg = tx_conf_read(chip->sc_tc, ofs);
379 
380 	switch (ISSET(cflag, CSIZE)) {
381 	default:
382 		printf("txcom_setmode: CS7, CS8 only. use CS7");
383 		/* FALL THROUGH */
384 	case CS7:
385 		reg |= TX39_UARTCTRL1_BIT7;
386 		break;
387 	case CS8:
388 		reg &= ~TX39_UARTCTRL1_BIT7;
389 		break;
390 	}
391 
392 	if (ISSET(cflag, PARENB)) {
393 		reg |= TX39_UARTCTRL1_ENPARITY;
394 		if (ISSET(cflag, PARODD)) {
395 			reg &= ~TX39_UARTCTRL1_EVENPARITY;
396 		} else {
397 			reg |= TX39_UARTCTRL1_EVENPARITY;
398 		}
399 	} else {
400 		reg &= ~TX39_UARTCTRL1_ENPARITY;
401 	}
402 
403 	if (ISSET(cflag, CSTOPB)) {
404 		reg |= TX39_UARTCTRL1_TWOSTOP;
405 	}
406 
407 	tx_conf_write(chip->sc_tc, ofs, reg);
408 }
409 
410 void
411 txcom_setbaudrate(chip)
412 	struct txcom_chip *chip;
413 {
414 	int baudrate;
415 	txreg_t reg;
416 
417 	if (chip->sc_speed == 0)
418 		return;
419 
420 	baudrate = TX39_UARTCLOCKHZ / (chip->sc_speed * 16) - 1;
421 	reg = TX39_UARTCTRL2_BAUDRATE_SET(0, baudrate);
422 
423 	tx_conf_write(chip->sc_tc, TX39_UARTCTRL2_REG(chip->sc_slot), reg);
424 }
425 
426 int
427 txcom_cnattach(slot, speed, cflag)
428 	int slot, speed, cflag;
429 {
430 	cn_tab = &txcomcons;
431 
432 	txcom_chip.sc_tc	= tx_conf_get_tag();
433 	txcom_chip.sc_slot	= slot;
434 	txcom_chip.sc_cflag	= cflag;
435 	txcom_chip.sc_speed	= speed;
436 	txcom_chip.sc_hwflags |= TXCOM_HW_CONSOLE;
437 
438 	txcom_enable(&txcom_chip);
439 	txcom_setmode(&txcom_chip);
440 	txcom_setbaudrate(&txcom_chip);
441 
442 	return 0;
443 }
444 
445 /*
446  * tty
447  */
448 void
449 txcom_break(sc, on)
450 	struct txcom_softc *sc;
451 	int on;
452 {
453 	struct txcom_chip *chip = sc->sc_chip;
454 
455 	tx_conf_write(chip->sc_tc, TX39_UARTTXHOLD_REG(chip->sc_slot),
456 		      on ? TX39_UARTTXHOLD_BREAK : 0);
457 }
458 
459 void
460 txcom_modem(sc, on)
461 	struct txcom_softc *sc;
462 	int on;
463 {
464 	struct txcom_chip *chip = sc->sc_chip;
465 	tx_chipset_tag_t tc = chip->sc_tc;
466 	int slot = chip->sc_slot;
467 	txreg_t reg;
468 
469 	reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot));
470 
471 	if (on) {
472 		reg &= ~TX39_UARTCTRL1_DISTXD;
473 	} else {
474 		reg |= TX39_UARTCTRL1_DISTXD;
475 	}
476 
477 	reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot));
478 }
479 
480 void
481 txcom_shutdown(sc)
482 	struct txcom_softc *sc;
483 {
484 	struct tty *tp = sc->sc_tty;
485 	int s = spltty();
486 
487 	/* Clear any break condition set with TIOCSBRK. */
488 	txcom_break(sc, 0);
489 
490 	/*
491 	 * Hang up if necessary.  Wait a bit, so the other side has time to
492 	 * notice even if we immediately open the port again.
493 	 */
494 	if (ISSET(tp->t_cflag, HUPCL)) {
495 		txcom_modem(sc, 0);
496 		(void) tsleep(sc, TTIPRI, ttclos, hz);
497 	}
498 
499 
500 	/* Turn off interrupts if not the console. */
501 	if (!ISSET(sc->sc_chip->sc_hwflags, TXCOM_HW_CONSOLE)) {
502 		txcom_disable(sc->sc_chip);
503 	}
504 
505 	splx(s);
506 }
507 
508 __inline const char *
509 __txcom_slotname(slot)
510 	int slot;
511 {
512 	static const char *slotname[] = {"UARTA", "UARTB"};
513 	if (slot != 0 && slot != 1) {
514 		return "bogus slot";
515 	} else {
516 		return slotname[slot];
517 	}
518 }
519 
520 int
521 txcom_overrun_intr(arg)
522 	void *arg;
523 {
524 	struct txcom_softc *sc = arg;
525 
526 	printf("%s overrun\n", __txcom_slotname(sc->sc_chip->sc_slot));
527 
528 	return 0;
529 }
530 
531 int
532 txcom_frameerr_intr(arg)
533 	void *arg;
534 {
535 	struct txcom_softc *sc = arg;
536 
537 	printf("%s frame error\n", __txcom_slotname(sc->sc_chip->sc_slot));
538 
539 	return 0;
540 }
541 
542 int
543 txcom_parityerr_intr(arg)
544 	void *arg;
545 {
546 	struct txcom_softc *sc = arg;
547 
548 	printf("%s parity error\n", __txcom_slotname(sc->sc_chip->sc_slot));
549 
550 	return 0;
551 }
552 
553 int
554 txcom_break_intr(arg)
555 	void *arg;
556 {
557 	struct txcom_softc *sc = arg;
558 
559 	printf("%s break\n", __txcom_slotname(sc->sc_chip->sc_slot));
560 
561 	return 0;
562 }
563 
564 int
565 txcom_rxintr(arg)
566 	void *arg;
567 {
568 	struct txcom_softc *sc = arg;
569 	struct txcom_chip *chip = sc->sc_chip;
570 	u_int8_t c;
571 
572 	c = TX39_UARTRXHOLD_RXDATA(
573 		tx_conf_read(chip->sc_tc,
574 			     TX39_UARTRXHOLD_REG(chip->sc_slot)));
575 
576 	sc->sc_rbuf[sc->sc_rbput] = c;
577 	sc->sc_rbput = (sc->sc_rbput + 1) % TXCOM_RING_MASK;
578 
579 	timeout(txcom_rxsoft, arg, 1);
580 
581 	return 0;
582 }
583 
584 void
585 txcom_rxsoft(arg)
586 	void *arg;
587 {
588 	struct txcom_softc *sc = arg;
589 	struct tty *tp = sc->sc_tty;
590 	int (*rint) __P((int c, struct tty *tp));
591 	int code;
592 	int s, end, get;
593 
594 	rint = linesw[tp->t_line].l_rint;
595 
596 	s = spltty();
597 	end = sc->sc_rbput;
598 	get = sc->sc_rbget;
599 
600 	while (get != end) {
601 		code = sc->sc_rbuf[get];
602 
603 		if ((*rint)(code, tp) == -1) {
604 			/*
605 			 * The line discipline's buffer is out of space.
606 			 */
607 		}
608 		get = (get + 1) % TXCOM_RING_MASK;
609 	}
610 	sc->sc_rbget = get;
611 
612 	splx(s);
613 }
614 
615 int
616 txcom_txintr(arg)
617 	void *arg;
618 {
619 	struct txcom_softc *sc = arg;
620 	struct txcom_chip *chip = sc->sc_chip;
621 	tx_chipset_tag_t tc = chip->sc_tc;
622 
623 	if (sc->sc_tbc > 0) {
624 		tx_conf_write(tc, TX39_UARTTXHOLD_REG(chip->sc_slot),
625 			      (*sc->sc_tba &
626 			       TX39_UARTTXHOLD_TXDATA_MASK));
627 		sc->sc_tbc--;
628 		sc->sc_tba++;
629 	} else {
630 		timeout(txcom_txsoft, arg, 1);
631 	}
632 
633 	return 0;
634 }
635 
636 void
637 txcom_txsoft(arg)
638 	void *arg;
639 {
640 	struct txcom_softc *sc = arg;
641 	struct tty *tp = sc->sc_tty;
642 	int s = spltty();
643 
644 	CLR(tp->t_state, TS_BUSY);
645 	if (ISSET(tp->t_state, TS_FLUSH)) {
646 		CLR(tp->t_state, TS_FLUSH);
647 	} else {
648 		ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf));
649 	}
650 
651 	(*linesw[tp->t_line].l_start)(tp);
652 
653 	splx(s);
654 }
655 
656 int
657 txcomopen(dev, flag, mode, p)
658 	dev_t dev;
659 	int flag, mode;
660 	struct proc *p;
661 {
662 	struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)];
663 	struct txcom_chip *chip;
664 	struct tty *tp;
665 	int s, err;
666 	struct termios t;
667 
668 	if (!sc)
669 		return ENXIO;
670 
671 	chip = sc->sc_chip;
672 	tp = sc->sc_tty;
673 
674 	if (ISSET(tp->t_state, TS_ISOPEN) &&
675 	    ISSET(tp->t_state, TS_XCLUDE) &&
676 	    p->p_ucred->cr_uid != 0)
677 		return (EBUSY);
678 
679 	s = spltty();
680 
681 	tp->t_dev = dev;
682 	tp->t_ispeed = 0;
683 	tp->t_ospeed = 0;
684 
685 	t.c_ispeed = 0;
686 	if (ISSET(chip->sc_hwflags, TXCOM_HW_CONSOLE)) {
687 		t.c_ospeed = chip->sc_speed;
688 		t.c_cflag = chip->sc_cflag;
689 	} else {
690 		t.c_ospeed = TTYDEF_SPEED;
691 		t.c_cflag = TTYDEF_CFLAG;
692 	}
693 
694 	if (ISSET(chip->sc_swflags, TIOCFLAG_CLOCAL))
695 		SET(t.c_cflag, CLOCAL);
696 	if (ISSET(chip->sc_swflags, TIOCFLAG_CRTSCTS))
697 		SET(t.c_cflag, CRTSCTS);
698 	if (ISSET(chip->sc_swflags, TIOCFLAG_MDMBUF))
699 		SET(t.c_cflag, MDMBUF);
700 
701 	txcom_enable(sc->sc_chip);
702 
703 	txcomparam(tp, &t);
704 
705 	tp->t_iflag = TTYDEF_IFLAG;
706 	tp->t_oflag = TTYDEF_OFLAG;
707 	tp->t_lflag = TTYDEF_LFLAG;
708 
709 	ttychars(tp);
710 	ttsetwater(tp);
711 
712 	/*
713 	 * Turn on DTR.  We must always do this, even if carrier is not
714 	 * present, because otherwise we'd have to use TIOCSDTR
715 	 * immediately after setting CLOCAL, which applications do not
716 	 * expect.  We always assert DTR while the device is open
717 	 * unless explicitly requested to deassert it.
718 	 */
719 	txcom_modem(sc, 1);
720 
721 	/* Clear the input ring, and unblock. */
722 	sc->sc_rbget = sc->sc_rbput = 0;
723 
724 	splx(s);
725 
726 	if ((err = ttyopen(tp, minor(dev), ISSET(flag, O_NONBLOCK)))) {
727 		DPRINTF(("txcomopen: ttyopen failed\n"));
728 		goto out;
729 	}
730 	if ((err = (*linesw[tp->t_line].l_open)(dev, tp))) {
731 		DPRINTF(("txcomopen: line dicipline open failed\n"));
732 		goto out;
733 	}
734 
735 	return err;
736 
737  out:
738 	if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
739 		/*
740 		 * We failed to open the device, and nobody else had it opened.
741 		 * Clean up the state as appropriate.
742 		 */
743 		txcom_shutdown(sc);
744 	}
745 
746 	return err;
747 
748 }
749 
750 int
751 txcomclose(dev, flag, mode, p)
752 	dev_t dev;
753 	int flag, mode;
754 	struct proc *p;
755 {
756 	struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)];
757 	struct tty *tp = sc->sc_tty;
758 
759 	/* XXX This is for cons.c. */
760 	if (!ISSET(tp->t_state, TS_ISOPEN))
761 		return 0;
762 
763 	(*linesw[tp->t_line].l_close)(tp, flag);
764 	ttyclose(tp);
765 
766 	if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
767 		/*
768 		 * Although we got a last close, the device may still be in
769 		 * use; e.g. if this was the dialout node, and there are still
770 		 * processes waiting for carrier on the non-dialout node.
771 		 */
772 		txcom_shutdown(sc);
773 	}
774 
775 	return 0;
776 }
777 
778 int
779 txcomread(dev, uio, flag)
780 	dev_t dev;
781 	struct uio *uio;
782 	int flag;
783 {
784 	struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)];
785 	struct tty *tp = sc->sc_tty;
786 
787 	return ((*linesw[tp->t_line].l_read)(tp, uio, flag));
788 }
789 
790 int
791 txcomwrite(dev, uio, flag)
792 	dev_t dev;
793 	struct uio *uio;
794 	int flag;
795 {
796 	struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)];
797 	struct tty *tp = sc->sc_tty;
798 
799 	return ((*linesw[tp->t_line].l_write)(tp, uio, flag));
800 }
801 
802 struct tty *
803 txcomtty(dev)
804 	dev_t dev;
805 {
806 	struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)];
807 
808 	return sc->sc_tty;
809 }
810 
811 int
812 txcomioctl(dev, cmd, data, flag, p)
813 	dev_t dev;
814 	u_long cmd;
815 	caddr_t data;
816 	int flag;
817 	struct proc *p;
818 {
819 	struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)];
820 	struct tty *tp = sc->sc_tty;
821 	int s, err;
822 
823 	err = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, p);
824 	if (err >= 0) {
825 		return err;
826 	}
827 
828 	err = ttioctl(tp, cmd, data, flag, p);
829 	if (err >= 0) {
830 		return err;
831 	}
832 
833 	err = 0;
834 
835 	s = spltty();
836 
837 	switch (cmd) {
838 	case TIOCSBRK:
839 		txcom_break(sc, 1);
840 		break;
841 
842 	case TIOCCBRK:
843 		txcom_break(sc, 0);
844 		break;
845 
846 	case TIOCSDTR:
847 		txcom_modem(sc, 1);
848 		break;
849 
850 	case TIOCCDTR:
851 		txcom_modem(sc, 0);
852 		break;
853 
854 	case TIOCGFLAGS:
855 		*(int *)data = sc->sc_chip->sc_swflags;
856 		break;
857 
858 	case TIOCSFLAGS:
859 		err = suser(p->p_ucred, &p->p_acflag);
860 		if (err) {
861 			break;
862 		}
863 		sc->sc_chip->sc_swflags = *(int *)data;
864 		break;
865 
866 	}
867 
868 	splx(s);
869 
870 	return err;
871 }
872 
873 void
874 txcomstop(tp, flag)
875 	struct tty *tp;
876 	int flag;
877 {
878 	struct txcom_softc *sc = txcom_cd.cd_devs[minor(tp->t_dev)];
879 	int s;
880 
881 	s = spltty();
882 
883 	if (ISSET(tp->t_state, TS_BUSY)) {
884 		/* Stop transmitting at the next chunk. */
885 		sc->sc_tbc = 0;
886 		sc->sc_heldtbc = 0;
887 		if (!ISSET(tp->t_state, TS_TTSTOP))
888 			SET(tp->t_state, TS_FLUSH);
889 	}
890 
891 	splx(s);
892 }
893 
894 void
895 txcomstart(tp)
896 	struct tty *tp;
897 {
898 	struct txcom_softc *sc = txcom_cd.cd_devs[minor(tp->t_dev)];
899 	struct txcom_chip *chip = sc->sc_chip;
900 	tx_chipset_tag_t tc = chip->sc_tc;
901 	int slot = chip->sc_slot;
902 	int s;
903 
904 	s = spltty();
905 
906 	if (!__txcom_txbufready(chip, 0) ||
907 	    ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP))
908 		goto out;
909 
910 	if (tp->t_outq.c_cc <= tp->t_lowat) {
911 		if (ISSET(tp->t_state, TS_ASLEEP)) {
912 			CLR(tp->t_state, TS_ASLEEP);
913 			wakeup(&tp->t_outq);
914 		}
915 		selwakeup(&tp->t_wsel);
916 		if (tp->t_outq.c_cc == 0)
917 			goto out;
918 	}
919 
920 	sc->sc_tba = tp->t_outq.c_cf;
921 	sc->sc_tbc = ndqb(&tp->t_outq, 0);
922 	SET(tp->t_state, TS_BUSY);
923 
924 	/* Output the first character of the contiguous buffer. */
925 	tx_conf_write(tc, TX39_UARTTXHOLD_REG(slot),
926 		      (*sc->sc_tba & TX39_UARTTXHOLD_TXDATA_MASK));
927 
928 	sc->sc_tbc--;
929 	sc->sc_tba++;
930 
931  out:
932 	splx(s);
933 }
934 
935 /*
936  * Set TXcom tty parameters from termios.
937  */
938 int
939 txcomparam(tp, t)
940 	struct tty *tp;
941 	struct termios *t;
942 {
943 	struct txcom_softc *sc = txcom_cd.cd_devs[minor(tp->t_dev)];
944 	struct txcom_chip *chip;
945 	int ospeed, cflag;
946 	int s;
947 
948 	if (!sc)
949 		return ENXIO;
950 
951 	ospeed = t->c_ospeed;
952 	cflag = t->c_cflag;
953 
954 	/* Check requested parameters. */
955 	if (ospeed < 0) {
956 		return EINVAL;
957 	}
958 	if (t->c_ispeed && t->c_ispeed != ospeed) {
959 		return EINVAL;
960 	}
961 
962 	s = spltty();
963 	chip = sc->sc_chip;
964 	/*
965 	 * For the console, always force CLOCAL and !HUPCL, so that the port
966 	 * is always active.
967 	 */
968 	if (ISSET(chip->sc_swflags, TIOCFLAG_SOFTCAR) ||
969 	    ISSET(chip->sc_hwflags, TXCOM_HW_CONSOLE)) {
970 		SET(cflag, CLOCAL);
971 		CLR(cflag, HUPCL);
972 	}
973 	splx(s);
974 
975 	/*
976 	 * Only whack the UART when params change.
977 	 * Some callers need to clear tp->t_ospeed
978 	 * to make sure initialization gets done.
979 	 */
980 	if (tp->t_ospeed == ospeed && tp->t_cflag == cflag) {
981 		return 0;
982 	}
983 
984 	s = spltty();
985 	chip = sc->sc_chip;
986 	chip->sc_speed = ospeed;
987 	chip->sc_cflag = cflag;
988 
989 	txcom_setmode(chip);
990 	txcom_setbaudrate(chip);
991 
992 	/* And copy to tty. */
993 	tp->t_ispeed = 0;
994 	tp->t_ospeed = chip->sc_speed;
995 	tp->t_cflag = chip->sc_cflag;
996 
997 	/*
998 	 * If hardware flow control is disabled, unblock any hard flow
999 	 * control state.
1000 	 */
1001 	if (!ISSET(chip->sc_cflag, CHWFLOW)) {
1002 		txcomstart(tp);
1003 	}
1004 
1005 	splx(s);
1006 
1007 	return 0;
1008 }
1009