1 /* $NetBSD: txcom.c,v 1.49 2014/11/15 19:20:01 christos Exp $ */ 2 3 /*- 4 * Copyright (c) 1999, 2000, 2004 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by UCHIYAMA Yasushi. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: txcom.c,v 1.49 2014/11/15 19:20:01 christos Exp $"); 34 35 #include "opt_tx39uart_debug.h" 36 37 #include <sys/param.h> 38 #include <sys/systm.h> 39 #include <sys/kernel.h> 40 #include <sys/device.h> 41 #include <sys/malloc.h> 42 #include <sys/kauth.h> 43 44 #include <sys/proc.h> /* tsleep/wakeup */ 45 46 #include <sys/ioctl.h> 47 #include <sys/select.h> 48 #include <sys/file.h> 49 50 #include <sys/tty.h> 51 #include <sys/conf.h> 52 #include <dev/cons.h> /* consdev */ 53 54 #include <machine/bus.h> 55 #include <machine/config_hook.h> 56 57 #include <hpcmips/tx/tx39var.h> 58 #include <hpcmips/tx/tx39icureg.h> 59 #include <hpcmips/tx/tx39uartvar.h> 60 #include <hpcmips/tx/tx39uartreg.h> 61 62 #include <hpcmips/tx/tx39irvar.h> 63 64 #include <hpcmips/tx/tx39clockreg.h> /* XXX */ 65 66 /* 67 * UARTA channel has DTR, DSR, RTS, CTS lines. and they wired to MFIO/IO port. 68 */ 69 #define IS_COM0(s) ((s) == 0) 70 #define IS_COM1(s) ((s) == 1) 71 #define ON ((void *)1) 72 #define OFF ((void *)0) 73 74 #ifdef TX39UART_DEBUG 75 #define DPRINTF_ENABLE 76 #define DPRINTF_DEBUG tx39uart_debug 77 #endif 78 #include <machine/debug.h> 79 80 #define TXCOM_HW_CONSOLE 0x40 81 #define TXCOM_RING_SIZE 256 /* must be a power of two! */ 82 #define TXCOM_RING_MASK (TXCOM_RING_SIZE - 1) 83 84 struct txcom_chip { 85 tx_chipset_tag_t sc_tc; 86 int sc_slot; /* UARTA or UARTB */ 87 int sc_cflag; 88 int sc_speed; 89 int sc_swflags; 90 int sc_hwflags; 91 92 int sc_dcd; 93 int sc_msr_cts; 94 int sc_tx_stopped; 95 }; 96 97 struct txcom_softc { 98 struct tty *sc_tty; 99 struct txcom_chip *sc_chip; 100 101 void *sc_txsoft_cookie; 102 void *sc_rxsoft_cookie; 103 104 u_int8_t *sc_tba; /* transmit buffer address */ 105 int sc_tbc; /* transmit byte count */ 106 int sc_heldtbc; 107 u_int8_t *sc_rbuf; /* receive buffer address */ 108 int sc_rbput; /* receive byte count */ 109 int sc_rbget; 110 }; 111 112 extern struct cfdriver txcom_cd; 113 114 int txcom_match(device_t, cfdata_t, void *); 115 void txcom_attach(device_t, device_t, void *); 116 int txcom_print(void *, const char *); 117 118 int txcom_txintr(void *); 119 int txcom_rxintr(void *); 120 int txcom_frameerr_intr(void *); 121 int txcom_parityerr_intr(void *); 122 int txcom_break_intr(void *); 123 124 void txcom_rxsoft(void *); 125 void txcom_txsoft(void *); 126 127 int txcom_stsoft(void *); 128 int txcom_stsoft2(void *); 129 int txcom_stsoft3(void *); 130 int txcom_stsoft4(void *); 131 132 133 void txcom_shutdown(struct txcom_softc *); 134 void txcom_break(struct txcom_softc *, int); 135 void txcom_modem(struct txcom_softc *, int); 136 void txcomstart(struct tty *); 137 int txcomparam(struct tty *, struct termios *); 138 139 void txcom_reset (struct txcom_chip *); 140 int txcom_enable (struct txcom_chip *, bool); 141 void txcom_disable (struct txcom_chip *); 142 void txcom_setmode (struct txcom_chip *); 143 void txcom_setbaudrate(struct txcom_chip *); 144 int txcom_cngetc (dev_t); 145 void txcom_cnputc (dev_t, int); 146 void txcom_cnpollc (dev_t, int); 147 148 int txcom_dcd_hook(void *, int, long, void *); 149 int txcom_cts_hook(void *, int, long, void *); 150 151 152 inline int __txcom_txbufready(struct txcom_chip *, int); 153 const char *__txcom_slotname(int); 154 155 #ifdef TX39UARTDEBUG 156 void txcom_dump(struct txcom_chip *); 157 #endif 158 159 struct consdev txcomcons = { 160 NULL, NULL, txcom_cngetc, txcom_cnputc, txcom_cnpollc, NULL, NULL, 161 NULL, NODEV, CN_NORMAL 162 }; 163 164 /* Serial console */ 165 struct txcom_chip txcom_chip; 166 167 CFATTACH_DECL_NEW(txcom, sizeof(struct txcom_softc), 168 txcom_match, txcom_attach, NULL, NULL); 169 170 dev_type_open(txcomopen); 171 dev_type_close(txcomclose); 172 dev_type_read(txcomread); 173 dev_type_write(txcomwrite); 174 dev_type_ioctl(txcomioctl); 175 dev_type_stop(txcomstop); 176 dev_type_tty(txcomtty); 177 dev_type_poll(txcompoll); 178 179 const struct cdevsw txcom_cdevsw = { 180 .d_open = txcomopen, 181 .d_close = txcomclose, 182 .d_read = txcomread, 183 .d_write = txcomwrite, 184 .d_ioctl = txcomioctl, 185 .d_stop = txcomstop, 186 .d_tty = txcomtty, 187 .d_poll = txcompoll, 188 .d_mmap = nommap, 189 .d_kqfilter = ttykqfilter, 190 .d_discard = nodiscard, 191 .d_flag = D_TTY 192 }; 193 194 int 195 txcom_match(device_t parent, cfdata_t cf, void *aux) 196 { 197 /* if the autoconfiguration got this far, there's a slot here */ 198 return 1; 199 } 200 201 void 202 txcom_attach(device_t parent, device_t self, void *aux) 203 { 204 struct tx39uart_attach_args *ua = aux; 205 struct txcom_softc *sc = device_private(self); 206 tx_chipset_tag_t tc; 207 struct tty *tp; 208 struct txcom_chip *chip; 209 int slot, console; 210 211 /* Check this slot used as serial console */ 212 console = (ua->ua_slot == txcom_chip.sc_slot) && 213 (txcom_chip.sc_hwflags & TXCOM_HW_CONSOLE); 214 215 if (console) { 216 sc->sc_chip = &txcom_chip; 217 } else { 218 if (!(sc->sc_chip = malloc(sizeof(struct txcom_chip), 219 M_DEVBUF, M_WAITOK))) { 220 printf(": can't allocate chip\n"); 221 return; 222 } 223 memset(sc->sc_chip, 0, sizeof(struct txcom_chip)); 224 } 225 226 chip = sc->sc_chip; 227 tc = chip->sc_tc = ua->ua_tc; 228 slot = chip->sc_slot = ua->ua_slot; 229 230 #ifdef TX39UARTDEBUG 231 txcom_dump(chip); 232 #endif 233 if (!console) 234 txcom_reset(chip); 235 236 if (!(sc->sc_rbuf = malloc(TXCOM_RING_SIZE, M_DEVBUF, M_WAITOK))) { 237 printf(": can't allocate buffer.\n"); 238 return; 239 } 240 memset(sc->sc_rbuf, 0, TXCOM_RING_SIZE); 241 242 tp = tty_alloc(); 243 tp->t_oproc = txcomstart; 244 tp->t_param = txcomparam; 245 tp->t_hwiflow = NULL; 246 sc->sc_tty = tp; 247 tty_attach(tp); 248 249 if (ISSET(chip->sc_hwflags, TXCOM_HW_CONSOLE)) { 250 int maj; 251 /* locate the major number */ 252 maj = cdevsw_lookup_major(&txcom_cdevsw); 253 254 cn_tab->cn_dev = makedev(maj, device_unit(self)); 255 256 printf(": console"); 257 } 258 259 printf("\n"); 260 261 /* 262 * Enable interrupt 263 */ 264 #define TXCOMINTR(i, s) MAKEINTR(2, TX39_INTRSTATUS2_UART##i##INT(s)) 265 266 tx_intr_establish(tc, TXCOMINTR(RX, slot), IST_EDGE, IPL_TTY, 267 txcom_rxintr, sc); 268 tx_intr_establish(tc, TXCOMINTR(TX, slot), IST_EDGE, IPL_TTY, 269 txcom_txintr, sc); 270 tx_intr_establish(tc, TXCOMINTR(RXOVERRUN, slot), IST_EDGE, IPL_TTY, 271 txcom_rxintr, sc); 272 tx_intr_establish(tc, TXCOMINTR(TXOVERRUN, slot), IST_EDGE, IPL_TTY, 273 txcom_txintr, sc); 274 tx_intr_establish(tc, TXCOMINTR(FRAMEERR, slot), IST_EDGE, IPL_TTY, 275 txcom_frameerr_intr, sc); 276 tx_intr_establish(tc, TXCOMINTR(PARITYERR, slot), IST_EDGE, IPL_TTY, 277 txcom_parityerr_intr, sc); 278 tx_intr_establish(tc, TXCOMINTR(BREAK, slot), IST_EDGE, IPL_TTY, 279 txcom_break_intr, sc); 280 281 sc->sc_txsoft_cookie = 282 softint_establish(SOFTINT_SERIAL, txcom_txsoft, sc); 283 sc->sc_rxsoft_cookie = 284 softint_establish(SOFTINT_SERIAL, txcom_rxsoft, sc); 285 286 /* 287 * UARTA has external signal line. (its wiring is platform dependent) 288 */ 289 if (IS_COM0(slot)) { 290 /* install DCD, CTS hooks. */ 291 config_hook(CONFIG_HOOK_EVENT, CONFIG_HOOK_COM0_DCD, 292 CONFIG_HOOK_EXCLUSIVE, txcom_dcd_hook, sc); 293 config_hook(CONFIG_HOOK_EVENT, CONFIG_HOOK_COM0_CTS, 294 CONFIG_HOOK_EXCLUSIVE, txcom_cts_hook, sc); 295 } 296 297 /* 298 * UARTB can connect IR module 299 */ 300 if (IS_COM1(slot)) { 301 struct txcom_attach_args tca; 302 tca.tca_tc = tc; 303 tca.tca_parent = self; 304 config_found(self, &tca, txcom_print); 305 } 306 } 307 308 int 309 txcom_print(void *aux, const char *pnp) 310 { 311 return pnp ? QUIET : UNCONF; 312 } 313 314 void 315 txcom_reset(struct txcom_chip *chip) 316 { 317 tx_chipset_tag_t tc; 318 int slot, ofs; 319 txreg_t reg; 320 321 tc = chip->sc_tc; 322 slot = chip->sc_slot; 323 ofs = TX39_UARTCTRL1_REG(slot); 324 325 /* Supply clock */ 326 reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG); 327 reg |= (slot ? TX39_CLOCK_ENUARTBCLK : TX39_CLOCK_ENUARTACLK); 328 tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg); 329 330 /* reset UART module */ 331 tx_conf_write(tc, ofs, 0); 332 } 333 334 int 335 txcom_enable(struct txcom_chip *chip, bool console) 336 { 337 tx_chipset_tag_t tc; 338 txreg_t reg; 339 int slot, ofs, timeout; 340 341 tc = chip->sc_tc; 342 slot = chip->sc_slot; 343 ofs = TX39_UARTCTRL1_REG(slot); 344 345 /* 346 * External power supply (if any) 347 * When serial console, Windows CE already powered on it. 348 */ 349 if (!console) { 350 config_hook_call(CONFIG_HOOK_POWERCONTROL, 351 CONFIG_HOOK_POWERCONTROL_COM0, PWCTL_ON); 352 delay(3); 353 } 354 355 /* Supply clock */ 356 reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG); 357 reg |= (slot ? TX39_CLOCK_ENUARTBCLK : TX39_CLOCK_ENUARTACLK); 358 tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg); 359 360 /* 361 * XXX Disable DMA (DMA not coded yet) 362 */ 363 reg = tx_conf_read(tc, ofs); 364 reg &= ~(TX39_UARTCTRL1_ENDMARX | TX39_UARTCTRL1_ENDMATX); 365 tx_conf_write(tc, ofs, reg); 366 367 /* enable */ 368 reg = tx_conf_read(tc, ofs); 369 reg |= TX39_UARTCTRL1_ENUART; 370 reg &= ~TX39_UARTCTRL1_ENBREAHALT; 371 tx_conf_write(tc, ofs, reg); 372 373 timeout = 100000; 374 375 while(!(tx_conf_read(tc, ofs) & TX39_UARTCTRL1_UARTON) && 376 --timeout > 0) 377 ; 378 379 if (timeout == 0 && !cold) { 380 printf("%s never power up\n", __txcom_slotname(slot)); 381 return 1; 382 } 383 384 return 0; 385 } 386 387 void 388 txcom_disable(struct txcom_chip *chip) 389 { 390 tx_chipset_tag_t tc; 391 txreg_t reg; 392 int slot; 393 394 tc = chip->sc_tc; 395 slot = chip->sc_slot; 396 397 reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot)); 398 /* DMA */ 399 reg &= ~(TX39_UARTCTRL1_ENDMARX | TX39_UARTCTRL1_ENDMATX); 400 401 /* disable module */ 402 reg &= ~TX39_UARTCTRL1_ENUART; 403 tx_conf_write(tc, TX39_UARTCTRL1_REG(slot), reg); 404 405 /* Clock */ 406 reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG); 407 reg &= ~(slot ? TX39_CLOCK_ENUARTBCLK : TX39_CLOCK_ENUARTACLK); 408 tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg); 409 410 } 411 412 inline int 413 __txcom_txbufready(struct txcom_chip *chip, int retry) 414 { 415 tx_chipset_tag_t tc = chip->sc_tc; 416 int ofs = TX39_UARTCTRL1_REG(chip->sc_slot); 417 418 do { 419 if (tx_conf_read(tc, ofs) & TX39_UARTCTRL1_EMPTY) 420 return 1; 421 } while(--retry != 0); 422 423 return 0; 424 } 425 426 void 427 txcom_pulse_mode(device_t dev) 428 { 429 struct txcom_softc *sc = device_private(dev); 430 struct txcom_chip *chip = sc->sc_chip; 431 tx_chipset_tag_t tc = chip->sc_tc; 432 int ofs; 433 txreg_t reg; 434 435 ofs = TX39_UARTCTRL1_REG(chip->sc_slot); 436 437 reg = tx_conf_read(tc, ofs); 438 /* WindowsCE use this setting */ 439 reg |= TX39_UARTCTRL1_PULSEOPT1; 440 reg &= ~TX39_UARTCTRL1_PULSEOPT2; 441 reg |= TX39_UARTCTRL1_DTINVERT; 442 443 tx_conf_write(tc, ofs, reg); 444 } 445 446 /* 447 * console 448 */ 449 int 450 txcom_cngetc(dev_t dev) 451 { 452 tx_chipset_tag_t tc; 453 int ofs, c, s; 454 455 s = spltty(); 456 457 tc = txcom_chip.sc_tc; 458 ofs = TX39_UARTCTRL1_REG(txcom_chip.sc_slot); 459 460 while(!(TX39_UARTCTRL1_RXHOLDFULL & tx_conf_read(tc, ofs))) 461 ; 462 463 c = TX39_UARTRXHOLD_RXDATA( 464 tx_conf_read(tc, TX39_UARTRXHOLD_REG(txcom_chip.sc_slot))); 465 466 if (c == '\r') 467 c = '\n'; 468 469 splx(s); 470 471 return c; 472 } 473 474 void 475 txcom_cnputc(dev_t dev, int c) 476 { 477 struct txcom_chip *chip = &txcom_chip; 478 tx_chipset_tag_t tc = chip->sc_tc; 479 int s; 480 481 s = spltty(); 482 483 /* Wait for transmitter to empty */ 484 __txcom_txbufready(chip, -1); 485 486 tx_conf_write(tc, TX39_UARTTXHOLD_REG(chip->sc_slot), 487 (c & TX39_UARTTXHOLD_TXDATA_MASK)); 488 489 __txcom_txbufready(chip, -1); 490 491 splx(s); 492 } 493 494 void 495 txcom_cnpollc(dev_t dev, int on) 496 { 497 } 498 499 void 500 txcom_setmode(struct txcom_chip *chip) 501 { 502 tcflag_t cflag = chip->sc_cflag; 503 int ofs = TX39_UARTCTRL1_REG(chip->sc_slot); 504 txreg_t reg; 505 506 reg = tx_conf_read(chip->sc_tc, ofs); 507 reg &= ~TX39_UARTCTRL1_ENUART; 508 tx_conf_write(chip->sc_tc, ofs, reg); 509 510 switch (ISSET(cflag, CSIZE)) { 511 default: 512 printf("txcom_setmode: CS7, CS8 only. use CS7"); 513 /* FALL THROUGH */ 514 case CS7: 515 reg |= TX39_UARTCTRL1_BIT7; 516 break; 517 case CS8: 518 reg &= ~TX39_UARTCTRL1_BIT7; 519 break; 520 } 521 522 if (ISSET(cflag, PARENB)) { 523 reg |= TX39_UARTCTRL1_ENPARITY; 524 if (ISSET(cflag, PARODD)) { 525 reg &= ~TX39_UARTCTRL1_EVENPARITY; 526 } else { 527 reg |= TX39_UARTCTRL1_EVENPARITY; 528 } 529 } else { 530 reg &= ~TX39_UARTCTRL1_ENPARITY; 531 } 532 533 if (ISSET(cflag, CSTOPB)) 534 reg |= TX39_UARTCTRL1_TWOSTOP; 535 else 536 reg &= ~TX39_UARTCTRL1_TWOSTOP; 537 538 reg |= TX39_UARTCTRL1_ENUART; 539 tx_conf_write(chip->sc_tc, ofs, reg); 540 } 541 542 void 543 txcom_setbaudrate(struct txcom_chip *chip) 544 { 545 int baudrate; 546 int ofs = TX39_UARTCTRL1_REG(chip->sc_slot); 547 txreg_t reg, reg1; 548 549 if (chip->sc_speed == 0) 550 return; 551 552 if (!cold) 553 DPRINTF("%d\n", chip->sc_speed); 554 555 reg1 = tx_conf_read(chip->sc_tc, ofs); 556 reg1 &= ~TX39_UARTCTRL1_ENUART; 557 tx_conf_write(chip->sc_tc, ofs, reg1); 558 559 baudrate = TX39_UARTCLOCKHZ / (chip->sc_speed * 16) - 1; 560 reg = TX39_UARTCTRL2_BAUDRATE_SET(0, baudrate); 561 562 tx_conf_write(chip->sc_tc, TX39_UARTCTRL2_REG(chip->sc_slot), reg); 563 564 reg1 |= TX39_UARTCTRL1_ENUART; 565 tx_conf_write(chip->sc_tc, ofs, reg1); 566 } 567 568 int 569 txcom_cnattach(int slot, int speed, int cflag) 570 { 571 cn_tab = &txcomcons; 572 573 txcom_chip.sc_tc = tx_conf_get_tag(); 574 txcom_chip.sc_slot = slot; 575 txcom_chip.sc_cflag = cflag; 576 txcom_chip.sc_speed = speed; 577 txcom_chip.sc_hwflags |= TXCOM_HW_CONSOLE; 578 #if notyet 579 txcom_reset(&txcom_chip); 580 #endif 581 txcom_setmode(&txcom_chip); 582 txcom_setbaudrate(&txcom_chip); 583 584 if (txcom_enable(&txcom_chip, true) != 0) 585 return 1; 586 587 return 0; 588 } 589 590 /* 591 * tty 592 */ 593 void 594 txcom_break(struct txcom_softc *sc, int on) 595 { 596 struct txcom_chip *chip = sc->sc_chip; 597 598 tx_conf_write(chip->sc_tc, TX39_UARTTXHOLD_REG(chip->sc_slot), 599 on ? TX39_UARTTXHOLD_BREAK : 0); 600 } 601 602 void 603 txcom_modem(struct txcom_softc *sc, int on) 604 { 605 struct txcom_chip *chip = sc->sc_chip; 606 tx_chipset_tag_t tc = chip->sc_tc; 607 int slot = chip->sc_slot; 608 txreg_t reg; 609 610 /* assert DTR */ 611 if (IS_COM0(slot)) { 612 config_hook_call(CONFIG_HOOK_SET, 613 CONFIG_HOOK_COM0_DTR, 614 (void *)on); 615 } 616 617 reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot)); 618 reg &= ~TX39_UARTCTRL1_ENUART; 619 tx_conf_write(tc, TX39_UARTCTRL1_REG(slot), reg); 620 621 if (on) { 622 reg &= ~TX39_UARTCTRL1_DISTXD; 623 } else { 624 reg |= TX39_UARTCTRL1_DISTXD; /* low UARTTXD */ 625 } 626 627 reg |= TX39_UARTCTRL1_ENUART; 628 tx_conf_write(tc, TX39_UARTCTRL1_REG(slot), reg); 629 } 630 631 void 632 txcom_shutdown(struct txcom_softc *sc) 633 { 634 struct tty *tp = sc->sc_tty; 635 int s = spltty(); 636 637 /* Clear any break condition set with TIOCSBRK. */ 638 txcom_break(sc, 0); 639 640 /* 641 * Hang up if necessary. Wait a bit, so the other side has time to 642 * notice even if we immediately open the port again. 643 */ 644 if (ISSET(tp->t_cflag, HUPCL)) { 645 txcom_modem(sc, 0); 646 (void) tsleep(sc, TTIPRI, ttclos, hz); 647 } 648 649 650 /* Turn off interrupts if not the console. */ 651 if (!ISSET(sc->sc_chip->sc_hwflags, TXCOM_HW_CONSOLE)) { 652 txcom_disable(sc->sc_chip); 653 } 654 655 splx(s); 656 } 657 658 const char * 659 __txcom_slotname(int slot) 660 { 661 static const char *slotname[] = {"UARTA", "UARTB", "unknown"}; 662 663 if (slot != 0 && slot != 1) 664 return slotname[2]; 665 666 return slotname[slot]; 667 } 668 669 int 670 txcom_frameerr_intr(void *arg) 671 { 672 struct txcom_softc *sc = arg; 673 674 printf("%s frame error\n", __txcom_slotname(sc->sc_chip->sc_slot)); 675 676 return 0; 677 } 678 679 int 680 txcom_parityerr_intr(void *arg) 681 { 682 struct txcom_softc *sc = arg; 683 684 printf("%s parity error\n", __txcom_slotname(sc->sc_chip->sc_slot)); 685 686 return 0; 687 } 688 689 int 690 txcom_break_intr(void *arg) 691 { 692 struct txcom_softc *sc = arg; 693 694 printf("%s break\n", __txcom_slotname(sc->sc_chip->sc_slot)); 695 696 return 0; 697 } 698 699 int 700 txcom_rxintr(void *arg) 701 { 702 struct txcom_softc *sc = arg; 703 struct txcom_chip *chip = sc->sc_chip; 704 u_int8_t c; 705 706 c = TX39_UARTRXHOLD_RXDATA( 707 tx_conf_read(chip->sc_tc, 708 TX39_UARTRXHOLD_REG(chip->sc_slot))); 709 710 sc->sc_rbuf[sc->sc_rbput] = c; 711 sc->sc_rbput = (sc->sc_rbput + 1) % TXCOM_RING_MASK; 712 713 softint_schedule(sc->sc_rxsoft_cookie); 714 715 return 0; 716 } 717 718 void 719 txcom_rxsoft(void *arg) 720 { 721 struct txcom_softc *sc = arg; 722 struct tty *tp = sc->sc_tty; 723 int (*rint)(int, struct tty *); 724 int code; 725 int s, end, get; 726 727 rint = tp->t_linesw->l_rint; 728 729 s = spltty(); 730 end = sc->sc_rbput; 731 get = sc->sc_rbget; 732 733 while (get != end) { 734 code = sc->sc_rbuf[get]; 735 736 if ((*rint)(code, tp) == -1) { 737 /* 738 * The line discipline's buffer is out of space. 739 */ 740 } 741 get = (get + 1) % TXCOM_RING_MASK; 742 } 743 sc->sc_rbget = get; 744 745 splx(s); 746 } 747 748 int 749 txcom_txintr(void *arg) 750 { 751 struct txcom_softc *sc = arg; 752 struct txcom_chip *chip = sc->sc_chip; 753 tx_chipset_tag_t tc = chip->sc_tc; 754 755 if (sc->sc_tbc > 0) { 756 tx_conf_write(tc, TX39_UARTTXHOLD_REG(chip->sc_slot), 757 (*sc->sc_tba & 758 TX39_UARTTXHOLD_TXDATA_MASK)); 759 sc->sc_tbc--; 760 sc->sc_tba++; 761 } else { 762 softint_schedule(sc->sc_txsoft_cookie); 763 } 764 765 return 0; 766 } 767 768 void 769 txcom_txsoft(void *arg) 770 { 771 struct txcom_softc *sc = arg; 772 struct tty *tp = sc->sc_tty; 773 int s = spltty(); 774 775 CLR(tp->t_state, TS_BUSY); 776 if (ISSET(tp->t_state, TS_FLUSH)) { 777 CLR(tp->t_state, TS_FLUSH); 778 } else { 779 ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf)); 780 } 781 782 (*tp->t_linesw->l_start)(tp); 783 784 splx(s); 785 } 786 787 int 788 txcomopen(dev_t dev, int flag, int mode, struct lwp *l) 789 { 790 struct txcom_softc *sc; 791 struct txcom_chip *chip; 792 struct tty *tp; 793 int s, err = ENXIO; 794 795 sc = device_lookup_private(&txcom_cd, minor(dev)); 796 if (sc == NULL) 797 return err; 798 799 chip = sc->sc_chip; 800 tp = sc->sc_tty; 801 802 if (kauth_authorize_device_tty(l->l_cred, KAUTH_DEVICE_TTY_OPEN, tp)) 803 return (EBUSY); 804 805 s = spltty(); 806 807 if (txcom_enable(sc->sc_chip, false)) { 808 splx(s); 809 goto out; 810 } 811 /* 812 * Do the following iff this is a first open. 813 */ 814 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 815 struct termios t; 816 817 tp->t_dev = dev; 818 819 t.c_ispeed = 0; 820 if (ISSET(chip->sc_hwflags, TXCOM_HW_CONSOLE)) { 821 t.c_ospeed = chip->sc_speed; 822 t.c_cflag = chip->sc_cflag; 823 } else { 824 t.c_ospeed = TTYDEF_SPEED; 825 t.c_cflag = TTYDEF_CFLAG; 826 } 827 828 if (ISSET(chip->sc_swflags, TIOCFLAG_CLOCAL)) 829 SET(t.c_cflag, CLOCAL); 830 if (ISSET(chip->sc_swflags, TIOCFLAG_CRTSCTS)) 831 SET(t.c_cflag, CRTSCTS); 832 if (ISSET(chip->sc_swflags, TIOCFLAG_MDMBUF)) 833 SET(t.c_cflag, MDMBUF); 834 835 /* Make sure txcomparam() will do something. */ 836 tp->t_ospeed = 0; 837 txcomparam(tp, &t); 838 839 tp->t_iflag = TTYDEF_IFLAG; 840 tp->t_oflag = TTYDEF_OFLAG; 841 tp->t_lflag = TTYDEF_LFLAG; 842 843 ttychars(tp); 844 ttsetwater(tp); 845 846 /* 847 * Turn on DTR. We must always do this, even if carrier is not 848 * present, because otherwise we'd have to use TIOCSDTR 849 * immediately after setting CLOCAL, which applications do not 850 * expect. We always assert DTR while the device is open 851 * unless explicitly requested to deassert it. 852 */ 853 txcom_modem(sc, 1); 854 855 /* Clear the input ring, and unblock. */ 856 sc->sc_rbget = sc->sc_rbput = 0; 857 } 858 859 splx(s); 860 #define TXCOMDIALOUT(x) TTDIALOUT(x) 861 if ((err = ttyopen(tp, TXCOMDIALOUT(dev), ISSET(flag, O_NONBLOCK)))) { 862 DPRINTF("ttyopen failed\n"); 863 goto out; 864 } 865 if ((err = (*tp->t_linesw->l_open)(dev, tp))) { 866 DPRINTF("line dicipline open failed\n"); 867 goto out; 868 } 869 870 return err; 871 872 out: 873 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 874 /* 875 * We failed to open the device, and nobody else had it opened. 876 * Clean up the state as appropriate. 877 */ 878 txcom_shutdown(sc); 879 } 880 881 return err; 882 883 } 884 885 int 886 txcomclose(dev_t dev, int flag, int mode, struct lwp *l) 887 { 888 struct txcom_softc *sc = device_lookup_private(&txcom_cd, minor(dev)); 889 struct tty *tp = sc->sc_tty; 890 891 /* XXX This is for cons.c. */ 892 if (!ISSET(tp->t_state, TS_ISOPEN)) 893 return 0; 894 895 (*tp->t_linesw->l_close)(tp, flag); 896 ttyclose(tp); 897 898 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 899 /* 900 * Although we got a last close, the device may still be in 901 * use; e.g. if this was the dialout node, and there are still 902 * processes waiting for carrier on the non-dialout node. 903 */ 904 txcom_shutdown(sc); 905 } 906 907 return 0; 908 } 909 910 int 911 txcomread(dev_t dev, struct uio *uio, int flag) 912 { 913 struct txcom_softc *sc = device_lookup_private(&txcom_cd, minor(dev)); 914 struct tty *tp = sc->sc_tty; 915 916 return ((*tp->t_linesw->l_read)(tp, uio, flag)); 917 } 918 919 int 920 txcomwrite(dev_t dev, struct uio *uio, int flag) 921 { 922 struct txcom_softc *sc = device_lookup_private(&txcom_cd, minor(dev)); 923 struct tty *tp = sc->sc_tty; 924 925 return ((*tp->t_linesw->l_write)(tp, uio, flag)); 926 } 927 928 int 929 txcompoll(dev_t dev, int events, struct lwp *l) 930 { 931 struct txcom_softc *sc = device_lookup_private(&txcom_cd, minor(dev)); 932 struct tty *tp = sc->sc_tty; 933 934 return ((*tp->t_linesw->l_poll)(tp, events, l)); 935 } 936 937 struct tty * 938 txcomtty(dev_t dev) 939 { 940 struct txcom_softc *sc = device_lookup_private(&txcom_cd, minor(dev)); 941 942 return sc->sc_tty; 943 } 944 945 int 946 txcomioctl(dev_t dev, u_long cmd, void *data, int flag, struct lwp *l) 947 { 948 struct txcom_softc *sc = device_lookup_private(&txcom_cd, minor(dev)); 949 struct tty *tp = sc->sc_tty; 950 int s, err; 951 952 err = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, l); 953 if (err != EPASSTHROUGH) { 954 return err; 955 } 956 957 err = ttioctl(tp, cmd, data, flag, l); 958 if (err != EPASSTHROUGH) { 959 return err; 960 } 961 962 err = 0; 963 964 s = spltty(); 965 966 switch (cmd) { 967 default: 968 err = EPASSTHROUGH; 969 break; 970 971 case TIOCSBRK: 972 txcom_break(sc, 1); 973 break; 974 975 case TIOCCBRK: 976 txcom_break(sc, 0); 977 break; 978 979 case TIOCSDTR: 980 txcom_modem(sc, 1); 981 break; 982 983 case TIOCCDTR: 984 txcom_modem(sc, 0); 985 break; 986 987 case TIOCGFLAGS: 988 *(int *)data = sc->sc_chip->sc_swflags; 989 break; 990 991 case TIOCSFLAGS: 992 err = kauth_authorize_device_tty(l->l_cred, 993 KAUTH_DEVICE_TTY_PRIVSET, tp); 994 if (err) { 995 break; 996 } 997 sc->sc_chip->sc_swflags = *(int *)data; 998 break; 999 1000 } 1001 1002 splx(s); 1003 1004 return err; 1005 } 1006 1007 void 1008 txcomstop(struct tty *tp, int flag) 1009 { 1010 struct txcom_softc *sc; 1011 int s; 1012 1013 sc = device_lookup_private(&txcom_cd, minor(tp->t_dev)); 1014 1015 s = spltty(); 1016 1017 if (ISSET(tp->t_state, TS_BUSY)) { 1018 /* Stop transmitting at the next chunk. */ 1019 sc->sc_tbc = 0; 1020 sc->sc_heldtbc = 0; 1021 if (!ISSET(tp->t_state, TS_TTSTOP)) 1022 SET(tp->t_state, TS_FLUSH); 1023 } 1024 1025 splx(s); 1026 } 1027 1028 void 1029 txcomstart(struct tty *tp) 1030 { 1031 struct txcom_softc *sc; 1032 struct txcom_chip *chip; 1033 tx_chipset_tag_t tc; 1034 int slot; 1035 int s; 1036 1037 sc = device_lookup_private(&txcom_cd, minor(tp->t_dev)); 1038 chip = sc->sc_chip; 1039 tc = chip->sc_tc; 1040 slot = chip->sc_slot; 1041 1042 s = spltty(); 1043 1044 if (!__txcom_txbufready(chip, 0) || 1045 ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP)) 1046 goto out; 1047 1048 if (!ttypull(tp)) 1049 goto out; 1050 1051 sc->sc_tba = tp->t_outq.c_cf; 1052 sc->sc_tbc = ndqb(&tp->t_outq, 0); 1053 SET(tp->t_state, TS_BUSY); 1054 1055 /* Output the first character of the contiguous buffer. */ 1056 tx_conf_write(tc, TX39_UARTTXHOLD_REG(slot), 1057 (*sc->sc_tba & TX39_UARTTXHOLD_TXDATA_MASK)); 1058 1059 sc->sc_tbc--; 1060 sc->sc_tba++; 1061 1062 out: 1063 splx(s); 1064 } 1065 1066 /* 1067 * Set TXcom tty parameters from termios. 1068 */ 1069 int 1070 txcomparam(struct tty *tp, struct termios *t) 1071 { 1072 struct txcom_softc *sc; 1073 struct txcom_chip *chip; 1074 int ospeed; 1075 int s; 1076 1077 sc = device_lookup_private(&txcom_cd, minor(tp->t_dev)); 1078 if (sc == NULL) 1079 return ENXIO; 1080 1081 ospeed = t->c_ospeed; 1082 1083 /* Check requested parameters. */ 1084 if (ospeed < 0) { 1085 return EINVAL; 1086 } 1087 if (t->c_ispeed && t->c_ispeed != ospeed) { 1088 return EINVAL; 1089 } 1090 1091 s = spltty(); 1092 chip = sc->sc_chip; 1093 /* 1094 * For the console, always force CLOCAL and !HUPCL, so that the port 1095 * is always active. 1096 */ 1097 if (ISSET(chip->sc_swflags, TIOCFLAG_SOFTCAR) || 1098 ISSET(chip->sc_hwflags, TXCOM_HW_CONSOLE)) { 1099 SET(t->c_cflag, CLOCAL); 1100 CLR(t->c_cflag, HUPCL); 1101 } 1102 splx(s); 1103 1104 /* 1105 * If we're not in a mode that assumes a connection is present, then 1106 * ignore carrier changes. 1107 */ 1108 if (ISSET(t->c_cflag, CLOCAL | MDMBUF)) 1109 chip->sc_dcd = 0; 1110 else 1111 chip->sc_dcd = 1; 1112 1113 /* 1114 * Only whack the UART when params change. 1115 * Some callers need to clear tp->t_ospeed 1116 * to make sure initialization gets done. 1117 */ 1118 if (tp->t_ospeed == ospeed && tp->t_cflag == t->c_cflag) { 1119 return 0; 1120 } 1121 1122 s = spltty(); 1123 chip = sc->sc_chip; 1124 chip->sc_speed = ospeed; 1125 chip->sc_cflag = t->c_cflag; 1126 1127 txcom_setmode(chip); 1128 txcom_setbaudrate(chip); 1129 1130 /* And copy to tty. */ 1131 tp->t_ispeed = 0; 1132 tp->t_ospeed = chip->sc_speed; 1133 tp->t_cflag = chip->sc_cflag; 1134 1135 /* 1136 * Update the tty layer's idea of the carrier bit, in case we changed 1137 * CLOCAL or MDMBUF. We don't hang up here; we only do that by 1138 * explicit request. 1139 */ 1140 (void) (*tp->t_linesw->l_modem)(tp, chip->sc_dcd); 1141 1142 /* 1143 * If hardware flow control is disabled, unblock any hard flow 1144 * control state. 1145 */ 1146 if (!ISSET(chip->sc_cflag, CHWFLOW)) { 1147 txcomstart(tp); 1148 } 1149 1150 splx(s); 1151 1152 return 0; 1153 } 1154 1155 int 1156 txcom_dcd_hook(void *arg, int type, long id, void *msg) 1157 { 1158 struct txcom_softc *sc = arg; 1159 struct tty *tp = sc->sc_tty; 1160 struct txcom_chip *chip = sc->sc_chip; 1161 int modem = !(int)msg; /* p-edge 1, n-edge 0 */ 1162 1163 DPRINTF("DCD %s\n", modem ? "ON" : "OFF"); 1164 1165 if (modem && chip->sc_dcd) 1166 (void) (*tp->t_linesw->l_modem)(tp, chip->sc_dcd); 1167 1168 return 0; 1169 } 1170 1171 int 1172 txcom_cts_hook(void *arg, int type, long id, void *msg) 1173 { 1174 struct txcom_softc *sc = arg; 1175 struct tty *tp = sc->sc_tty; 1176 struct txcom_chip *chip = sc->sc_chip; 1177 int clear = !(int)msg; /* p-edge 1, n-edge 0 */ 1178 1179 DPRINTF("CTS %s\n", clear ? "ON" : "OFF"); 1180 1181 if (chip->sc_msr_cts) { 1182 if (!clear) { 1183 chip->sc_tx_stopped = 1; 1184 } else { 1185 chip->sc_tx_stopped = 0; 1186 (*tp->t_linesw->l_start)(tp); 1187 } 1188 } 1189 1190 return 0; 1191 } 1192 1193 #ifdef TX39UARTDEBUG 1194 void 1195 txcom_dump(struct txcom_chip *chip) 1196 { 1197 tx_chipset_tag_t tc = chip->sc_tc; 1198 int slot = chip->sc_slot; 1199 txreg_t reg; 1200 1201 reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot)); 1202 #define ISSETPRINT(r, m) \ 1203 dbg_bitmask_print(r, TX39_UARTCTRL1_##m, #m) 1204 ISSETPRINT(reg, UARTON); 1205 ISSETPRINT(reg, EMPTY); 1206 ISSETPRINT(reg, PRXHOLDFULL); 1207 ISSETPRINT(reg, RXHOLDFULL); 1208 ISSETPRINT(reg, ENDMARX); 1209 ISSETPRINT(reg, ENDMATX); 1210 ISSETPRINT(reg, TESTMODE); 1211 ISSETPRINT(reg, ENBREAHALT); 1212 ISSETPRINT(reg, ENDMATEST); 1213 ISSETPRINT(reg, ENDMALOOP); 1214 ISSETPRINT(reg, PULSEOPT2); 1215 ISSETPRINT(reg, PULSEOPT1); 1216 ISSETPRINT(reg, DTINVERT); 1217 ISSETPRINT(reg, DISTXD); 1218 ISSETPRINT(reg, TWOSTOP); 1219 ISSETPRINT(reg, LOOPBACK); 1220 ISSETPRINT(reg, BIT7); 1221 ISSETPRINT(reg, EVENPARITY); 1222 ISSETPRINT(reg, ENPARITY); 1223 ISSETPRINT(reg, ENUART); 1224 } 1225 #endif /* TX39UARTDEBUG */ 1226