xref: /netbsd-src/sys/arch/hpcmips/tx/tx39spi.c (revision eceb233b9bd0dfebb902ed73b531ae6964fa3f9b)
1 /*	$NetBSD: tx39spi.c,v 1.5 2012/10/27 17:17:54 chs Exp $	*/
2 
3 /*-
4  * Copyright (c) 2005 HAMAJIMA Katsuomi. All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25  * SUCH DAMAGE.
26  */
27 
28 /*
29  * Toshiba TX3912/3922 SPI module
30  */
31 
32 #include <sys/cdefs.h>
33 
34 __KERNEL_RCSID(0, "$NetBSD: tx39spi.c,v 1.5 2012/10/27 17:17:54 chs Exp $");
35 
36 #include <sys/param.h>
37 #include <sys/systm.h>
38 #include <sys/device.h>
39 #include <hpcmips/tx/tx39var.h>
40 #include <hpcmips/tx/tx39spivar.h>
41 #include <hpcmips/tx/tx39spireg.h>
42 #include <hpcmips/tx/tx39icureg.h>
43 
44 #include "locators.h"
45 
46 struct tx39spi_softc {
47 	tx_chipset_tag_t sc_tc;
48 	int sc_attached;
49 };
50 
51 static int tx39spi_match(device_t, cfdata_t, void *);
52 static void tx39spi_attach(device_t, device_t, void *);
53 static int tx39spi_search(device_t, cfdata_t, const int *, void *);
54 static int tx39spi_print(void *, const char *);
55 #ifndef USE_POLL
56 static int tx39spi_intr(void *);
57 #endif
58 
59 CFATTACH_DECL_NEW(tx39spi, sizeof(struct tx39spi_softc),
60     tx39spi_match, tx39spi_attach, NULL, NULL);
61 
62 int
63 tx39spi_match(device_t parent, cfdata_t cf, void *aux)
64 {
65 	return (ATTACH_NORMAL);
66 }
67 
68 void
69 tx39spi_attach(device_t parent, device_t self, void *aux)
70 {
71 	struct txsim_attach_args *ta = aux;
72 	struct tx39spi_softc *sc = device_private(self);
73 	tx_chipset_tag_t tc = sc->sc_tc = ta->ta_tc;
74 	txreg_t reg;
75 
76 	reg = tx_conf_read(tc, TX39_SPICTRL_REG);
77 	reg &= ~(TX39_SPICTRL_ENSPI);
78 	tx_conf_write(tc, TX39_SPICTRL_REG, reg);
79 	tx_conf_write(tc, TX39_INTRCLEAR5_REG, TX39_INTRSTATUS5_SPIBUFAVAILINT);
80 	tx_conf_write(tc, TX39_INTRCLEAR5_REG, TX39_INTRSTATUS5_SPIERRINT);
81 	tx_conf_write(tc, TX39_INTRCLEAR5_REG, TX39_INTRSTATUS5_SPIRCVINT);
82 	tx_conf_write(tc, TX39_INTRCLEAR5_REG, TX39_INTRSTATUS5_SPIEMPTYINT);
83 
84 #ifndef USE_POLL
85 	tx_intr_establish(tc, MAKEINTR(5, TX39_INTRSTATUS5_SPI),
86 			  IST_EDGE, IPL_TTY, tx39spi_intr, sc);
87 #endif
88 	printf("\n");
89 
90 	config_search_ia(tx39spi_search, self, "txspiif", tx39spi_print);
91 }
92 
93 int
94 tx39spi_search(device_t parent, cfdata_t cf, const int *ldesc, void *aux)
95 {
96 	struct tx39spi_softc *sc = device_private(parent);
97 	struct txspi_attach_args sa;
98 
99 	sa.sa_tc = sc->sc_tc;
100 	sa.sa_slot = cf->cf_loc[TXSPIIFCF_SLOT];
101 
102 	if (sa.sa_slot == TXSPIIFCF_SLOT_DEFAULT) {
103 		printf("tx39spi_search: wildcarded slot, skipping\n");
104 		return 0;
105 	}
106 
107 	if (!(sc->sc_attached & (1 << sa.sa_slot)) && /* not attached slot */
108 	    config_match(parent, cf, &sa)) {
109 		config_attach(parent, cf, &sa, tx39spi_print);
110 		sc->sc_attached |= (1 << sa.sa_slot);
111 	}
112 
113 	return 0;
114 }
115 
116 int
117 tx39spi_print(void *aux, const char *pnp)
118 {
119 	struct txspi_attach_args *sa = aux;
120 
121 	aprint_normal(" slot %d", sa->sa_slot);
122 
123 	return (QUIET);
124 }
125 
126 #ifndef USE_POLL
127 int
128 tx39spi_intr(void *)
129 {
130 	return 0;
131 }
132 #endif
133 
134 int
135 tx39spi_is_empty(struct tx39spi_softc *sc)
136 {
137 	return tx_conf_read(sc->sc_tc, TX39_SPICTRL_REG) & (TX39_SPICTRL_EMPTY);
138 }
139 
140 void
141 tx39spi_put_word(struct tx39spi_softc *sc, int w)
142 {
143 	tx_chipset_tag_t tc = sc->sc_tc;
144 #ifdef USE_POLL
145 	while(!(tx_conf_read(tc, TX39_INTRSTATUS5_REG) & TX39_INTRSTATUS5_SPIBUFAVAILINT))
146 		;
147 	tx_conf_write(tc, TX39_INTRCLEAR5_REG, TX39_INTRSTATUS5_SPIBUFAVAILINT);
148 #endif
149 	tx_conf_write(tc, TX39_SPITXHOLD_REG , w & 0xffff);
150 }
151 
152 int
153 tx39spi_get_word(struct tx39spi_softc *sc)
154 {
155 	tx_chipset_tag_t tc = sc->sc_tc;
156 #ifdef USE_POLL
157 	while(!(tx_conf_read(tc, TX39_INTRSTATUS5_REG) & TX39_INTRSTATUS5_SPIRCVINT))
158 		;
159 	tx_conf_write(tc, TX39_INTRCLEAR5_REG, TX39_INTRSTATUS5_SPIRCVINT);
160 #endif
161 	return tx_conf_read(tc, TX39_SPIRXHOLD_REG) & 0xffff;
162 }
163 
164 void
165 tx39spi_enable(struct tx39spi_softc *sc, int n)
166 {
167 	tx_chipset_tag_t tc = sc->sc_tc;
168 	txreg_t reg = tx_conf_read(tc, TX39_SPICTRL_REG);
169 	if (n)
170 		reg |= (TX39_SPICTRL_ENSPI);
171 	else
172 		reg &= ~(TX39_SPICTRL_ENSPI);
173 	tx_conf_write(tc, TX39_SPICTRL_REG, reg);
174 }
175 
176 void
177 tx39spi_delayval(struct tx39spi_softc *sc, int n)
178 {
179 	tx_chipset_tag_t tc = sc->sc_tc;
180 	txreg_t reg = tx_conf_read(tc, TX39_SPICTRL_REG);
181 	tx_conf_write(tc, TX39_SPICTRL_REG, TX39_SPICTRL_DELAYVAL_SET(reg, n));
182 }
183 
184 void
185 tx39spi_baudrate(struct tx39spi_softc *sc, int n)
186 {
187 	tx_chipset_tag_t tc = sc->sc_tc;
188 	txreg_t reg = tx_conf_read(tc, TX39_SPICTRL_REG);
189 	tx_conf_write(tc, TX39_SPICTRL_REG, TX39_SPICTRL_BAUDRATE_SET(reg, n));
190 }
191 
192 void
193 tx39spi_word(struct tx39spi_softc *sc, int n)
194 {
195 	tx_chipset_tag_t tc = sc->sc_tc;
196 	txreg_t reg = tx_conf_read(tc, TX39_SPICTRL_REG);
197 	if (n)
198 		reg |= (TX39_SPICTRL_WORD);
199 	else
200 		reg &= ~(TX39_SPICTRL_WORD);
201 	tx_conf_write(tc, TX39_SPICTRL_REG, reg);
202 }
203 
204 void
205 tx39spi_phapol(struct tx39spi_softc *sc, int n)
206 {
207 	tx_chipset_tag_t tc = sc->sc_tc;
208 	txreg_t reg = tx_conf_read(tc, TX39_SPICTRL_REG);
209 	if (n)
210 		reg |= (TX39_SPICTRL_PHAPOL);
211 	else
212 		reg &= ~(TX39_SPICTRL_PHAPOL);
213 	tx_conf_write(tc, TX39_SPICTRL_REG, reg);
214 }
215 
216 void
217 tx39spi_clkpol(struct tx39spi_softc *sc, int n)
218 {
219 	tx_chipset_tag_t tc = sc->sc_tc;
220 	txreg_t reg = tx_conf_read(tc, TX39_SPICTRL_REG);
221 	if (n)
222 		reg |= (TX39_SPICTRL_CLKPOL);
223 	else
224 		reg &= ~(TX39_SPICTRL_CLKPOL);
225 	tx_conf_write(tc, TX39_SPICTRL_REG, reg);
226 }
227 
228 void
229 tx39spi_lsb(struct tx39spi_softc *sc, int n)
230 {
231 	tx_chipset_tag_t tc = sc->sc_tc;
232 	txreg_t reg = tx_conf_read(tc, TX39_SPICTRL_REG);
233 	if (n)
234 		reg |= (TX39_SPICTRL_LSB);
235 	else
236 		reg &= ~(TX39_SPICTRL_LSB);
237 	tx_conf_write(tc, TX39_SPICTRL_REG, reg);
238 }
239