1 /* $NetBSD: tx39sib.c,v 1.20 2008/04/28 20:23:22 martin Exp $ */ 2 3 /*- 4 * Copyright (c) 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by UCHIYAMA Yasushi. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 /* 33 * TX39 SIB (Serial Interface Bus) module. 34 */ 35 36 #include <sys/cdefs.h> 37 __KERNEL_RCSID(0, "$NetBSD: tx39sib.c,v 1.20 2008/04/28 20:23:22 martin Exp $"); 38 39 #undef TX39SIBDEBUG 40 41 #include <sys/param.h> 42 #include <sys/systm.h> 43 #include <sys/device.h> 44 45 #include <machine/bus.h> 46 #include <machine/intr.h> 47 48 #include <hpcmips/tx/tx39var.h> 49 #include <hpcmips/tx/tx39icureg.h> 50 #include <hpcmips/tx/tx39sibvar.h> 51 #include <hpcmips/tx/tx39sibreg.h> 52 53 #include "locators.h" 54 55 #ifdef TX39SIBDEBUG 56 int tx39sibdebug = 0; 57 #define DPRINTF(arg) if (tx39sibdebug) printf arg; 58 #else 59 #define DPRINTF(arg) 60 #endif 61 62 int tx39sib_match(struct device *, struct cfdata *, void *); 63 void tx39sib_attach(struct device *, struct device *, void *); 64 int tx39sib_print(void *, const char *); 65 int tx39sib_search(struct device *, struct cfdata *, 66 const int *, void *); 67 68 #define TX39_CLK2X 18432000 69 const int sibsclk_divide_table[8] = { 70 2, 3, 4, 5, 6, 8, 10, 12 71 }; 72 73 struct tx39sib_param { 74 /* SIB clock rate */ 75 int sp_clock; 76 /* 77 * SIBMCLK = 18.432MHz = (CLK2X /4) 78 * SIBSCLK = SIBMCLK / sp_clock 79 * sp_clock start end divide module 80 * 0 7 8 2 81 * 1 6 8 3 82 * 2 6 9 4 83 * 3 5 9 5 84 * 4 5 10 6 85 * 5 4 11 8 86 * 6 3 12 10 87 * 7 2 13 12 88 */ 89 /* sampling rate */ 90 int sp_snd_rate; /* SNDFSDIV + 1 */ 91 int sp_tel_rate; /* TELFSDIV + 1 */ 92 /* 93 * Fs = (SIBSCLK * 2) / ((FSDIV + 1) * 64) 94 * FSDIV + 1 sampling rate 95 * 15 19.2k (1.6% error vs. CD-XA) 96 * 13 22.154k (0.47% error vs. CD-Audio) 97 * 22 7.85k (1.8% error vs. 8k) 98 */ 99 /* data format 16/8bit */ 100 int sp_sf0sndmode; 101 int sp_sf0telmode; 102 }; 103 104 struct tx39sib_param tx39sib_param_default_3912 = { 105 0, /* SIBSCLK = 9.216MHz (div2) */ 106 #if 0 /* setting sample */ 107 40, /* audio: 7.2kHz */ 108 26, /* audio: CD-Audio(/4) 11.077kHz*/ 109 6, /* audio: 48kHz */ 110 #endif 111 13, /* audio: CD-Audio(/2 = 22.050) 22.154kHz*/ 112 40, /* telecom: 7.2kHz */ 113 TX39_SIBCTRL_SND16, /* Audio 16bit mono */ 114 TX39_SIBCTRL_TEL16 /* Telecom 16bit mono */ 115 }; 116 117 struct tx39sib_param tx39sib_param_default_3922 = { 118 7, /* SIBSCLK = 9.216MHz (div1) */ 119 13, /* audio: CD-Audio(/2 = 22.050) 22.154kHz*/ 120 40, /* telecom: 7.2kHz */ 121 TX39_SIBCTRL_SND16, /* Audio 16bit mono */ 122 TX39_SIBCTRL_TEL16 /* Telecom 16bit mono */ 123 }; 124 125 struct tx39sib_softc { 126 struct device sc_dev; 127 tx_chipset_tag_t sc_tc; 128 129 struct tx39sib_param sc_param; 130 int sc_attached; 131 }; 132 133 inline int __txsibsf0_ready(tx_chipset_tag_t); 134 #ifdef TX39SIBDEBUG 135 void tx39sib_dump(struct tx39sib_softc *); 136 #endif 137 138 CFATTACH_DECL(tx39sib, sizeof(struct tx39sib_softc), 139 tx39sib_match, tx39sib_attach, NULL, NULL); 140 141 int 142 tx39sib_match(struct device *parent, struct cfdata *cf, void *aux) 143 { 144 return (ATTACH_FIRST); 145 } 146 147 void 148 tx39sib_attach(struct device *parent, struct device *self, void *aux) 149 { 150 struct txsim_attach_args *ta = aux; 151 struct tx39sib_softc *sc = (void*)self; 152 tx_chipset_tag_t tc; 153 154 sc->sc_tc = tc = ta->ta_tc; 155 156 /* set default param */ 157 #ifdef TX391X 158 sc->sc_param = tx39sib_param_default_3912; 159 #endif /* TX391X */ 160 #ifdef TX392X 161 sc->sc_param = tx39sib_param_default_3922; 162 #endif /* TX392X */ 163 164 #define MHZ(a) ((a) / 1000000), (((a) % 1000000) / 1000) 165 printf(": %d.%03d MHz", MHZ(tx39sib_clock(self))); 166 167 printf("\n"); 168 #ifdef TX39SIBDEBUG 169 if (tx39sibdebug) 170 tx39sib_dump(sc); 171 #endif 172 /* enable subframe0 */ 173 tx39sib_enable1(self); 174 /* enable SIB */ 175 tx39sib_enable2(self); 176 177 #ifdef TX39SIBDEBUG 178 if (tx39sibdebug) 179 tx39sib_dump(sc); 180 #endif 181 182 config_search_ia(tx39sib_search, self, "txsibif", tx39sib_print); 183 } 184 185 void 186 tx39sib_enable1(struct device *dev) 187 { 188 struct tx39sib_softc *sc = (void*)dev; 189 struct tx39sib_param *param = &sc->sc_param; 190 tx_chipset_tag_t tc = sc->sc_tc; 191 192 txreg_t reg; 193 194 /* disable SIB */ 195 tx39sib_disable(dev); 196 197 /* setup */ 198 reg = 0; 199 /* SIB clock rate */ 200 reg = TX39_SIBCTRL_SCLKDIV_SET(reg, param->sp_clock); 201 /* sampling rate (sound) */ 202 reg = TX39_SIBCTRL_SNDFSDIV_SET(reg, param->sp_snd_rate - 1); 203 /* sampling rate (telecom) */ 204 reg = TX39_SIBCTRL_TELFSDIV_SET(reg, param->sp_tel_rate - 1); 205 /* data format (8/16bit) */ 206 reg |= param->sp_sf0sndmode; 207 reg |= param->sp_sf0telmode; 208 tx_conf_write(tc, TX39_SIBCTRL_REG, reg); 209 210 /* DMA */ 211 reg = tx_conf_read(tc, TX39_SIBDMACTRL_REG); 212 reg &= ~(TX39_SIBDMACTRL_ENDMARXSND | 213 TX39_SIBDMACTRL_ENDMATXSND | 214 TX39_SIBDMACTRL_ENDMARXTEL | 215 TX39_SIBDMACTRL_ENDMATXTEL); 216 tx_conf_write(tc, TX39_SIBDMACTRL_REG, reg); 217 218 /* 219 * Enable subframe0 (BETTY) 220 */ 221 reg = tx_conf_read(tc, TX39_SIBCTRL_REG); 222 reg |= TX39_SIBCTRL_ENSF0; 223 tx_conf_write(tc, TX39_SIBCTRL_REG, reg); 224 } 225 226 void 227 tx39sib_enable2(struct device *dev) 228 { 229 struct tx39sib_softc *sc = (void*)dev; 230 tx_chipset_tag_t tc = sc->sc_tc; 231 txreg_t reg; 232 233 reg = tx_conf_read(tc, TX39_SIBCTRL_REG); 234 reg |= TX39_SIBCTRL_ENSIB; 235 tx_conf_write(tc, TX39_SIBCTRL_REG, reg); 236 } 237 238 void 239 tx39sib_disable(struct device *dev) 240 { 241 struct tx39sib_softc *sc = (void*)dev; 242 tx_chipset_tag_t tc = sc->sc_tc; 243 txreg_t reg; 244 /* disable codec side */ 245 /* notyet */ 246 247 /* disable TX39 side */ 248 reg = tx_conf_read(tc, TX39_SIBCTRL_REG); 249 reg &= ~(TX39_SIBCTRL_ENTEL | TX39_SIBCTRL_ENSND); 250 tx_conf_write(tc, TX39_SIBCTRL_REG, reg); 251 252 /* 253 * Disable subframe0/1 (BETTY/external codec) 254 */ 255 reg = tx_conf_read(tc, TX39_SIBCTRL_REG); 256 reg &= ~TX39_SIBCTRL_ENSF0; 257 reg &= ~(TX39_SIBCTRL_ENSF1 | TX39_SIBCTRL_SELTELSF1 | 258 TX39_SIBCTRL_SELSNDSF1); 259 tx_conf_write(tc, TX39_SIBCTRL_REG, reg); 260 261 /* disable TX39SIB module */ 262 reg &= ~TX39_SIBCTRL_ENSIB; 263 tx_conf_write(tc, TX39_SIBCTRL_REG, reg); 264 } 265 266 int 267 tx39sib_clock(struct device *dev) 268 { 269 struct tx39sib_softc *sc = (void*)dev; 270 271 return (TX39_CLK2X / sibsclk_divide_table[sc->sc_param.sp_clock]); 272 } 273 274 int 275 tx39sib_search(struct device *parent, struct cfdata *cf, 276 const int *ldesc, void *aux) 277 { 278 struct tx39sib_softc *sc = (void*)parent; 279 struct txsib_attach_args sa; 280 281 sa.sa_tc = sc->sc_tc; 282 sa.sa_slot = cf->cf_loc[TXSIBIFCF_SLOT]; 283 sa.sa_snd_rate = sc->sc_param.sp_snd_rate; 284 sa.sa_tel_rate = sc->sc_param.sp_tel_rate; 285 286 if (sa.sa_slot == TXSIBIFCF_SLOT_DEFAULT) { 287 printf("tx39sib_search: wildcarded slot, skipping\n"); 288 return (0); 289 } 290 291 if (!(sc->sc_attached & (1 << sa.sa_slot)) &&/* not attached slot */ 292 config_match(parent, cf, &sa)) { 293 config_attach(parent, cf, &sa, tx39sib_print); 294 sc->sc_attached |= (1 << sa.sa_slot); 295 } 296 297 return (0); 298 } 299 300 int 301 tx39sib_print(void *aux, const char *pnp) 302 { 303 struct txsib_attach_args *sa = aux; 304 305 aprint_normal(" slot %d", sa->sa_slot); 306 307 return (QUIET); 308 } 309 310 /* 311 * sync access method. don't use runtime. 312 */ 313 314 inline int 315 __txsibsf0_ready(tx_chipset_tag_t tc) 316 { 317 int i; 318 319 tx_conf_write(tc, TX39_INTRSTATUS1_REG, TX39_INTRSTATUS1_SIBSF0INT); 320 for (i = 0; (!(tx_conf_read(tc, TX39_INTRSTATUS1_REG) & 321 TX39_INTRSTATUS1_SIBSF0INT)) && i < 1000; i++) { 322 if (i > 100 && !(i % 100)) { 323 printf("sf0 busy loop: retry count %d\n", i); 324 } 325 } 326 327 if (i >= 1000) { 328 printf("sf0 busy\n"); 329 return (0); 330 } 331 332 return (1); 333 } 334 335 void 336 txsibsf0_reg_write(tx_chipset_tag_t tc, int addr, u_int16_t val) 337 { 338 txreg_t reg; 339 340 reg = txsibsf0_read(tc, addr); 341 reg |= TX39_SIBSF0_WRITE; 342 TX39_SIBSF0_REGDATA_CLR(reg); 343 reg = TX39_SIBSF0_REGDATA_SET(reg, val); 344 345 __txsibsf0_ready(tc); 346 tx_conf_write(tc, TX39_SIBSF0CTRL_REG, reg); 347 } 348 349 u_int16_t 350 txsibsf0_reg_read(tx_chipset_tag_t tc, int addr) 351 { 352 return (TX39_SIBSF0_REGDATA(txsibsf0_read(tc, addr))); 353 } 354 355 u_int32_t 356 txsibsf0_read(tx_chipset_tag_t tc, int addr) 357 { 358 txreg_t reg; 359 int retry = 3; 360 361 do { 362 reg = TX39_SIBSF0_REGADDR_SET(0, addr); 363 __txsibsf0_ready(tc); 364 tx_conf_write(tc, TX39_SIBSF0CTRL_REG, reg); 365 366 __txsibsf0_ready(tc); 367 reg = tx_conf_read(tc, TX39_SIBSF0STAT_REG); 368 369 } while ((TX39_SIBSF0_REGADDR(reg) != addr) && --retry > 0); 370 371 if (retry <= 0) 372 printf("txsibsf0_read: command failed\n"); 373 374 return (reg); 375 } 376 377 #ifdef TX39SIBDEBUG 378 #define ISSETPRINT_CTRL(r, m) \ 379 dbg_bitmask_print(r, TX39_SIBCTRL_##m, #m) 380 #define ISSETPRINT_DMACTRL(r, m) \ 381 dbg_bitmask_print(r, TX39_SIBDMACTRL_##m, #m) 382 383 void 384 tx39sib_dump(struct tx39sib_softc *sc) 385 { 386 tx_chipset_tag_t tc = sc->sc_tc; 387 txreg_t reg; 388 389 reg = tx_conf_read(tc, TX39_SIBCTRL_REG); 390 ISSETPRINT_CTRL(reg, SIBIRQ); 391 ISSETPRINT_CTRL(reg, ENCNTTEST); 392 ISSETPRINT_CTRL(reg, ENDMATEST); 393 ISSETPRINT_CTRL(reg, SNDMONO); 394 ISSETPRINT_CTRL(reg, RMONOSNDIN); 395 ISSETPRINT_CTRL(reg, TEL16); 396 ISSETPRINT_CTRL(reg, SND16); 397 ISSETPRINT_CTRL(reg, SELTELSF1); 398 ISSETPRINT_CTRL(reg, SELSNDSF1); 399 ISSETPRINT_CTRL(reg, ENTEL); 400 ISSETPRINT_CTRL(reg, ENSND); 401 ISSETPRINT_CTRL(reg, SIBLOOP); 402 ISSETPRINT_CTRL(reg, ENSF1); 403 ISSETPRINT_CTRL(reg, ENSF0); 404 ISSETPRINT_CTRL(reg, ENSIB); 405 printf("\n"); 406 printf("SCLKDIV %d\n", TX39_SIBCTRL_SCLKDIV(reg)); 407 printf("TELFSDIV %d\n", TX39_SIBCTRL_TELFSDIV(reg)); 408 printf("SNDFSDIV %d\n", TX39_SIBCTRL_SNDFSDIV(reg)); 409 410 reg = tx_conf_read(tc, TX39_SIBDMACTRL_REG); 411 ISSETPRINT_DMACTRL(reg, SNDBUFF1TIME); 412 ISSETPRINT_DMACTRL(reg, SNDDMALOOP); 413 ISSETPRINT_DMACTRL(reg, ENDMARXSND); 414 ISSETPRINT_DMACTRL(reg, ENDMATXSND); 415 ISSETPRINT_DMACTRL(reg, TELBUFF1TIME); 416 ISSETPRINT_DMACTRL(reg, TELDMALOOP); 417 ISSETPRINT_DMACTRL(reg, ENDMARXTEL); 418 ISSETPRINT_DMACTRL(reg, ENDMATXTEL); 419 printf("\n"); 420 printf("SNDDMAPTR %d\n", TX39_SIBDMACTRL_TELDMAPTR(reg)); 421 printf("TELDMAPTR %d\n", TX39_SIBDMACTRL_SNDDMAPTR(reg)); 422 423 } 424 #endif /* TX39SIBDEBUG */ 425